- Tx side bus_dmamap_load_mbuf_sg(9) support. This reduces bookkeeping
requiried to keep consistent softc state before/after callback function invocation and supposed to be sligntly faster than previous one as it wouldn't incur callback overhead. With this change callback function was gone. - Decrease TI_MAXTXSEGS to 32 from 128. It seems that most mbuf chain length is less than 32 and it would be re-packed with m_defrag(9) if its chain length is larger than TI_MAXTXSEGS. This would protect ti(4) against possible kernel stack overflow when txsegs[] is put on stack. Alternatively, we can embed the txsegs[] into softc. However, that would waste memory and make Tx/Rx speration hard when we want to sperate Tx/Rx handlers to optimize locking. - Fix dma map tracking used in Tx path. Previously it used the dma map of the last mbuf chain in ti_txeof() which was incorrect as ti(4) used dma map of the first mbuf chain when it loads a mbuf chain with bus_dmamap_load_mbuf(9). Correct the bug by introducing queues that keep track of active/inactive dma maps/mbuf chain. - Use ti_txcnt to check whether driver need to set watchdog timer instead of blidnly clearing the timer in ti_txeof(). - Remove the 3rd arg. of ti_encap(). Since ti(4) now caches the last descriptor index(ti_tx_saved_prodidx) used in Tx there is no need to pass it as a fuction arg. - Change data type of producer/consumer index to int from u_int16_t in order to remove implicit type conversions in Tx/Rx handlers. - Check interface queue before getting a mbuf chain to reduce locking overhead. - Check number of available Tx descriptores to be 16 or higher in ti_start(). This wouldn't protect Tx descriptor shortage but it would reduce number of bus_dmamap_unload(9) calls in ti_encap() when we are about to running out of Tx descriptors. - Command NIC to send packets ony when the driver really has packets enqueued. Previously it always set TI_MB_SENDPROD_IDX which would command NIC to DMA Tx descriptors into NIC local memory regardless of Tx descriptor changes. Reviewed by: scottl
This commit is contained in:
parent
bee89c7386
commit
ff3ced1270
@ -184,9 +184,7 @@ static void ti_txeof(struct ti_softc *);
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static void ti_rxeof(struct ti_softc *);
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static void ti_stats_update(struct ti_softc *);
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static int ti_encap(struct ti_softc *, struct mbuf *, u_int32_t *);
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static void ti_encap_cb(void *arg, bus_dma_segment_t *segs, int nseg,
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bus_size_t mapsize, int error);
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static int ti_encap(struct ti_softc *, struct mbuf **);
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static void ti_intr(void *);
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static void ti_start(struct ifnet *);
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@ -908,7 +906,7 @@ ti_cmd(sc, cmd)
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struct ti_softc *sc;
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struct ti_cmd_desc *cmd;
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{
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u_int32_t index;
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int index;
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index = sc->ti_cmd_saved_prodidx;
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CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd));
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@ -928,7 +926,7 @@ ti_cmd_ext(sc, cmd, arg, len)
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caddr_t arg;
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int len;
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{
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u_int32_t index;
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int index;
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int i;
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index = sc->ti_cmd_saved_prodidx;
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@ -1002,8 +1000,10 @@ ti_alloc_dmamaps(struct ti_softc *sc)
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int i;
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for (i = 0; i < TI_TX_RING_CNT; i++) {
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sc->ti_cdata.ti_txdesc[i].tx_m = NULL;
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sc->ti_cdata.ti_txdesc[i].tx_dmamap = 0;
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if (bus_dmamap_create(sc->ti_mbuftx_dmat, 0,
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&sc->ti_cdata.ti_tx_maps[i]))
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&sc->ti_cdata.ti_txdesc[i].tx_dmamap))
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return (ENOBUFS);
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}
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for (i = 0; i < TI_STD_RX_RING_CNT; i++) {
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@ -1033,10 +1033,10 @@ ti_free_dmamaps(struct ti_softc *sc)
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if (sc->ti_mbuftx_dmat)
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for (i = 0; i < TI_TX_RING_CNT; i++)
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if (sc->ti_cdata.ti_tx_maps[i]) {
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if (sc->ti_cdata.ti_txdesc[i].tx_dmamap) {
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bus_dmamap_destroy(sc->ti_mbuftx_dmat,
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sc->ti_cdata.ti_tx_maps[i]);
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sc->ti_cdata.ti_tx_maps[i] = 0;
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sc->ti_cdata.ti_txdesc[i].tx_dmamap);
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sc->ti_cdata.ti_txdesc[i].tx_dmamap = 0;
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}
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if (sc->ti_mbufrx_dmat)
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@ -1701,20 +1701,20 @@ static void
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ti_free_tx_ring(sc)
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struct ti_softc *sc;
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{
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bus_dmamap_t map;
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struct ti_txdesc *txd;
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int i;
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if (sc->ti_rdata->ti_tx_ring == NULL)
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return;
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for (i = 0; i < TI_TX_RING_CNT; i++) {
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if (sc->ti_cdata.ti_tx_chain[i] != NULL) {
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map = sc->ti_cdata.ti_tx_maps[i];
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bus_dmamap_sync(sc->ti_mbuftx_dmat, map,
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txd = &sc->ti_cdata.ti_txdesc[i];
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if (txd->tx_m != NULL) {
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bus_dmamap_sync(sc->ti_mbuftx_dmat, txd->tx_dmamap,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->ti_mbuftx_dmat, map);
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m_freem(sc->ti_cdata.ti_tx_chain[i]);
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sc->ti_cdata.ti_tx_chain[i] = NULL;
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bus_dmamap_unload(sc->ti_mbuftx_dmat, txd->tx_dmamap);
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m_freem(txd->tx_m);
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txd->tx_m = NULL;
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}
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bzero((char *)&sc->ti_rdata->ti_tx_ring[i],
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sizeof(struct ti_tx_desc));
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@ -1725,6 +1725,15 @@ static int
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ti_init_tx_ring(sc)
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struct ti_softc *sc;
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{
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struct ti_txdesc *txd;
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int i;
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STAILQ_INIT(&sc->ti_cdata.ti_txfreeq);
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STAILQ_INIT(&sc->ti_cdata.ti_txbusyq);
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for (i = 0; i < TI_TX_RING_CNT; i++) {
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txd = &sc->ti_cdata.ti_txdesc[i];
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STAILQ_INSERT_TAIL(&sc->ti_cdata.ti_txfreeq, txd, tx_q);
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}
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sc->ti_txcnt = 0;
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sc->ti_tx_saved_considx = 0;
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sc->ti_tx_saved_prodidx = 0;
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@ -2826,44 +2835,47 @@ static void
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ti_txeof(sc)
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struct ti_softc *sc;
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{
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struct ti_txdesc *txd;
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struct ti_tx_desc txdesc;
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struct ti_tx_desc *cur_tx = NULL;
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struct ifnet *ifp;
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bus_dmamap_t map;
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int idx;
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ifp = sc->ti_ifp;
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txd = STAILQ_FIRST(&sc->ti_cdata.ti_txbusyq);
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if (txd == NULL)
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return;
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/*
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* Go through our tx ring and free mbufs for those
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* frames that have been sent.
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*/
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while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) {
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u_int32_t idx = 0;
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struct ti_tx_desc txdesc;
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idx = sc->ti_tx_saved_considx;
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for (idx = sc->ti_tx_saved_considx; idx != sc->ti_tx_considx.ti_idx;
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TI_INC(idx, TI_TX_RING_CNT)) {
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if (sc->ti_hwrev == TI_HWREV_TIGON) {
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ti_mem_read(sc, TI_TX_RING_BASE + idx * sizeof(txdesc),
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sizeof(txdesc), &txdesc);
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cur_tx = &txdesc;
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} else
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cur_tx = &sc->ti_rdata->ti_tx_ring[idx];
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if (cur_tx->ti_flags & TI_BDFLAG_END)
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ifp->if_opackets++;
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if (sc->ti_cdata.ti_tx_chain[idx] != NULL) {
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m_freem(sc->ti_cdata.ti_tx_chain[idx]);
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sc->ti_cdata.ti_tx_chain[idx] = NULL;
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map = sc->ti_cdata.ti_tx_maps[idx];
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bus_dmamap_sync(sc->ti_mbuftx_dmat, map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->ti_mbuftx_dmat, map);
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}
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sc->ti_txcnt--;
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TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT);
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ifp->if_timer = 0;
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}
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if (cur_tx != NULL)
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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if ((cur_tx->ti_flags & TI_BDFLAG_END) == 0)
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continue;
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bus_dmamap_sync(sc->ti_mbuftx_dmat, txd->tx_dmamap,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(sc->ti_mbuftx_dmat, txd->tx_dmamap);
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ifp->if_opackets++;
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m_freem(txd->tx_m);
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txd->tx_m = NULL;
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STAILQ_REMOVE_HEAD(&sc->ti_cdata.ti_txbusyq, tx_q);
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STAILQ_INSERT_TAIL(&sc->ti_cdata.ti_txfreeq, txd, tx_q);
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txd = STAILQ_FIRST(&sc->ti_cdata.ti_txbusyq);
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}
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sc->ti_tx_saved_considx = idx;
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ifp->if_timer = sc->ti_txcnt > 0 ? 5 : 0;
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}
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static void
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@ -2931,68 +2943,86 @@ ti_stats_update(sc)
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BUS_DMASYNC_PREREAD);
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}
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struct ti_dmamap_arg {
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struct ti_softc *sc;
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struct m_tag *mtag;
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struct mbuf *m_head;
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u_int16_t csum_flags;
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int idx;
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int error;
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};
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static void
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ti_encap_cb(arg, segs, nseg, mapsize, error)
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void *arg;
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bus_dma_segment_t *segs;
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int nseg;
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bus_size_t mapsize;
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int error;
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{
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/*
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* Encapsulate an mbuf chain in the tx ring by coupling the mbuf data
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* pointers to descriptors.
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*/
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static int
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ti_encap(sc, m_head)
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struct ti_softc *sc;
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struct ti_dmamap_arg *ctx;
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struct ti_tx_desc *f = NULL;
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struct mbuf **m_head;
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{
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struct ti_txdesc *txd;
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struct ti_tx_desc *f;
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struct ti_tx_desc txdesc;
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struct mbuf *m, *n;
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struct m_tag *mtag;
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u_int32_t frag, cur, cnt = 0;
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bus_dma_segment_t txsegs[TI_MAXTXSEGS];
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u_int16_t csum_flags;
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int error, frag, i, nseg;
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if (error)
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return;
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if ((txd = STAILQ_FIRST(&sc->ti_cdata.ti_txfreeq)) == NULL)
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return (ENOBUFS);
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ctx = (struct ti_dmamap_arg *)arg;
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sc = ctx->sc;
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cur = frag = ctx->idx;
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mtag = ctx->mtag;
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csum_flags = ctx->csum_flags;
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/*
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* Sanity check: avoid coming within 16 descriptors
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* of the end of the ring.
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*/
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if ((TI_TX_RING_CNT - (sc->ti_txcnt + nseg)) < 16) {
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ctx->error = ENOBUFS;
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return;
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m = *m_head;
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csum_flags = 0;
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if (m->m_pkthdr.csum_flags) {
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if (m->m_pkthdr.csum_flags & CSUM_IP)
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csum_flags |= TI_BDFLAG_IP_CKSUM;
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if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP))
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csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM;
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if (m->m_flags & M_LASTFRAG)
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csum_flags |= TI_BDFLAG_IP_FRAG_END;
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else if (m->m_flags & M_FRAG)
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csum_flags |= TI_BDFLAG_IP_FRAG;
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}
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/*
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* Start packing the mbufs in this chain into
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* the fragment pointers. Stop when we run out
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* of fragments or hit the end of the mbuf chain.
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*/
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while (nseg-- > 0) {
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error = bus_dmamap_load_mbuf_sg(sc->ti_mbuftx_dmat, txd->tx_dmamap,
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m, txsegs, &nseg, 0);
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if (error == EFBIG) {
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n = m_defrag(m, M_DONTWAIT);
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if (n == NULL) {
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m_freem(m);
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m = NULL;
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return (ENOMEM);
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}
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m = n;
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error = bus_dmamap_load_mbuf_sg(sc->ti_mbuftx_dmat,
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txd->tx_dmamap, m, txsegs, &nseg, 0);
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if (error) {
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m_freem(m);
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m = NULL;
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return (error);
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}
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} else if (error != 0)
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return (error);
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if (nseg == 0) {
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m_freem(m);
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m = NULL;
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return (EIO);
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}
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if (sc->ti_txcnt + nseg >= TI_TX_RING_CNT) {
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bus_dmamap_unload(sc->ti_mbuftx_dmat, txd->tx_dmamap);
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return (ENOBUFS);
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}
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bus_dmamap_sync(sc->ti_mbuftx_dmat, txd->tx_dmamap,
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BUS_DMASYNC_PREWRITE);
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bus_dmamap_sync(sc->ti_rdata_dmat, sc->ti_rdata_dmamap,
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BUS_DMASYNC_PREWRITE);
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mtag = VLAN_OUTPUT_TAG(sc->ti_ifp, m);
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frag = sc->ti_tx_saved_prodidx;
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for (i = 0; i < nseg; i++) {
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if (sc->ti_hwrev == TI_HWREV_TIGON) {
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bzero(&txdesc, sizeof(txdesc));
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f = &txdesc;
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} else
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f = &sc->ti_rdata->ti_tx_ring[frag];
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if (sc->ti_cdata.ti_tx_chain[frag] != NULL) {
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ctx->error = ENOBUFS;
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return;
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}
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ti_hostaddr64(&f->ti_addr, segs[cnt].ds_addr);
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f->ti_len = segs[cnt].ds_len;
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ti_hostaddr64(&f->ti_addr, txsegs[i].ds_addr);
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f->ti_len = txsegs[i].ds_len;
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f->ti_flags = csum_flags;
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if (mtag != NULL) {
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f->ti_flags |= TI_BDFLAG_VLAN_TAG;
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f->ti_vlan_tag = VLAN_TAG_VALUE(mtag) & 0xfff;
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@ -3003,77 +3033,24 @@ ti_encap_cb(arg, segs, nseg, mapsize, error)
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if (sc->ti_hwrev == TI_HWREV_TIGON)
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ti_mem_write(sc, TI_TX_RING_BASE + frag *
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sizeof(txdesc), sizeof(txdesc), &txdesc);
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cur = frag;
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TI_INC(frag, TI_TX_RING_CNT);
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cnt++;
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}
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sc->ti_tx_saved_prodidx = frag;
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/* set TI_BDFLAG_END on the last descriptor */
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frag = (frag + TI_TX_RING_CNT - 1) % TI_TX_RING_CNT;
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if (sc->ti_hwrev == TI_HWREV_TIGON) {
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txdesc.ti_flags |= TI_BDFLAG_END;
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ti_mem_write(sc, TI_TX_RING_BASE + cur * sizeof(txdesc),
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ti_mem_write(sc, TI_TX_RING_BASE + frag * sizeof(txdesc),
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sizeof(txdesc), &txdesc);
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} else
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sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
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sc->ti_cdata.ti_tx_chain[cur] = ctx->m_head;
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sc->ti_txcnt += cnt;
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ctx->idx = frag;
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ctx->error = 0;
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}
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sc->ti_rdata->ti_tx_ring[frag].ti_flags |= TI_BDFLAG_END;
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/*
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* Encapsulate an mbuf chain in the tx ring by coupling the mbuf data
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* pointers to descriptors.
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*/
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static int
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ti_encap(sc, m_head, txidx)
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struct ti_softc *sc;
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struct mbuf *m_head;
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u_int32_t *txidx;
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{
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bus_dmamap_t map;
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struct ti_dmamap_arg ctx;
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u_int32_t frag, cnt;
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u_int16_t csum_flags = 0;
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int error;
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STAILQ_REMOVE_HEAD(&sc->ti_cdata.ti_txfreeq, tx_q);
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STAILQ_INSERT_TAIL(&sc->ti_cdata.ti_txbusyq, txd, tx_q);
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txd->tx_m = m;
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sc->ti_txcnt += nseg;
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frag = *txidx;
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if (m_head->m_pkthdr.csum_flags) {
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if (m_head->m_pkthdr.csum_flags & CSUM_IP)
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csum_flags |= TI_BDFLAG_IP_CKSUM;
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if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP))
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csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM;
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if (m_head->m_flags & M_LASTFRAG)
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csum_flags |= TI_BDFLAG_IP_FRAG_END;
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else if (m_head->m_flags & M_FRAG)
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csum_flags |= TI_BDFLAG_IP_FRAG;
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}
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ctx.sc = sc;
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ctx.idx = frag;
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ctx.csum_flags = csum_flags;
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ctx.mtag = VLAN_OUTPUT_TAG(sc->ti_ifp, m_head);
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ctx.m_head = m_head;
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map = sc->ti_cdata.ti_tx_maps[frag];
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error = bus_dmamap_load_mbuf(sc->ti_mbuftx_dmat, map, m_head,
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ti_encap_cb, &ctx, 0);
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if (error)
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return (ENOBUFS);
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cnt = ctx.idx - frag;
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frag = ctx.idx;
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if ((ctx.error != 0) || (frag == sc->ti_tx_saved_considx)) {
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bus_dmamap_unload(sc->ti_mbuftx_dmat, map);
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return (ENOBUFS);
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}
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|
||||
bus_dmamap_sync(sc->ti_mbuftx_dmat, map, BUS_DMASYNC_PREWRITE);
|
||||
bus_dmamap_sync(sc->ti_rdata_dmat, sc->ti_rdata_dmamap,
|
||||
BUS_DMASYNC_PREWRITE);
|
||||
*txidx = frag;
|
||||
return (0);
|
||||
}
|
||||
|
||||
@ -3099,13 +3076,12 @@ ti_start_locked(ifp)
|
||||
{
|
||||
struct ti_softc *sc;
|
||||
struct mbuf *m_head = NULL;
|
||||
u_int32_t prodidx = 0;
|
||||
int enq = 0;
|
||||
|
||||
sc = ifp->if_softc;
|
||||
|
||||
prodidx = sc->ti_tx_saved_prodidx;
|
||||
|
||||
while (sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
|
||||
for (; ifp->if_snd.ifq_head != NULL &&
|
||||
sc->ti_txcnt < (TI_TX_RING_CNT - 16);) {
|
||||
IF_DEQUEUE(&ifp->if_snd, m_head);
|
||||
if (m_head == NULL)
|
||||
break;
|
||||
@ -3133,12 +3109,15 @@ ti_start_locked(ifp)
|
||||
* don't have room, set the OACTIVE flag and wait
|
||||
* for the NIC to drain the ring.
|
||||
*/
|
||||
if (ti_encap(sc, m_head, &prodidx)) {
|
||||
if (ti_encap(sc, &m_head)) {
|
||||
if (m_head == NULL)
|
||||
break;
|
||||
IF_PREPEND(&ifp->if_snd, m_head);
|
||||
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
||||
break;
|
||||
}
|
||||
|
||||
enq++;
|
||||
/*
|
||||
* If there's a BPF listener, bounce a copy of this frame
|
||||
* to him.
|
||||
@ -3146,14 +3125,15 @@ ti_start_locked(ifp)
|
||||
BPF_MTAP(ifp, m_head);
|
||||
}
|
||||
|
||||
/* Transmit */
|
||||
sc->ti_tx_saved_prodidx = prodidx;
|
||||
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx);
|
||||
if (enq > 0) {
|
||||
/* Transmit */
|
||||
CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, sc->ti_tx_saved_prodidx);
|
||||
|
||||
/*
|
||||
* Set a timeout in case the chip goes out to lunch.
|
||||
*/
|
||||
ifp->if_timer = 5;
|
||||
/*
|
||||
* Set a timeout in case the chip goes out to lunch.
|
||||
*/
|
||||
ifp->if_timer = 5;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -399,7 +399,7 @@
|
||||
#define TI_MINI_RX_RING_CNT 1024
|
||||
#define TI_RETURN_RING_CNT 2048
|
||||
|
||||
#define TI_MAXTXSEGS 128
|
||||
#define TI_MAXTXSEGS 32
|
||||
|
||||
/*
|
||||
* Possible TX ring sizes.
|
||||
@ -904,6 +904,14 @@ struct ti_event_desc {
|
||||
#define TI_RESID (TI_JPAGESZ - (TI_JLEN * TI_JSLOTS) % TI_JPAGESZ)
|
||||
#define TI_JMEM ((TI_JLEN * TI_JSLOTS) + TI_RESID)
|
||||
|
||||
struct ti_txdesc {
|
||||
struct mbuf *tx_m;
|
||||
bus_dmamap_t tx_dmamap;
|
||||
STAILQ_ENTRY(ti_txdesc) tx_q;
|
||||
};
|
||||
|
||||
STAILQ_HEAD(ti_txdq, ti_txdesc);
|
||||
|
||||
/*
|
||||
* Ring structures. Most of these reside in host memory and we tell
|
||||
* the NIC where they are via the ring control blocks. The exceptions
|
||||
@ -942,8 +950,9 @@ struct ti_ring_data {
|
||||
* not the other way around.
|
||||
*/
|
||||
struct ti_chain_data {
|
||||
struct mbuf *ti_tx_chain[TI_TX_RING_CNT];
|
||||
bus_dmamap_t ti_tx_maps[TI_TX_RING_CNT];
|
||||
struct ti_txdesc ti_txdesc[TI_TX_RING_CNT];
|
||||
struct ti_txdq ti_txfreeq;
|
||||
struct ti_txdq ti_txbusyq;
|
||||
struct mbuf *ti_rx_std_chain[TI_STD_RX_RING_CNT];
|
||||
bus_dmamap_t ti_rx_std_maps[TI_STD_RX_RING_CNT];
|
||||
struct mbuf *ti_rx_jumbo_chain[TI_JUMBO_RX_RING_CNT];
|
||||
@ -1009,14 +1018,14 @@ struct ti_softc {
|
||||
#define ti_ev_prodidx ti_rdata->ti_ev_prodidx_r
|
||||
#define ti_return_prodidx ti_rdata->ti_return_prodidx_r
|
||||
#define ti_tx_considx ti_rdata->ti_tx_considx_r
|
||||
u_int16_t ti_tx_saved_prodidx;
|
||||
u_int16_t ti_tx_saved_considx;
|
||||
u_int16_t ti_rx_saved_considx;
|
||||
u_int16_t ti_ev_saved_considx;
|
||||
u_int16_t ti_cmd_saved_prodidx;
|
||||
u_int16_t ti_std; /* current std ring head */
|
||||
u_int16_t ti_mini; /* current mini ring head */
|
||||
u_int16_t ti_jumbo; /* current jumo ring head */
|
||||
int ti_tx_saved_prodidx;
|
||||
int ti_tx_saved_considx;
|
||||
int ti_rx_saved_considx;
|
||||
int ti_ev_saved_considx;
|
||||
int ti_cmd_saved_prodidx;
|
||||
int ti_std; /* current std ring head */
|
||||
int ti_mini; /* current mini ring head */
|
||||
int ti_jumbo; /* current jumo ring head */
|
||||
SLIST_HEAD(__ti_mchead, ti_mc_entry) ti_mc_listhead;
|
||||
SLIST_HEAD(__ti_jfreehead, ti_jpool_entry) ti_jfree_listhead;
|
||||
SLIST_HEAD(__ti_jinusehead, ti_jpool_entry) ti_jinuse_listhead;
|
||||
|
Loading…
x
Reference in New Issue
Block a user