Commit Graph

7 Commits

Author SHA1 Message Date
Adrian Chadd
6130ff50fb Setup the CPU port and broadcast map on the AR7240, rather than
depending upon the bootloader initialising it.

The aim is to eventually support a full switch set and reinitialisation
rather than relying on a consistent bootloader setup.

Remove the port flood config from arswitch.c, it's not yet used and
it's totally incorrect.

Whilst I'm here, also add in a comment describing why the full switch
reset is disabled.

Obtained from:	Linux (OpenWRT) - Values
2012-05-12 21:08:07 +00:00
Adrian Chadd
22814a7515 .. oops, include setting the MTU. 2012-05-12 20:40:13 +00:00
Adrian Chadd
031f3eaed4 Document what the flood register setting does. 2012-05-12 20:39:41 +00:00
Adrian Chadd
2015605e8d * Add in the AR7240 global control field for setting the maximum frame
size for the AR7240.

* Include SM/MS macros, thanks to ath_hal(4).

* This field is for normal packets, VLAN and other headers are added to
  this by the switch device.

* Set the MTU to 1536, to match what is done in Linux.  Use the SM
  macro to write this field.

Obtained from:	Atheros (AR7240 datasheet), Linux OpenWRT (MTU default)
2012-05-12 20:36:12 +00:00
Adrian Chadd
67a8db4dba * Remove the AR7240 register defines and reuse the AR8x16 defines.
* Include a new register define to represent "disable port mirroring
  to CPU port".

Obtained from:	Patrick Kelsey <kelsey@ieee.org>
2012-05-12 06:24:21 +00:00
Adrian Chadd
27a2ecaa9a Further arswitch work:
* Add in the AR724x support.  It probes the same as an AR8216/AR8316, so
  just add in a hint to force the probe success rather than auto-detecting
  it.

* Add in the missing entries from conf/files, lacking in the previous
  commit.

The register values and CPU port / mirror port initialisation value was
obtained from Linux OpenWRT ag71xx_ar7240.c.

The DELAY(1000) to let things settle is my local workaround.  For some
reason, PHY4 doesn't seem to probe very reliably without it.  It's quite
possible that we're missing some MDIO bus initialisation code in if_arge
for the AR724x case.  As I dislike DELAY() workarounds in general, it's
definitely worth trying to figure out why this is the case.

Tested on:	AP93 (AR7240) reference design

Obtained from:	Linux OpenWRT
2012-05-12 05:26:49 +00:00
Adrian Chadd
a043e8c76b Commit the first pass of the etherswitch support.
This is designed to support the very basic ethernet switch chip behaviour,
specifically:

* accessing switch register space;
* accessing per-PHY registers (for switches that actually expose PHYs);
* basic vlan group support, which applies for the rtl8366 driver but not
  for the atheros switches.

This also includes initial support for:

* rtl8366rb support - which is a 10/100/1000 switch which supports
  vlan groups;
* Initial Atheros AR8316 switch support - which is a 10/100/1000 switch
  which supports an alternate vlan configuration (so the vlan group
  methods are stubbed.)

The general idea here is that the switch driver may speak to a variety of
backend busses (mdio, i2c, spi, whatever) and expose:

* If applicable, one or more MDIO busses which ethernet interfaces can
  then attach PHYs to via miiproxy/mdioproxy;

* exposes miibusses, one for each port at the moment, so ..

* .. a PHY can be exposed on each miibus, for each switch port, with all
  of the existing MII/ifnet framework.

However:

* The ifnet is manually created for now, and it isn't linked into the
  interface list, nor can you (currently) send/receive frames on this ifnet.
  At some point in the future there may be _some_ support for this, for
  switches with a multi-port, isolated mode.

* I'm still in the process of sorting out correct(er) locking.

TODO:

* ray's switch code in zrouter (zrouter.org) includes a much more developed
  newbus API that covers the various switch methods, as well as a
  capability API so drivers, the switch layer and the userland utility
  can properly control the subset of supported features.

  The plan is to sort that out later, once the rest of ray's switch drivers
  are brought over and extended to export MII busses and PHYs.

Submitted by:	Stefan Bethke <stb@lassitu.de>
Reviewed by:	ray
2012-05-11 20:53:20 +00:00