719 Commits

Author SHA1 Message Date
mw
3d41e80ced Enable UART support for Xilinx Ultrascale+ SoCs
Xilinx Ultrascale+ are based on Cortex-A53 and use existing
UART driver (uart_dev_cdnc). Enable it in arm64 GENERIC config.

Submitted by: Michal Stanek <mst@semihalf.com>
Obtained from: Semihalf
2018-07-13 19:54:22 +00:00
wma
46d1d55afb ARM64: Add ThunderX2 CPU revision macro. Add ThunderX2 name in identcpu.c
Submitted by:          Patryk Duda <pdk@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Cavium
2018-07-09 08:41:54 +00:00
markj
9baa4fcab2 Reuse the PV entry when updating a mapping in pmap_enter().
This addresses a problem described in r335784, where memory
pressure forces reclamation of a PV chunk and in rare cases leads to a
use-after-free of a page table page.

Reviewed by:	alc, kib
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D16181
2018-07-08 20:38:46 +00:00
jhb
465d5a960e Export a breakpoint() function to userland for arm and arm64.
Enable ptrace() tests using breakpoint() on these architectures.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D15191
2018-07-06 23:49:17 +00:00
emaste
d0467c6843 Regen arm64 linux sysent after r336043 2018-07-06 19:47:09 +00:00
emaste
517445735e Fix arm64 linuxulator clone() argument order
Linux/arm64 is CLONE_BACKWARDS - i.e., "Architecture has tls passed as
the 4th argument of clone(2), not the 5th one."

The linux clone() syscall has four different permutations of argument
order, depending on architecture - see the #ifdef CONFIG_CLONE_BACKWARDS
maze in Linux's kernel/fork.c.

Sponsored by:	Turing Robotic Industries
2018-07-06 19:44:49 +00:00
mmacy
ff20311f27 Back pcpu zone with domain correct pages
- Change pcpu zone consumers to use a stride size of PAGE_SIZE.
  (defined as UMA_PCPU_ALLOC_SIZE to make future identification easier)

- Allocate page from the correct domain for a given cpu.

- Don't initialize pc_domain to non-zero value if NUMA is not defined
  There are some misconceptions surrounding this field. It is the
  _VM_ NUMA domain and should only ever correspond to valid domain
  values as understood by the VM.

The former slab size of sizeof(struct pcpu) was somewhat arbitrary.
The new value is PAGE_SIZE because that's the smallest granularity
which the VM can allocate a slab for a given domain. If you have
fewer than PAGE_SIZE/8 counters on your system there will be some
memory wasted, but this is obviously something where you want the
cache line to be coming from the correct domain.

Reviewed by: jeff
Sponsored by: Limelight Networks
Differential Revision:  https://reviews.freebsd.org/D15933
2018-07-06 02:06:03 +00:00
emaste
2c07601d95 Add stub arm64 linuxulator VDSO ldscript
This needs to be revisited with the VDSO implementation, but is
sufficient to allow the linux64 module to build on arm64 for testing
and development.

Sponsored by:	Turing Robotic Industries
2018-06-28 20:36:21 +00:00
andrew
2f3f042a26 Make cpu_set_syscall_retval common between the existing FreeBSD ABI and
the Linuxulator. We need to translate error values onto Linux errno values
and return them to userspace when a syscall fails. We also need to preserve
x1 as all registers are preserved other than the return value.

Reviewed by:	emaste
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D16008
2018-06-25 22:36:25 +00:00
emaste
f5a48c7673 Initial arm64 linuxulator linux_sysvec
This is sufficient to run Linux arm64 'hello world' and other simple
binaries.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15834
2018-06-25 14:12:33 +00:00
markj
c9e59b6914 Re-count available PV entries after reclaiming a PV chunk.
The call to reclaim_pv_chunk() in reserve_pv_entries() may free a
PV chunk with free entries belonging to the current pmap.  In this
case we must account for the free entries that were reclaimed, or
reserve_pv_entries() may return without having reserved the requested
number of entries.

Reviewed by:	alc, kib
Tested by:	pho (previous version)
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D15911
2018-06-23 10:41:52 +00:00
manu
b5d43b277c Add pmap_mapdev_attr for arm64
This is needed for efifb.
arm and ricv pmap (the two arch with arm64 that uses subr_devmap) have very
different implementation so for now only add this for arm64.

Tested with efifb on Pine64 with a few other patches.

Reviewed by:	cognet
Differential Revision:	https://reviews.freebsd.org/D15294
2018-06-20 16:07:35 +00:00
manu
f1972c21ab if_rk_dwc: Disable setting delays for now
The values for tx/rx delays differs accross the different DTS.
Mainline Linux set it to 0x24/0x18
Mostly-Vendor u-boot (the one maintained and developped) to 0x18/0x18
Mostly-Vendor linux (the one maintained and developped) to 0x26/0x11

By experience only 0x18/0x18 works so until the issue is resolved rely on
the bootloader settings.
2018-06-20 15:27:09 +00:00
manu
81b8419c39 rk_gpio: Read the correct register for gpio read
Reported by:	jmcneill
2018-06-20 14:46:07 +00:00
manu
31dbcedad5 if_rk_dwc: Fix delays handling
The property are named {t,r}x_delay and not {t,r}-delay.
The upper bits of the register are a mask of which bits is allowed
to be written, set it otherwise we write nothing.
OF_getencprop returns <0 = for an error.

Pointy Hat: myself
Reported by:	jmcneill (delay and mask bits)
2018-06-20 14:45:26 +00:00
andrew
36cf4d2a9c Move common GIC interrupt numbers to the common header. These are the same
across the GICv2 and GICv3 drivers so we only need a single copy of them.

Sponsored by:	Turing Robotic Industries
2018-06-19 16:14:23 +00:00
emaste
54a64dc160 Introduce arm64 linuxulator stubs
This provides stub implementations of arm64 Linux vdso and machdep,
ptrace, and futex sufficient for executing an arm64 Linux 'hello world'
binary.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15832
2018-06-18 19:34:34 +00:00
emaste
9c4fe6a8d5 Regen arm64 linuxulator sysent files after r335323 2018-06-18 18:10:11 +00:00
emaste
bda5b7d314 arm64 linuxulator: add dup syscall entry
Missed in r333027

Sponsored by:	Turing Robotic Industries Inc.
2018-06-18 18:08:19 +00:00
emaste
815c9f6cea arm64 linuxulator: add linux_dummy.c based on amd64
A later change should deduplicate the multiple copies of this file.

Sponsored by:	Turing Robotic Industries
2018-06-15 19:42:52 +00:00
emaste
5cdfe055c6 arm64: add arm64 linux.h based on i386 linuxulator and Linux headers
Sponsored by:	Turing Robotic Industries
2018-06-15 19:09:17 +00:00
manu
bdbf491b8e rk_i2c: Add driver for the I2C controller present in RockChip SoC
This controller have a special mode for RX to help with smbus-like transfer
when the controller will automatically send the slave address, register address
and read the data. Use it when possible.
The same mode for TX is describe is the datasheet but is broken and have been
since ~10 years of presence of this controller in RockChip SoCs.

Attach this driver early at we need it to communicate with the PMIC early in the
boot.
Do not hook it to the kernel build for now.
2018-06-14 06:39:33 +00:00
manu
dfb0491780 rk3328: Add support for the i2c clocks 2018-06-14 06:34:27 +00:00
manu
653ad25d24 if_dwc_rk: Add DesignWare driver for RockChip SoCs.
Add driver for the designware ethernet controller found in some RockChip SoCs.
The driver still rely on a lot of things setup by the bootloader like clocks
and phy mode.
But since netbooting is the only/easiest way to boot rockchip board at the
moment add the driver so other people can test/dev on thoses boards.
2018-06-14 06:28:09 +00:00
manu
75f4cd0c54 rk_armclk: Add the write mask to the register mux value
This was omitted in r334112 and r334996 which cause the PLL to not correctly
reparent, leaving the armclk to be derived from the APLL instead of the NPLL.
The arm core clock is now correctly set to 600Mhz via the assigned-clock present
in the DTB.
2018-06-14 05:46:57 +00:00
manu
2cdc563676 rk_pll: Add support for mode
RockChip PLL have two modes controlled by a register, a "slow mode" (the
default one) where the frequency is derived from the 24Mhz oscillator on the
board, and a "normal" one when the pll take it's input from the real PLL output.

Default the mode to normal for all the PLLs.
2018-06-14 05:43:45 +00:00
manu
bb5d08a4d0 rk_pinctrl: Only add gpio subnode
This is the only node we are interested in so do not waste time to test
creating device that will be either unused or fail as most of the nodes
don't have a compatible string.
2018-06-14 05:41:16 +00:00
andrew
299ca601ae Add ThunderX2 to the list of CPUs we need to apply the branch predictor
hardening to.

Sponsored by:	DARPA, AFRL
2018-06-13 15:58:33 +00:00
andrew
5250c7456e Switch to the SMCCC function for branch predictor hardening. The previous
method may not have worked as the firmware checks for the ARCH_WORKAROUND_1
function ID.

Sponsored by:	DARPA, AFRL
2018-06-13 15:56:24 +00:00
andrew
9e420665b6 Rename the ThunderX CPU identification macros to include the X. This is the
name people know the product by, and is consistent with the later SoC ID
macros.

Sponsored by:	DARPA, AFRL
2018-06-13 12:17:11 +00:00
andrew
d7f77d3639 Add more Cavium CPU part numbers.
While here split the lists by vendor.

Sponsored by:	DARPA, AFRL
2018-06-13 11:58:41 +00:00
db
5cacb41edf Add a driver for the BCM2835 Mini-UART as seen on the RPi3
Reviewed by:	andrew
Approved by:	andrew
Differential Revision:	https://reviews.freebsd.org/D15684
2018-06-12 13:26:31 +00:00
manu
ce93b4cba0 arm64: rockchip: Correctly set armclk
Parent needs to be the same frequency as the armclk, not twice the freq.
The real divider is incremented by one so write it with - 1
The rate can be at index 0

Pointy Hat To: myself
2018-06-12 11:47:21 +00:00
andrew
128c3e8914 Remove the psci option from arm64. It is now a standard option as it is
required to boot correctly.

Sponsored by:	DARPA, AFRL
2018-06-10 19:42:44 +00:00
andrew
957e7993d4 Clean up handling of unexpected exceptions. Previously we would issue a
breakpoint instruction, however this would lose information that may be
useful for debugging.

These are now handled in a similar way to other exceptions, however it
won't exit out of the exception handler until it is known if we can
handle these exceptions in a useful way.

Sponsored by:	DARPA, AFRL
2018-06-10 16:21:21 +00:00
kib
11ea0b8f38 Restore release semantic for the old thread unlock on arm64.
With the introduction of pmap_switch(), the DSB instruction on the
address map switch is not necessary executed, which is fixed by
changing the unlock store to release.  Also remove comment which
documented pre-pmap_switch() code.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-06-08 18:32:26 +00:00
kevlo
8635cba20a Since we don't enable BUF_TRACKING and FULL_BUF_TRACKING buffer debugging
options in GENERIC kernels on arm and arm64, there's no need to disable
them.

Sponsored by:	MSI/FUNTORO
2018-06-05 05:24:42 +00:00
andrew
f358ddbed7 Move the code to print the EFI memory table to a new function and call it
in teh bootverbose path after cninit().

This allows users to see these tables when booting with boot -v.

Sponsored by:	DARPA, AFRL
2018-05-31 12:37:34 +00:00
andrew
0d79c92b37 Fix the early spelling of bootverbose.
Sponsored by:	DARPA, AFRL
2018-05-31 11:53:46 +00:00
andrew
a5b9b01ec3 Fix the memory attribute for EFI_MD_ATTR_UC on arm64.
This is defined as Device-nGnRnE in the UEFI spec (UEFI 2.4, section
2.3.6.1). This is the VM_MEMATTR_DEVICE type in FreeBSD.

Reported by:	tuexen
Sponsored by:	DARPA, AFRL
2018-05-31 11:11:23 +00:00
andrew
6e1d336d8e Remove max_pa, it's unused.
Sponsored by:	DARPA, AFRL
2018-05-30 15:37:09 +00:00
andrew
c118994f1b Further limit when we call pmap_fault.
We should only call pmap_fault in the kernel when accessing a userspace
address. As this should always happen through specific functions that set
a fault handler we can use this to limit calls to pmap_fault to when this
is set.

This should help with NULL pointer dereferences when we are unable to sleep
so we fall into the correct case.

Sponsored by:	DARPA, AFRL
2018-05-30 15:25:48 +00:00
andrew
b9da38390c Push down the locking in pmap_fault to just be around the calls to
arm64_address_translate_*. There is no need to lock around the switch
statement as we only care about a few cases.

Sponsored by:	DARPA, AFRL
2018-05-30 14:18:19 +00:00
andrew
a389f73841 On ThunderX2 we need to be careful to only map the memory the firmware
lists in the EFI memory map. As such we need to reduce the mappings to
restrict them to not be the full 1G block. For now reduce this to a 2M
block, however this may be further restricted to be 4k page aligned as
other SoCs may require.

This allows ThunderX2 to boot reliably to userspace without performing
any speculative memory accesses to invalid physical memory.

This is a recommit of r334035 now that we can access the EFI Runtime data
through the DMAP region.

Tested by:	tuexen
Sponsored by:	DARPA, AFRL
2018-05-29 13:52:25 +00:00
manu
598fd1c558 arm64: fix atomic_fcmpset_16
newval needs to be uint16_t

Reported by:	andrew
2018-05-28 21:05:00 +00:00
manu
99ece95da0 arm64: Add atomic_fcmpset_8 and atomic_fcmpset_16
Reviewed by:	cognet
2018-05-28 20:29:03 +00:00
andrew
8a9c29613a Create a new function to walk the EFI memory table & run a callback for
each entry. We can then use this to ensure the RunTime data is mapped in
the DMAP, but not in phys_avail.

Sponsored by:	DARPA, AFRL
2018-05-28 17:09:29 +00:00
andrew
ab7acde2c2 Remove physmap from the arm64 machdep.h. This was missed in r334162. 2018-05-24 16:07:47 +00:00
andrew
efd8540f2e Allow us to read the physmap data into our own array and use this to build
the DMAP region on arm64.

We already have the needed information to build these tables, we just need
to extract it. This significantly simplifies the code.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-24 15:32:49 +00:00
andrew
a9a76a3a09 Print the physmem tables under a verbose boot.
Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-24 15:07:53 +00:00