Commit Graph

96648 Commits

Author SHA1 Message Date
kib
060b76c803 Do not call the VOP_LOOKUP() for the doomed directory vnode. The
vnode could be reclaimed while lock upgrade was performed.

Sponsored by:	The FreeBSD Foundation
Reported and tested by:	pho
Diagnosed and reviewed by:	rmacklem
MFC after:	1 week
2013-04-01 09:59:38 +00:00
kib
14e47b8577 Record the correct error in the trace.
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2013-04-01 09:57:46 +00:00
kib
7ada0d9324 Strip the unnneeded spaces, mostly at the end of lines.
MFC after:	3 days
2013-04-01 09:56:48 +00:00
ian
5b38501da6 Fix low-level uart drivers that set their fifo sizes in the softc too late.
uart(4) allocates send and receiver buffers in attach() before it calls
the low-level driver's attach routine.  Many low-level drivers set the
fifo sizes in their attach routine, which is too late.  Other drivers set
them in the probe() routine, so that they're available when uart(4)
allocates buffers.  This fixes the ones that were setting the values too
late by moving the code to probe().
2013-04-01 00:44:20 +00:00
ian
720da1df6b Enable hardware flow control and high speed bulk data transfer in at91 uarts.
Changes to make rtc/cts flow control work...

This does not turn on the builtin hardware flow control on the SoC's usart
device, because that doesn't work on uart1 due to a chip erratum (they
forgot to wire up pin PA21 to RTS0 internally).  Instead it uses the
hardware flow control logic where the tty layer calls the driver to assert
and de-assert the flow control lines as needed.  This prevents overruns at
the tty layer (app doesn't read fast enough), but does nothing for overruns
at the driver layer (interrupts not serviced fast enough).

To work around the wiring problem with RTS0, the driver reassigns that pin
as a GPIO and controls it manually.  It only does so if given permission via
hint.uart.1.use_rts0_workaround=1, to prevent accidentally driving the pin
if uart1 is used without flow control (because something not related to
serial IO could be wired to that pin).

In addition to the RTS0 workaround, driver changes were needed in the area
of reading the current set of DCE signals.  A priming read is now done at
attach() time, and the interrupt routine now sets SER_INT_SIGCHG when any
of the DCE signals change.  Without these changes, nothing could ever be
transmitted, because the tty layer thought CTS was de-asserted (when in fact
we had just never read the status register, and the hwsig variable was
init'd to CTS de-asserted).

Changes to support bulk high-speed (230kbps and higher) data reception...

Allow the receive fifo size to be tuned with hint.uart.<dev>.fifo_bytes.
For high speed receive, a fifo size of 1024 works well.  The default is
still 128 bytes if no hint is provided.  Using a value larger than 384
requires a change in dev/uart/uart_core.c to size the intermediate
buffer as MAX(384, 3*sc->sc_rxfifosize).

Recalculate the receive timeout whenever the baud rate changes.  At low
baud rates (19.2kbps and below) the timeout is the number of bits in 2
characters.  At higher speed it's calculated to be 500 microseconds
worth of bits.  The idea is to compromise between being responsive in
interactive situations and not timing out prematurely during a brief
pause in bulk data flow.  The old fixed timeout of 1.5 characters was
just 32 microseconds at 460kbps.

At interrupt time, check for receiver holding register overrun status
and set the corresponding status bit in the return value.

When handling a buffer overrun, get a single buffer emptied and handed
back to the hardware as quickly as possible, then deal with the second
buffer.  This at least minimizes data loss compared to the old logic
that fully processed both buffers before restarting the hardware.

Rewrite the logic for handling buffers after a receive timeout.  The
original author speculated in a comment that there may be a race with
high speed data.  There was, although it was rare.  The code now handles
all three possible scenarios on receive timeout: two empty buffers, one
empty and one partial buffer, or one full and one partial buffer.

Reviewed by:	imp
2013-04-01 00:00:10 +00:00
ian
2b56a5ce50 Accommodate uart devices with large FIFOs (or DMA buffers which amount
to the same thing) by allocating the uart(4) rx buffer based on the
device's rxfifosz rather than using a hard-coded size of 384 bytes.

The  historical 384 byte size is 3 times the largest hard-coded fifo
size in the tree, so use that ratio as a guide and allocate the buffer
as three times rxfifosz, but never smaller than the historical size.
2013-03-31 23:24:04 +00:00
ian
f370876f88 When running on armv6, set alignment checking to modulo-4 mode rather
than modulo-8, because clang emits ldrd and strd instructions for
addresses that are only 4-byte aligned
2013-03-31 22:43:16 +00:00
ian
fea6d14816 When running on armv6, set alignment checking to modulo-4 mode rather
than modulo-8, because clang emits ldrd and strd instructions for
addresses that are only 4-byte aligned.
2013-03-31 22:42:25 +00:00
tuexen
c19a395776 Add a macro for checking for IPv4 link local addresses.
MFC after: 1 week
2013-03-31 18:27:46 +00:00
jilles
9d8a3c5c3b Rename do_pipe() to kern_pipe2() and declare it properly. 2013-03-31 17:42:54 +00:00
ian
1f73a954db Fix a typo in the CF device driver name that prevented instantiation. 2013-03-31 12:51:56 +00:00
neel
39fb54304e Add counter to keep track of the number of timer interrupts generated by
the local apic for each virtual cpu.
2013-03-31 03:56:48 +00:00
neel
9282fffb30 Add some more stats to keep track of all the reasons that a vcpu is exiting. 2013-03-30 17:46:03 +00:00
kientzle
01d37a7164 Initialize sym_count to 0.
This fixes a compiler warning introduced in r248121.
2013-03-30 16:33:16 +00:00
mdf
4c77a4b020 Use a shared lock for VOP_GETEXTATTR, as it is a read-like operation.
MFC after:	1 week
2013-03-30 15:09:04 +00:00
jilles
c0fce542aa Improve namespacing in <sys/socket.h>:
* MSG_NOSIGNAL is in POSIX.1-2008.
 * MSG_NOTIFICATION (SCTP) is not in POSIX.
 * PRU_FLUSH_* (SCTP) are not in POSIX.
 * bindat()/connectat() are not in POSIX.

Discussed with:	rrs (PRU_FLUSH_*)
2013-03-30 13:30:27 +00:00
adrian
48f29e1c7d AR933x CPU device improvements:
* Add baud rate and divisor programming code. See below for more
  information.

* Flesh out ar933x_init() to disable interrupts and program the initial
  console setup.

* Remove #if 0'ed code from ar933x_term().

* Explain what these functions do.

Now, the baud rate and divisor code comes from Linux, as a submission
to the OpenWRT project and Linux kernel from
Gabor Juhos <juhosg@openwrt.org>.

The original ticket for this code is https://dev.openwrt.org/ticket/12031 .

I've contacted Gabor and asked for his permission to also licence the patch
in question (which covers this code) to BSD lience and he's agreed.
Hence why I'm including it here in FreeBSD.

Tested:

* AP121 (AR9330)
2013-03-30 04:31:29 +00:00
adrian
b3c007b431 AR933x UART updates:
* Default clock is 25MHz;
* Remove the UART register macro here - it's not needed as we don't need
  to "adjust" the register offset / spacing at all;
* Remove unused fields in the softc.

Tested:

* AP121
2013-03-30 04:13:47 +00:00
np
3c60e22da7 cxgbe(4): Add support for Chelsio's Terminator 5 (aka T5) ASIC. This
includes support for the NIC and TOE features of the 40G, 10G, and
1G/100M cards based on the T5.

The ASIC is mostly backward compatible with the Terminator 4 so cxgbe(4)
has been updated instead of writing a brand new driver.  T5 cards will
show up as cxl (short for cxlgb) ports attached to the t5nex bus driver.

Sponsored by:	Chelsio
2013-03-30 02:26:20 +00:00
smh
fc36a232b9 Adds the ability to enable / disable sorting of BIO requests queued within
CAM. This can significantly improve performance particularly for SSDs
which don't suffer from seek latencies.

The sysctl / tunable kern.cam.sort_io_queues provides the systems default
setting where:-
0 = queued BIOs are NOT sorted
1 = queued BIOs are sorted (default)

Each device gets its own sysctl kern.cam.<type>.<id>.sort_io_queue
Valid values are:-
-1 = use system default (default)
0 = queued BIOs are NOT sorted
1 = queued BIOs are sorted

Note: Additional patch will look to add automatic use of none sorted queues
for none rotating media e.g. SSD's

Reviewed by:	scottl
Approved by:	pjd (mentor)
MFC after:	2 weeks
2013-03-29 22:58:15 +00:00
emaste
35fe5219ab Keep fwd_tag around for subsequent pcb lookups
For TIMEWAIT handling tcp_input may have to jump back for an additional
pass through pcblookup.  Prior to this change the fwd_tag had been
discarded after the first lookup, so a new connection attempt delivered
locally via 'ipfw fwd' would fail to find a match.

As of r248886 the tag will be detached and freed when passed to the
socket buffer.
2013-03-29 20:51:44 +00:00
jimharris
2128397eaf Add "type" to nvme_request, signifying if its payload is a VADDR, UIO, or
NULL. This simplifies decisions around if/how requests are routed through
busdma.  It also paves the way for supporting unmapped bios.

Sponsored by:	Intel
2013-03-29 20:34:28 +00:00
adrian
d5c182905b Disable this; it's a local option that I haven't yet committed to -HEAD. 2013-03-29 20:07:51 +00:00
ian
f7d5fae7ec Add userland access to at91 gpio functionality via ioctl calls. Also,
add the ability for userland to be notified of changes on gpio pins via
a select(2)/read(2) interface.

Change the interrupt handler from filtered to threaded.

Because of the uiomove() calls in the new interface, change locking from
standard mutex to sx.

Add / restore the at91_gpio_high_z() function.

Reviewed by:	imp (long ago)
2013-03-29 19:52:57 +00:00
ian
581bf19e7b Change the API for at91_pio_gpio_get() to return the entire masked set
of bits, not just a 0/1 indicating whether any of the masked bits are on.
This is compatible with the single in-tree caller of this function right now
(at91_vbus_poll() in dev/usb/controller/at91dci_atemelarm.c).
2013-03-29 19:04:18 +00:00
ian
899ea162b1 Call soc_info.soc_data->soc_clock_init() before at91_pmc_init_clock(), so
that the latter correctly fills in the clock data structures based on
proper hardware-specific shift and mask values from the soc_data structure.
2013-03-29 18:47:08 +00:00
jfv
d3b1490c73 Change the define in the header to eliminate unnecessary data
when using LEGACY TX.
2013-03-29 18:46:13 +00:00
ian
6321d72f7d Add a couple forward declarations, so that board support routines don't have
to pre-include a bunch of header files they don't need just to use this one.
2013-03-29 18:43:10 +00:00
jfv
a4c26abd40 Change defines in the igb driver to allow an easier selection of
the older if_start/non-multiqueue interface from the stack. This
is not the default, but can be turned on in the Makefile now regardless
of the OS level to allow either testing or use of ALTQ.

MFC after: one week
2013-03-29 18:25:45 +00:00
ian
10e285049e Redo the workaround for at91rm9200 erratum #26 in a way that doesn't
cause a lockup on some rm92 hardware.
2013-03-29 18:17:51 +00:00
ian
2d18442bf8 Fix a typo: the RXD0 pin is PA18, not PA19. 2013-03-29 18:06:54 +00:00
jfv
5867d4acf9 Two small fixes:
Set promiscuous code was unconditionally turning off multicast when
  turning off promiscuous mode, this should only be done when there are
  less than MAX groups. Thanks to Mike Karels for this correction.

  Second, the overtmp interrupt setup/detection was wrong, correcting it.

MFC after:	one week
2013-03-29 18:03:00 +00:00
ian
50331a7e74 Remove a really noisy printf left over from debugging hardware errata. 2013-03-29 17:57:24 +00:00
jimharris
f59af79144 Add bus_dmamap_load_bio for non-CAM disk drivers that wish to enable
unmapped I/O.

Sponsored by:	Intel
Reviewed by:	kib
2013-03-29 16:26:25 +00:00
jimharris
5febbe1181 Add CTR5() to bus_dmamap_load_ccb, similar to other bus_dmamap_load_*
functions.

Sponsored by:	Intel
2013-03-29 16:00:16 +00:00
jimharris
60c7cceb4c Do not add 1 to nsegs before passing to CTR5(), since nsegs
has already been incremented before these calls.

Sponsored by:	Intel
2013-03-29 15:54:12 +00:00
jimharris
7e64e1827b Pass correct parameter to CTR5() in bus_dmamap_load_uio.
Sponsored by:	Intel
2013-03-29 15:51:45 +00:00
glebius
11f04943de Fix bug in m_split() in a case when split len matches len of the
first mbuf, and the first mbuf is M_PKTHDR.

PR:		kern/176144
Submitted by:	Jacques Fourie <jacques.fourie gmail.com>
2013-03-29 14:10:40 +00:00
glebius
06ecb1b7ca Once ng_ksocket(4) is fixed, re-apply r194662. See this revision for
longer description.

Discussed with:	andre, rwatson
Sponsored by:	Nginx, Inc.
2013-03-29 14:06:04 +00:00
glebius
ffd07149de Revamp mbuf handling in ng_ksocket_incoming2():
- Clear code that workarounded a bug in FreeBSD 3,
  and even predated import of netgraph(4).
- Clear workaround for m_nextpkt pointing into
  next record in buffer (fixed in r248884).
  Assert that m_nextpkt is clear.
- Do not rely on SOCK_STREAM sockets containing
  M_PKTHDR mbufs. Create a header ourselves and
  attach chain to it. This is correct fix for
  kern/154676.

PR:		kern/154676
Sponsored by:	Nginx, Inc
2013-03-29 14:04:26 +00:00
glebius
1bccb6e916 When soreceive_generic() hands off an mbuf from buffer,
clear its pointer to next record, since next record
belongs to the buffer, and shouldn't be leaked.

The ng_ksocket(4) used to clear this pointer itself,
but the correct place is here.

Sponsored by:	Nginx, Inc
2013-03-29 13:57:55 +00:00
glebius
f412a6fab2 Whitespace. 2013-03-29 13:53:14 +00:00
glebius
ee9bd064bb Non-functional cleanup of ng_ksocket_incoming2(). 2013-03-29 13:51:01 +00:00
marius
4f749bdfea Unbreak compilation after r248868. 2013-03-29 11:53:20 +00:00
mav
af8596b2cc Make pre-shutdown flush and spindown routines to not use xpt_polled_action(),
but execute the commands in regular way.  There is no any reason to cook CPU
while the system is still fully operational.  After this change polling in
CAM is used only for kernel dumping.
2013-03-29 08:33:18 +00:00
mav
28542ab068 Implement CAM_PERIPH_FOREACH() macro, safely iterating over the list of
driver's periphs, acquiring and releaseing periph references while doing it.

Use it to iterate over the lists of ada and da periphs when flushing caches
and putting devices to sleep on shutdown and suspend.  Previous code could
panic in theory if some device disappear in the middle of the process.
2013-03-29 07:50:47 +00:00
adrian
becc1654f8 For the AR933x UART, the serial clock is not the AHB clock, it's the
reference clock.  So use that instead.
2013-03-29 06:32:39 +00:00
adrian
80efba7745 * Fix clock register definitions
* Add maximum clock register values
2013-03-29 06:32:02 +00:00
adrian
976eabcf21 Print out the platform reference frequency.
This is useful for AR933x platforms where that matters.
2013-03-29 06:31:31 +00:00
neel
29b9bf0372 Allow caller to skip 'guest linear address' validation when doing instruction
decode. This is to accomodate hardware assist implementations that do not
provide the 'guest linear address' as part of nested page fault collateral.

Submitted by:	Anish Gupta (akgupt3 at gmail dot com)
2013-03-28 21:26:19 +00:00