Commit Graph

197 Commits

Author SHA1 Message Date
pfg
9e7434b2c5 lib: minor spelling fixes in comments.
No functional change.
2016-05-01 19:37:33 +00:00
gjb
955ce29ea3 MFH
Sponsored by:	The FreeBSD Foundation
2016-03-02 16:14:46 +00:00
trasz
066348e6cd Connect pmc.haswellxeon(3) to the build; looks like it was missed in r279829.
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
2016-03-01 11:34:44 +00:00
gjb
fef2698edf First pass through library packaging.
Sponsored by:	The FreeBSD Foundation
2016-02-04 21:16:35 +00:00
rrs
5fd389bc0c Add support for Intel Skylake and Intel Broadwell PMC's. The Broadwell PMC's have been
tested on the Broadwell-Xeon with a hacked up version of pmcstudy -T. I still need
to circle back and add in to pmcstudy all the new tests from the Broadwell Vtune
guide (for the hacked up version I just made it so I could run the -T option). The
Skylake CPU is not yet available (even though Intel is advertising it .. imagine that).
The Skylake PMC's will need to be tested once we can get a sample skylake CPU :-)

Sponsored by: Netflix Inc.
2015-11-30 17:35:49 +00:00
bdrewery
e13d6f8b3f META MODE: Prefer INSTALL=tools/install.sh to lessen the need for xinstall.host.
This both avoids some dependencies on xinstall.host and allows
bootstrapping on older releases to work due to lack of at least 'install -l'
support.

Sponsored by:	EMC / Isilon Storage Division
2015-11-25 19:10:28 +00:00
jtl
327d3d0e64 Change the driver stats to what they really are: unsigned values.
When pmcstat exits after some samples were dropped, give the user an
idea of how many were lost. (Granted, these are global numbers, but
they may still help quantify the scope of the loss.)

Differential Revision:	https://reviews.freebsd.org/D4123
Approved by:	gnn (mentor)
MFC after:	1 month
Sponsored by:	Juniper Networks
2015-11-16 15:16:09 +00:00
bz
fec51f584e For the Cortex-A8 use the a8 and not the a9 events table.
MFC after:		2 weeks
Sponsored by:		DARPA/AFRL
Differential Revision:	https://reviews.freebsd.org/D3882
2015-10-14 16:56:25 +00:00
sjg
008d7c831f Add META_MODE support.
Off by default, build behaves normally.
WITH_META_MODE we get auto objdir creation, the ability to
start build from anywhere in the tree.

Still need to add real targets under targets/ to build packages.

Differential Revision:       D2796
Reviewed by: brooks imp
2015-06-13 19:20:56 +00:00
br
319e9e4b6c o Rework ARMv7 events list using aliases - same way as we have for arm64.
o Extend it with Cortex A9-specific events.
2015-06-10 12:42:30 +00:00
sjg
75a137820d dirdeps.mk now sets DEP_RELDIR 2015-06-08 23:35:17 +00:00
sjg
65145fa4c8 Merge sync of head 2015-05-27 01:19:58 +00:00
jhb
d8d8e019c0 Use fixed enum values for PMC_CLASSES().
This removes one of the frequent causes of ABI breakage when new CPU
types are added to hwpmc(4).

Differential Revision:	https://reviews.freebsd.org/D2586
Reviewed by:	davide, emaste, gnn (earlier version)
MFC after:	2 weeks
2015-05-19 18:58:18 +00:00
br
b1f1f07fae Add Performance Monitoring Counters support for AArch64.
Family-common and CPU-specific counters implemented.

Supported CPUs: ARM Cortex A53/57/72.

Reviewed by:	andrew, bz, emaste, gnn, jhb
Sponsored by:	ARM Limited
Differential Revision:	https://reviews.freebsd.org/D2555
2015-05-19 15:25:47 +00:00
joel
f61d9a586b Minor mdoc fixes. 2015-04-20 21:19:26 +00:00
jhibbits
2b1ec4f62f Implement hwpmc(4) for Freescale e500 core.
This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional events.

Relnotes:	Yes
2015-04-18 21:39:17 +00:00
adrian
bc81ea301e Add support for the MIPS74K SoC family performance counters events.
These are similar to the mips24k performance counters - some are
available on perfcnt0/3, some are available on perfcnt1/4.
However, the events aren't all the same.

* Add the events, named the same as from Linux oprofile.
* Verify they're the same as  "MIPS32(R) 74KTM Processor Core Family
  Software User's Manual"; Document Number: MD00519; Revision 01.05.
* Rename INSTRUCTIONS to something else, so it doesn't clash with
  the alias INSTRUCTIONS.  I'll try to tidy this up later; there
  are a few other aliases to add and shuffle around.

Tested:

* QCA9558 SoC (AP135 board) - MIPS74Kc core (no FPU.)
* make universe; where it didn't fail for other reasons.

TODO:

* It'd be nice to support the four performance counters
  in at least this hardware, rather than just two.

Reviewed by:	bsdimp ("looks good; don't break world".)
2015-04-05 02:57:02 +00:00
rstone
cce05f8584 Fix Ivy Bridge+ MEM_UOPS_RETIRED counters
The MEM_UOPS_RETIRED actually work the same way as the Sandy
Bridge counters, but the counters were documented in a different
way and that seemed to cause the Ivy Bridge counters to be
implemented incorrectly.  Use the same counter definitions as
Sandy Bridge.  While I'm here, rename the counters to match
what's documented in the datasheet.

Differential Revision:	https://reviews.freebsd.org/D1590
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:24:08 +00:00
rstone
94606f7474 Use the correct event table for Haswell Xeon events
Differential Revision:	https://reviews.freebsd.org/D1588
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:23:55 +00:00
rstone
5ebfc02e6f Fix Sandy Bridge+ hwpmc branch counters
On Sandy Bridge and later, to count branch-related events you
have to or together a mask indicating the type of branch
instruction to count (e.g. direct jump, branch, etc) and a bits
indicating whether to count taken and not-taken branches.  The
current counter definitions where defining this bits individually,
so the counters never worked and always just counted 0.

Fix the counter definitions to instead contain the proper
combination of masks.  Also update the man pages to reflect the
new counters.

Differential Revision:	https://reviews.freebsd.org/D1587
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:23:47 +00:00
rstone
1490665ca9 Add manpage for Haswell Xeon pmc implementation
Differential Revision:	https://reviews.freebsd.org/D1584
Reviewed by:	gnn
MFC After:	1 month
Sponsored by:	Sandvine Inc
2015-03-10 01:22:43 +00:00
br
236c1b153d Add ARMv7 performance monitoring counters.
Differential Revision:	https://reviews.freebsd.org/D1687
Reviewed by:	rpaulo
Sponsored by:	DARPA, AFRL
2015-01-28 16:08:07 +00:00
rrs
8bf38c1934 Update the hwpmc driver to have the new type HASWELL_XEON. Also
go back through HASWELL, IVY_BRIDGE, IVY_BRIDGE_XEON and SANDY_BRIDGE
to straighten out all the missing PMCs. We also add a new pmc tool
pmcstudy, this allows one to run the various formulas from
the documents "Using Intel Vtune Amplifier XE on XXX Generation platforms" for
IB/SB and Haswell. The tool also allows one to postulate your own
formulas with any of the various PMC's. At some point I will enahance
this to work with Brendan Gregg's flame-graphs so we can flamegraph
various PMC interactions. Note the manual page also needs some
work (lots of work) but gnn has committed to help me with that ;-)
Reviewed by: gnn
MFC after:1 month
Sponsored by:	Netflix Inc.
2015-01-14 12:46:58 +00:00
joel
b5f3041012 mdoc: sort SEE ALSO. 2015-01-04 12:38:00 +00:00
sjg
d7cd1d425c Merge head from 7/28 2014-08-19 06:50:54 +00:00
gnn
de7be6e036 Update the list of cross references to include the more modern set of
processors that we now support.
2014-07-28 10:17:41 +00:00
joel
d94b51f5b9 mdoc: remove superfluous paragraph macros. 2014-06-23 18:40:21 +00:00
bapt
1f77f137dc use .Mt to mark up email addresses consistently (part3)
PR:		191174
Submitted by:	Franco Fichtner  <franco at lastsummer.de>
2014-06-23 08:23:05 +00:00
kib
23d48b19e1 For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of the
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.

The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.

Reviewed by:	davide, fabient
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2014-06-04 16:06:38 +00:00
sjg
5860f0d106 Updated dependencies 2014-05-16 14:09:51 +00:00
sjg
1a7e48acf1 Updated dependencies 2014-05-10 05:16:28 +00:00
sjg
0c7e03a54c Merge head 2014-04-27 08:13:43 +00:00
hiren
2babaa36d7 Update hwpmc to support core events for Atom Silvermont microarchitecture.
(Model 0x4D as per Intel document 330061-001 01/2014)

Tested by:	Olivier Cochard-Labbe <olivier@cochatrd.me>
MFC after:	4 weeks
2014-03-20 20:51:08 +00:00
jhibbits
859fb3bb22 Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
2014-02-01 02:03:50 +00:00
rstone
8c895a440f pmc(3) does not document a dependency on <sys/types.h> but <pmc.h>
requires it, so include it explicitly from <pmc.h>.

MFC after:	1 month
2013-11-25 18:31:13 +00:00
sjg
62bb106222 Merge from head 2013-09-05 20:18:59 +00:00
uqs
d165ee7e6a Always install pmc.foo(3) manpages.
There is no point in hiding, e.g. pmc.xscale(3) from a developer running
on amd64, when the target arch in question will probably never have
manual pages installed at all.

Reviewed by:	sbruno, hiren
2013-05-03 08:20:10 +00:00
sjg
97d8b94956 sync from head 2013-04-12 20:48:55 +00:00
joel
de46cf4da4 Remove EOL whitespace. 2013-03-29 08:32:49 +00:00
sbruno
18d941830f Update hwpmc to support Haswell class processors.
0x3C:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-03-28 19:15:54 +00:00
bryanv
48949db9d6 Add missing space
MFC after:	3 days
2013-03-27 07:11:29 +00:00
sjg
6d37b86f2b Updated dependencies 2013-03-11 17:21:52 +00:00
mav
fdde785247 Add support for good old 8192Hz profiling clock to software PMC.
Reviewed by:	fabient
2013-02-26 18:13:42 +00:00
sjg
0ee5295509 Updated dependencies 2013-02-16 01:23:54 +00:00
obrien
3028e3f8ab Sync with HEAD. 2013-02-08 16:10:16 +00:00
sbruno
577b42d393 Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
sjg
9f7bd28e77 Updated/new Makefile.depend 2012-11-08 21:24:17 +00:00
dim
9413d82612 Fix a few warnings from newer clang 3.2 in libpmc, about comparing enum
pmc_event values against integer constants which fall outside the enum
range.

Reviewed by:	fabient, sbruno
MFC after:	3 days
2012-11-05 18:49:21 +00:00
sjg
778e93c51a Sync from head 2012-11-04 02:52:03 +00:00
sbruno
88f73ca292 Cleanup and rename some variables in libpmc and hwpmc.
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ sbruno@
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2012-10-24 01:26:29 +00:00