Remove the setgid bit from the tga device (?).
Synchronize mode with modes used for related frame buffer devices
in MAKEDEV (tga doesn't appear in MAKEDEV).
Submitted by: kris
improves protection consistency with other storage devices (generally
root:operator,660). This driver appears not to have an active
maintainer.
Submitted by: kris
Remove the malloctype from the ufs mount structure, instead add a callback
to the storage method for freeing inodes: UFS_IFREE().
Add vfs_ifree() method function which frees an inode.
Unvariablelize the malloc type used for allocating inodes.
command in case this setting was not saved. Since bandwidth reclamation
(-current only) often results in bus activity continuing to the end
of every frame, most transfers would fail with IOERROR if this
setting is missed.
Reviewed by: n_hibma
MFC after: 1 week
- Fix permission of device node.
fwochi.c, fwohcireg.h
- Detect phy access failure correct way.
- Set root hold-off bit before initiating bus reset.
This should fix the problem with VIA6306.
fwohcivar.h
- Fix over-allocation of array. (fwohcivar.h)
sbp.c
- Return CAM_DEV_NOT_THERE rather than CAM_TID_INVALID to prevent retry.
when julian@ added it, but the commented out code had at least
one bug -- not freeing the allocated mbuf.
Anyway, this comment no longer applies as of revision 1.67, so
remove it.
the entry being removed (ret_nrt != NULL), increment the entry's
rt_refcnt like we do it for RTM_ADD and RTM_RESOLVE, rather than
messing around with 1->0 transitions for rtfree() all over.
useful for accessing more than 1 page of contiguous physical memory, and
to use 4mb tlb entries instead of 8k. This requires that the system only
use the direct mapped addresses when they have the same virtual colour as
all other mappings of the same page, instead of being able to choose the
colour and cachability of the mapping.
- Adapt the physical page copying and zeroing functions to account for not
being able to choose the colour or cachability of the direct mapped
address. This adds a lot more cases to handle. Basically when a page has
a different colour than its direct mapped address we have a choice between
bypassing the data cache and using physical addresses directly, which
requires a cache flush, or mapping it at the right colour, which requires
a tlb flush. For now we choose to map the page and do the tlb flush.
This will allows the direct mapped addresses to be used for more things
that don't require normal pmap handling, including mapping the vm_page
structures, the message buffer, temporary mappings for crash dumps, and will
provide greater benefit for implementing uma_small_alloc, due to the much
greater tlb coverage.
