Commit Graph

137 Commits

Author SHA1 Message Date
sos
ce43d827c2 Reshape the dma code to be a bit more flexible so it can cope with
new HW that has new and different demands.
Fix a few nits in former commit in this cleanup crusade.

Sponsored by:	pair.com
2005-05-03 07:55:07 +00:00
sos
2d7b156b4f Update on the last commit, the dma* funciton needs to be called with
a channel device, not an ata device, or we'll be out of luck in
reset/timeout where we dont have a device.
2005-05-01 12:24:45 +00:00
sos
859b992e3d Take newbusification one step further, ie use the device_t more consequently
all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.

Sponsored by:	pair.com
2005-04-30 16:22:07 +00:00
sos
24e2f5bb6c Put the BUS_DMASYNC_PREWRITE in the rigth position. 2005-04-08 12:16:51 +00:00
sos
f820cdfe29 This is the much rumoured ATA mkIII update that I've been working on.
o       ATA is now fully newbus'd and split into modules.
        This means that on a modern system you just load "atapci and ata"
        to get the base support, and then one or more of the device
        subdrivers "atadisk atapicd atapifd atapist ataraid".
        All can be loaded/unloaded anytime, but for obvious reasons you
        dont want to unload atadisk when you have mounted filesystems.

o       The device identify part of the probe has been rewritten to fix
        the problems with odd devices the old had, and to try to remove
        so of the long delays some HW could provoke. Also probing is done
	without the need for interrupts, making earlier probing possible.

o       SATA devices can be hot inserted/removed and devices will be created/
        removed in /dev accordingly.
	NOTE: only supported on controllers that has this feature:
	Promise and Silicon Image for now.
	On other controllers the usual atacontrol detach/attach dance is
	still needed.

o	Support for "atomic" composite ATA requests used for RAID.

o       ATA RAID support has been rewritten and and now supports these
        metadata formats:
                 "Adaptec HostRAID"
                 "Highpoint V2 RocketRAID"
                 "Highpoint V3 RocketRAID"
                 "Intel MatrixRAID"
                 "Integrated Technology Express"
                 "LSILogic V2 MegaRAID"
                 "LSILogic V3 MegaRAID"
                 "Promise FastTrak"
                 "Silicon Image Medley"
		 "FreeBSD PseudoRAID"

o       Update the ioctl API to match new RAID levels etc.

o       Update atacontrol to know about the new RAID levels etc
        NOTE: you need to recompile atacontrol with the new sys/ata.h,
        make world will take care of that.
	NOTE2: that rebuild is done differently from the old system as
	the rebuild is now done piggybacked on read requests to the
	array, so atacontrol simply starts a background "dd" to rebuild
	the array.

o       The reinit code has been worked over to be much more robust.

o       The timeout code has been overhauled for races.

o	Support of new chipsets.

o       Lots of fixes for bugs found while doing the modulerization and
        reviewing the old code.

Missing or changed features from current ATA:

o       atapi-cd no longer has support for ATAPI changers. Todays its
        much cheaper and alot faster to copy those CD images to disk
        and serve them from there. Besides they dont seem to be made
        anymore, maybe for that exact reason.

o       ATA RAID can only read metadata from all the above metadata formats,
	not write all of them (Promise and Highpoint V2 so far). This means
	that arrays can be picked up from the BIOS, but they cannot be
	created from FreeBSD. There is more to it than just the missing
	write metadata support, those formats are not unique to a given
	controller like Promise and Highpoint formats, instead they exist
	for several types, and even worse, some controllers can have
	different formats and its impossible to tell which one.
	The outcome is that we cannot reliably create the metadata of those
	formats and be sure the controller BIOS will understand it.
	However write support is needed to update/fail/rebuild the arrays
	properly so it sits fairly high on the TODO list.

o       So far atapicam is not supported with these changes. When/if this
	will change is up to the maintainer of atapi-cam so go there for
	questions.

HW donated by:  Webveveriet AS
HW donated by:  Frode Nordahl
HW donated by:  Yahoo!
HW donated by:  Sentex
Patience by:	Vife and my boys (and even the cats)
2005-03-30 12:03:40 +00:00
scottl
db12de4f40 Don't set the BUS_DMA_ALLOCNOW flag for the parent tag or the tags that are
used for static memory allocations.

Discussed with: sos
2004-11-17 11:27:30 +00:00
sos
7c3c92e15d Reduce the amount of memory reported to busdma.
This made the requirements for bouncebuffers too big with PAE.
Cleanup the way size defines for transfers are implemented.
2004-09-10 10:31:37 +00:00
sos
61ba3ee1cb Correct the args to busdma, mostly cosmetic. 2004-08-20 19:05:22 +00:00
sos
6f119c28ba Allow the use of a supplied function to set the PRD table. This is
needed for new chips that supports 64bit addressing.
2004-08-13 08:14:27 +00:00
sos
a71e43e2c6 Change the order of ata_dmainit/ata_allocate in preparation of
supporting new chipsets where this is needed.
2004-08-12 08:20:36 +00:00
sos
6016d1505d Try to narrow down the race window on HW that does not have ways to
poll for which channel actually pulled the irq line.
2004-08-05 21:13:41 +00:00
sos
cc41608d4e Add support for the Promise command sequencer present on all modern Promise
controllers (PDC203** PDC206**).

This also adds preliminary support for the Promise SX4/SX4000 but *only*
as a "normal" Promise ATA controller (ATA RAID's are supported though
but only RAID0, RAID1 and RAID0+1).

This cuts off yet another 5-8% of the command overhead on promise controllers,
making them the fastest we have ever had support for.

Work is now continuing to add support for this in ATA RAID, to accellerate
ATA RAID quite a bit on these controllers, and especially the SX4/SX4000
series as they have quite a few tricks in there..

This commit also adds a few fixes to the SATA code needed for proper support.
2004-04-13 09:44:20 +00:00
sos
894449cd93 Use UMA instead of plain malloc for getting ATA request storage.
This gives +10% performance on simple tests, so definitly worth it.
A few percent more could be had by not using M_ZERO'd alloc's, but
we then need to clear fields all over the place to be safe, and
that was deemed not worth the trouble (and it makes life dangerous).
2004-01-14 21:26:35 +00:00
sos
d6c0154728 Overhaul of the timeout/reinit framework. This should clear up most
of the leftovers from the old version that really doesn't work anymore.

Add a reset function for host-end of the ATA channel. This is needed
for the SiI3112 in order to whack it back to reality if a device
locks up the SATA interface (thereby preventing that we can reset the
device). The result is that ATA now recovers from the timeouts that
happens with the SiI3112A and more or less all disks based on old
PATA electronics with a Marvell PATA->SATA converter. This includes
lots of the popular SATA dongles and the WDC Raptor disks..
2004-01-11 22:08:34 +00:00
sos
9bcba46103 Workaround for errata on early versions of the sii3112.
Approved by: re@
2003-11-28 19:01:28 +00:00
sos
08d97161dc Fix the DMA problem that most severely hit on the DS3112a SATA chip
in connection with Marvell based SATA->PATA dongles.

The problem was caused by a combination of things working
together to make it hard to spot...

The ATA driver has always started the ATA command, then build
the SG list for DMA and then finally started the DMA engine.
While this is according to specs, it poses a potential
problem as some controllers apparently do not allow for unlimitted
time between starting the ATA command and starting the DMA engine.

At about the same time as ATAng was committed there were lots
of other changes applied, some of which was locking in parts
that causes the busdma load functions to take significantly
longer to load the SG list.

This pushed the time spent between starting the ATA command and
starting the DMA engine over the hill for some controllers
(especially the Silicon Image DS3112a) and caused what looked
like lost interrupts.

The solution is to get all the SG list work or rather all
busdma related stuff done before we even try to start anything.

This has the nice side effect of seperating busdma out the
way it should be, so the working of the ATA machinery is not
cluttered up with busdma droppings, making the code easier
to read and understand.
2003-10-21 19:20:37 +00:00
sos
93a92c1266 Give more correct params to busdma_* 2003-10-07 13:48:55 +00:00
sos
fd78182c7c Cleanup the dma int/alloc/free code. 2003-08-25 11:13:04 +00:00
obrien
c63dab466c Use __FBSDID().
Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
sos
acd43345e5 This is a major rework of the ATA driver (ATAng)
Restructure the way ATA/ATAPI commands are processed, use a common
ata_request structure for both. This centralises the way requests
are handled so locking is much easier to handle.

The driver is now layered much more cleanly to seperate the lowlevel
HW access so it can be tailored to specific controllers without touching
the upper layers. This is needed to support some of the newer
semi-intelligent ATA controllers showing up.

The top level drivers (disk, ATAPI devices) are more or less still
the same with just corrections to use the new interface.

Pull ATA out from under Gaint now that locking can be done in a sane way.

Add support for a the National Geode SC1100. Thanks to Soekris engineering
for sponsoring a Soekris 4801 to make this support.

Fixed alot of small bugs in the chipset code for various chips now
we are around in that corner anyways.
2003-08-24 09:22:26 +00:00
imp
c23aaeeba4 Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
2003-08-22 05:54:52 +00:00
scottl
4d495abb9d Mega busdma API commit.
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma.  At the moment, this is used for the
asynchronous busdma_swi and callback mechanism.  Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg.  dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create().  The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms.  The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by:	tmm, gibbs
2003-07-01 15:52:06 +00:00
sos
d6ec3d03e8 Third round of updates to the ATA driver.
More DMA cleanups, including fix for breakage on older Promise controllers.

Add more ways of getting to the ATA registers.
2003-04-07 14:12:12 +00:00
sos
1aa8f29ccf Second round of updates to the ATA driver.
Clean up the DMA interface too much unneeded stuff crept in with
the busdma code back when.

Modify the ATA_IN* / ATA_OUT* macros so that resource and offset
are gotten from a table. That allows for new chipsets that doesn't
nessesarily have things ordered the good old way. This also removes
the need for the wierd PC98 resource functions.

Tested on: i386, PC98, Alpha, Sparc64
2003-03-29 13:37:09 +00:00
sos
93c9b5f5d1 First round off updates/fixes to the ATA driver.
This moves all chipset specific code to a new file 'ata-chipset.c'.
Extensive use of tables and pointers to avoid having the same switch
on chipset type in several places, and to allow substituting various
functions for different HW arch needs.
Added PIO mode setup and all DMA modes.
Support for all known SiS chipsets. Thanks to Christoph Kukulies for
sponsoring a nice ASUS P4S8X SiS648 based board for this work!

Tested on:	i386, PC98, alpha and sparc64
2003-02-20 20:02:32 +00:00
sos
9a5444fa22 Small change to the previous commit, zero out the 48BIT flag in ata_command
instead of in dmadone.
2003-01-19 20:18:07 +00:00
sos
80b484084f Add support for the ServerWorks CSB6.
The support for the 3'rd channel is only experimental.
2003-01-19 13:03:20 +00:00
sos
0243c6a097 Fix the 48bit access support for the older Promise 66/100 controllers, the
first attempt was wrong and could cause r/w timeouts.

Add yet another Promise PCI id.
2003-01-19 11:47:32 +00:00
sos
2a1a3d1ac2 Fix typo
PR: 45375
2003-01-09 13:54:07 +00:00
sos
2721b74be2 Add support for the nVidia nForce2 ATA part.
Fix support for the nForce1 as well, registers are offset 0x10
against the AMD/VIA parts.
2003-01-08 16:51:41 +00:00
sos
bf3e784961 Add code that works around the problem that the older Promise
controllers (ultra/fasttrak-66/100) fails on 48bit accesses.
2003-01-08 10:03:31 +00:00
sos
71edc5e4eb Add support for the PC98 platform to the ATA driver.
This mostly consists of functionality to serialize accesses to
the two ATA channels (which can also be used to "fix" certain
PCI based controllers).
Add support for Acard controllers.
Enable the ATA driver in PC98 GENERIC, and add device hints.
Update man page with latest support.

The PC98 core team has kindly provided me with a PC98
machine that made this all possible, thanks to all that
contributed to that effort, without that this would
probably newer have been possible..

Approved by: re@
2002-12-03 20:20:44 +00:00
sos
137f3cd2e3 Add yet another Promise PCI id. 2002-10-01 15:21:09 +00:00
phk
7d7b5d4730 Remove unused #includes: <sys/disk.h> <sys/devicestat.h> and <sys/sysctl.h>
Sponsored by:	DARPA & NAI Labs.
Approved by:	sos
2002-09-20 18:08:57 +00:00
sos
43ba8ad6aa Add support for the VIA 8235.
Submitted by: Jason Dambrosio <jason@wiz.cx>
2002-09-18 09:39:37 +00:00
phk
9f453489a6 remove #includes of <sys/bio.h> where not needed. 2002-09-14 18:59:32 +00:00
sos
379b699556 Add preliminary mostly untested support for the Silicon Image Sil680 chip. 2002-09-12 15:25:59 +00:00
jhb
30a6c156b0 Add PCI ID for the ICH4 ATA100 controller.
Sponsored by:	The Weather Channel
2002-07-19 22:14:54 +00:00
sos
15dd5289b1 Add yet another (older) Promise chip 2002-06-19 12:26:20 +00:00
mike
99e543a853 Move the new byte order function prototypes from <sys/param.h> to
<sys/endian.h>.  This puts us in line with NetBSD and OpenBSD.
2002-04-26 22:48:23 +00:00
sos
57865251c8 Fix the breakage of tagged queueing that the busdma integration
introduced. Since its now only possible to have one DMA control
block at a time, we move the setup to dmastart instead.
2002-04-18 19:11:45 +00:00
sos
b45627b32f Add support for the nVIDIA nForce ATA controller.
Collapse the VIA/AMD/nVIDIA support code into one, they are
created more or less equal anyway..
2002-04-16 08:30:51 +00:00
sos
05bab27f80 Add yet another chip ID for a Promise TX2 chip. 2002-04-11 11:04:23 +00:00
sos
5b5bb6df40 Add yet another ATA133 Promise chip. 2002-04-07 07:53:34 +00:00
sos
0d2605253b Make the ATA driver compile & work on the sparc64 platform.
Initial work & code by tmm.

Lots of changes and rearrangements by yours truely to make busdma
be a little less a PITA (but I still dont like it).
2002-04-05 13:13:56 +00:00
sos
9bb1e67e7e Correct the Northbridge test on the new ATA133 VIA's
Misc cosmetics now I'm there.
2002-04-02 16:45:06 +00:00
sos
d5be9373bd ATA100 is allowed on the HPT chips rev >= 3 2002-03-31 13:33:55 +00:00
sos
87ccc1e6f1 Add AMD 768 support. 2002-03-24 12:44:23 +00:00
sos
7f79fcc8da Add support for the ServerWorks CSB5 chips 2002-03-18 12:13:13 +00:00
sos
259c8e6d53 Even more Highpoint RAID support.
Fix the 80pin cable detection system.
2002-03-08 21:36:49 +00:00