Commit Graph

253356 Commits

Author SHA1 Message Date
Mark Johnston
114484b7ec Flag vm_reserv and vm_phys sysctls as MPSAFE.
Nothing in these subsystems relies on Giant.

MFC after:	1 week
2020-09-23 19:36:07 +00:00
Mark Johnston
78257765f2 Add a vmparam.h constant indicating pmap support for large pages.
Enable SHM_LARGEPAGE support on arm64.

Reviewed by:	alc, kib
Sponsored by:	Juniper Networks, Inc., Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26467
2020-09-23 19:34:21 +00:00
Mark Johnston
4168aedcde Add largepage support to the arm64 pmap.
Reviewed by:	alc, kib
Sponsored by:	Juniper Networks, Inc., Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26466
2020-09-23 19:33:47 +00:00
Warner Losh
f9ba2bbe3a Use envvar rather than nonstandard hint. lines
The NOTES files have a bunch of hint lines that are removed when
generating LINT. However, we can achieve the same effect by prepending
each of the lines with 'envvar' so the NOTES files become standard
config(8) files. No functional changes as the sed script to generate
the LINT files filters these either way.

Suggested by: kevans
2020-09-23 19:18:53 +00:00
Toomas Soome
1dc762d4fb loader: fix non-zfs build
We can not include zfs headers while building without zfs.

Reported by:	Oscar Holmlund
2020-09-23 19:15:22 +00:00
Nick O'Brien
e1c8f8f87d riscv: Trap cleanup - use nitems()
No functional changes, just cleanup.

Reviewed by:	kp
Approved by:	kp (mentor)
Sponsored by:	Axiado
2020-09-23 18:54:14 +00:00
Konstantin Belousov
aaf78c16f5 Do not leak oldvmspace if image activation failed
and current address space is already destroyed, so kern_execve()
terminates the process.

While there, clean up some internals of post_execve() inlined in init_main.

Reported by:	Peter <pmc@citylink.dinoex.sub.org>
Reviewed by:	markj
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D26525
2020-09-23 18:03:07 +00:00
Conrad Meyer
eb7e125e58 nextboot(8): Fix behavior on non-ZFS /boot systems
Fix unquoted test for an empty value, which broke nextboot(8) on non-ZFS /boot
systems after r365938.

Discussed with:	allanjude, tsoome
X-MFC-With:	r365938
2020-09-23 17:04:27 +00:00
Ed Maste
64d33e9e60 remove reference to obsolete arm NOTES files
We left these in the clean rule to avoid having stale files remain in
working trees, but enough time has now passed that it's no longer
relevant.

Discussed with:	imp
2020-09-23 14:52:43 +00:00
Alex Richardson
d1e106f262 byacc: fix UBSan signed shift range error
I've submitted this patch upstream, so apply this to contrib/ until a new
version containing this change has been released.

Reviewed By:	jkim
Differential Revision: https://reviews.freebsd.org/D26505
2020-09-23 12:54:42 +00:00
Alex Richardson
1e266857ad Add github CI for testing cross-building from Linux and macOS
This builds the kernel-toolchain target and an amd64 GENERIC kernel on
Ubuntu 18.04, 20.04 and the latest macOS to ensure that new changes
don't regress building on non-FreeBSD hosts.

Reviewed By:	emaste, lwhsu
Differential Revision: https://reviews.freebsd.org/D26512
2020-09-23 12:54:37 +00:00
Mateusz Guzik
254c54c65a Bump __FreeBSD_version after cache_purgevfs change 2020-09-23 11:02:23 +00:00
Mateusz Guzik
a3d9bf49b5 cache: drop the force flag from purgevfs
The optional scan is wasteful, thus it is removed altogether from unmount.

Callers which always want it anyway remain unaffected.
2020-09-23 10:46:07 +00:00
Mateusz Guzik
a952fefff2 cache: reimplement purgevfs to iterate vnodes instead of the entire hash
The entire cache scan was a leftover from the old implementation.

It is incredibly wasteful in presence of several mount points and does not
win much even for single ones.
2020-09-23 10:44:49 +00:00
Mateusz Guzik
efeec5f0c6 cache: clean up atomic ops on numneg and numcache
- use subtract instead of adding -1
- drop the useless _rel fence

Note this should be converted to a scalable scheme.
2020-09-23 10:42:41 +00:00
Toomas Soome
867ae3c38d loader: zfs_probe_dev should pick first matching zfs pool
During devswitch probe, we pick boot pool based on boot disk, if the boot
disk happens to have multiple pools in freebsd-zfs partitions, the current
code does pick last pool from boot disk as boot pool. While there is no
way at that stage to test, the more logical approach would be to pick
first matching pool.

This patch is assuming we do pass pool guid pointer with guid value 0,
this will help us to determine, if the guid value is already set or not.

The general suggestion would be not to share disk between different pools.

Reported by:	Alexander Leidinger
2020-09-23 08:22:14 +00:00
Xin LI
6155466afb Fix build.
Pointy hat to:	delphij
MFC after:	3 days
2020-09-23 07:27:12 +00:00
Xin LI
4d2c300bde sbin/fsck_msdosfs: Fix an integer overflow on 32-bit platforms.
The purpose of checksize() is to verify that the referenced cluster
chain size matches the recorded file size (up to 2^32 - 1) in the
directory entry. We follow the cluster chain, then multiple the
cluster count by bytes per cluster to get the physical size, then
check it against the recorded size.

When a file is close to 4 GiB (between 4GiB - cluster size and 4GiB,
both non-inclusive), the product of cluster count and bytes per
cluster would be exactly 4 GiB. On 32-bit systems, because size_t
is 32-bit, this would wrap back to 0, which will cause the file be
truncated to 0.

Fix this by using 64-bit physicalSize instead.

This fix is inspired by an Android change request at
https://android-review.googlesource.com/c/platform/external/fsck_msdos/+/1428461

PR:		249533
Reviewed by:	kevlo
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D26524
2020-09-23 06:52:22 +00:00
Brandon Bergren
d20d17f6d4 [PowerPC64LE] Fix RTAS LE calls in pseries.
Similar to OPAL calls, switch to big endian to do calls to RTAS.

(Missed this one when I was doing the bulk commit of PowerPC64LE support.)

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 04:09:02 +00:00
Brandon Bergren
af22c7e495 __FreeBSD_version bump for introduction of the powerpc64le arch.
Although this is technically not a breaking change, I believe it is best
to have a fresh version to use to define where the starting point was
here.
2020-09-23 03:19:20 +00:00
Brandon Bergren
1bdb1aa426 arch(7): PowerPC64LE architecture definition
Document the new powerpc64le arch's initial specifications.

Certain things are subject to change while this is experimental. The most
likely change is that long double may switch to quad, dependent on POWER8
emulation assistance for __float128 being set up in the compiler (as
POWER8 does not have IEEE-compatible 128-bit hardware float, unlike POWER9.)

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 03:12:58 +00:00
Kyle Evans
5779bba93e cp: tests: fix weird 20 insertion
This slipped in at the last moment. =(
2020-09-23 03:02:45 +00:00
Kyle Evans
5028ea32d6 cp: add some basic tests
There are some tests available in the NetBSD test suite, but we don't
currently pass all of those; further investigation will go into that. For
now, just add a basic test as well as a test that copies from /dev/null to a
file.

The /dev/null test confirms that the file gets created if it's empty, then
that it truncates the file if it's non-empty. This matches some usage that
was previously employed in the build and was replaced in r366042 by a
simpler shell construct.

I will also plan on coming back to expand these in due time.

MFC after:	1 week
2020-09-23 03:01:14 +00:00
Brandon Bergren
ab2032371e [PowerPC] Fix multiple ntp configuration issues
* powerpc time_t is 64 bit, not 32 bit.

* Add definition for powerpc64le.

With this, powerpc64le ntpd and ntpdate operate correctly instead of
corrupting the clock and exiting.

Tested on powerpc64, powerpc64le, and powerpc.

No feedback from cy@.

I am a bit confused as to how SIZEOF_TIME_T being wrong ever worked on
powerpc, it being big endian and all.

Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D26379
2020-09-23 02:37:27 +00:00
Brandon Bergren
93a5341930 [PowerPC64LE] Fix sleeping on POWER8.
Due to enter_idle_powerx fabricating a MSR from scratch, it is necessary
for it to care about the endianness, so we don't accidentally switch
endian the first time we idle a thread.

Took about five seconds to spot after seeing an unmangled backtrace.

The hard bit was needing to temporarily set up a mutex to sort out the
logjam that happens when every thread simultaneously wakes up in the wrong
endian due to the panic IPI and panics, leaving what I can best describe as
"alphabet soup" on the console.

Luckily, I already had a patch sitting around to do that.

This brings POWER8 up to equivilence with POWER9 on PPC64LE.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 02:28:19 +00:00
Brandon Bergren
bceb5a2c8d [PowerPC64LE] Pass our byte order to the sqlite3 build.
Due to the sqlite3 endian detection code preferring to check platform defines
instead of checking endian defines, it is necessary to manually set
the endianness on PowerPC64LE.

Unlike other bi-endian platforms, PowerPC64LE relies entirely on the
generic endianness macros like __BYTE_ORDER__ and has no platform-specific
define to denote little endian.

Add -DSQLITE_BYTEORDER=1234 to the CFLAGS when building libsqlite3 on
powerpc64le.

Fixes runtime operation of sqlite on PowerPC64LE.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 02:17:44 +00:00
Brandon Bergren
f4eb39ba6b [PowerPC64LE] libkvm powerpc64le support.
* Add missing _kvm16toh() function.
* Teach libkvm about powerpc64le.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 02:11:24 +00:00
Brandon Bergren
b257310103 [PowerPC64LE] Fix gdtoa configurations on LE.
gdtoa wins the award for "most outdated endianness naming convention"
with its IEEE_8087 vs IEEE_MC68k defines. I had a good chuckle.

Update softfloat and arith.h to adjust to BE or LE automatically
based on the low level preprocessor defines.

Fixes printf/scanf on PowerPC64LE, although there is still a problem
lurking regarding Signalling NaNs...

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 02:05:44 +00:00
Brandon Bergren
0d356a5349 [PowerPC64LE] Fix AP spinup on powernv.
OPAL unconditionally enters secondary CPUs with only HV and SF set.

I tried writing a secondary entry point instead, but OPAL rejected it
and I am unsure why, so I resorted to making the system reset interrupt
endian-flexible.

This means we take a slight performance hit on wakeup on LE, but it is
a good stopgap until we can figure out a reliable way to make OPAL enter
where we want it to.

It probably makes sense to have it around anyway, because I can imagine
scenarios where the cpu resets itself to BE and does a software reset.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:56:26 +00:00
Brandon Bergren
05c3051f86 [PowerPC64LE] Endian fix for opal_hmi.c
Another boring one. We need to endian swap before checking flags.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:51:01 +00:00
Brandon Bergren
f9acb7a818 [PowerPC64LE] Get XIVE up and running.
More endian conversion.

* Install TCEs correctly (i.e. in big endian)

* Convert to big endian and back when setting up queue pages and IRQs.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:49:37 +00:00
Brandon Bergren
bf933a83ec [PowerPC64LE] Endian fix for opal_dev.c.
Not much to say here, another missing be64toh() in memory that was written
from OPAL.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:41:51 +00:00
Brandon Bergren
9cbcb6ffce [PowerPC64LE] Endian fixes for opal_pci.c.
Since OPAL runs in big endian, any data being passed back and forth
via memory instead of registers needs to be byteswapped.

From my notes during development:

"A good way to find candidates is to look for vtophys() in opal_call()
parameters. The memory being passed will be written into in BE."

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:37:01 +00:00
Brandon Bergren
d418d3f616 [PowerPC64LE] Implement endian-independent dword atomic PTE lock.
It's much easier to implement this in an endian-independent way when we
don't also have to worry about masking half of the dword off.

Given that this code ran on a machine that ran a poudriere bulk with no
kernel oddities, I am relatively certain it is correctly implemented. ;)

This should be a minor performance boost on BE as well.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:33:54 +00:00
Brandon Bergren
f475e00fb3 [PowerPC64LE] Fix endian conversion bugs in moea64.
For a body of code that had its endian conversion bits written blind without
the ability to test, moea64 was VERY close to being correct.

There were only four instances where the existing code was getting it wrong.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:29:33 +00:00
Brandon Bergren
ead0ba6e8d [PowerPC64LE] Add release building script for powerpc64le.
This was originally part of the initial commit, but after discussion in
D26399, I split it out into its own commit after the kernel config file.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:13:29 +00:00
Brandon Bergren
6e5dbfb2bf [PowerPC64LE] Initial GENERIC64LE kernel config.
This is slightly stripped down from GENERIC64, as PowerMac G5 machines
are incapable of running in LE mode (so we can skip the Mac drivers.)

While technically POWER6 and POWER7 have the hardware capability of running
in LE mode, they have a tendency to trap excessively when a load/store is
misaligned. (an extremely common occurrence in LE code, and one of the main
reasons I consider BE to be superior, as it turns potential security issues
into immediately obvious mangled numbers.)

Additionally, there was no mechanism to control what endian interrupts
are delivered in, so supporting LE operation on POWER6 and POWER7 involves
some really dirty tricks in the interrupt vectors that I would rather
avoid.

IBM drew the line in the sand at POWER8 some time around 2013, embracing
full support for LE in the platform, and making a push across the board
for LE code to target POWER8 as a minimum requirement. As such, usage of
LE kernels on POWER6 and POWER7 is practically nil, despite it being
technically possible to do.

The so-called "TRUELE" feature bit which is the baseline requirement for
 needed for PowerPC64LE was introduced in POWER8.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 01:07:55 +00:00
Warner Losh
a5ebda464e Work around cp breakage in current from last week
There was a small window cp was broken. Work around this by using :>
instead of cp /dev/null. Ideally, we'd keep the cp /dev/null in the
build as a regression test, but doing so breaks people that upgraded
during the cp breakage and this is simpler than bootstrapping a
working cp since there's no good __FreeBSD_version sign posts for
that.

Suggested by: lots of people
Too stubborn for his own good: imp
2020-09-23 01:04:25 +00:00
Brandon Bergren
c16359cf66 [PowerPC64LE] powernv ILE setup code.
When running without a hypervisor, we need to set the ILE bit in the LPCR
ourselves.

For the boot processor, handle it in powernv_attach() like we do for other
LPCR bits.

No change for the APs, as they will use the lpcr global to set up their own
LPCR when they do their own cpudep_ap_early_bootstrap() and pick up this
automatically.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:32:50 +00:00
Brandon Bergren
dadfbc2e60 [PowerPC64LE] LE opal_call() implementation
OPAL runs in big endian, so we need to rfid into it to switch endian
atomically when branching to it, and we need to do the
RETURN_TO_NATIVE_ENDIAN dance when it returns to us.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:28:47 +00:00
Brandon Bergren
24faccc241 [PowerPC64LE] Use a shared LIBC_ARCH for powerpc64le.
Given that we have converted to ELFv2 for BE already, endianness is the only
difference between the two ARCHs.

As such, there is no need to differentiate LIBC_ARCH between the two.

Combining them like this lets us avoid needing to have two copies of several
bits for no good reason.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:21:51 +00:00
Brandon Bergren
c0290b3de8 [PowerPC64LE] Fix endianness issues in phyp_vscsi.
Unlike virtio, which in legacy mode is guest endian, the hypervisor vscsi
interface operates in big endian, so we must convert back and forth in several
places.

These changes are enough to attach a rootdisk.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:13:58 +00:00
Brandon Bergren
4efb1ca7d2 [PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation.
The TCG implementation of mtmsrd in qemu blindly copies the entire register
to the MSR, instead of the specific bit positions listed in the ISA.

This means that qemu will prematurely switch endian out from under the
running code instead of waiting for the rfid, causing an immediate trap
as it attempts to interpret the next instruction in the wrong endianness.

To work around this, ensure PSL_LE is still set before doing the mtmsrd.

In the future, we may wish to just turn off translation and unconditionally
use rfid to switch to the ofmsr instead of quasi-switching to the ofmsr.

Add a new platform option so this can be disabled. (And so that we can
conditonalize additional QEMU-specific hacks in the platform code.)

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:09:29 +00:00
Brandon Bergren
15be37cb7f [PowerPC64LE] Fix endianness issues in phyp and opal consoles.
This applies to both pseries and powernv, which were tested at different
points during the patchset development.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:06:48 +00:00
Brandon Bergren
35ef395191 [PowerPC64LE] Tell the hypervisor to switch interrupts to LE at CHRP attach.
Since we will need to be able to take traps relatively early in the process,
ensure that the hypervisor changes our ILE for us as soon as we are ready.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-23 00:03:35 +00:00
Brandon Bergren
b49db8270a [PowerPC64LE] Fix endian dependence of ofw_real.c.
Since OFW always runs in big endian in practice, we need to convert several
bits back and forth.

This is necessary to communicate with SLOF on LE pseries.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-22 23:59:02 +00:00
Brandon Bergren
a662559264 [PowerPC64LE] LE bringup work: locore / machdep / platform
This is the initial LE changes required in the machdep code to get as far
as platform attachment on qemu pseries.

Sponsored by:	Tag1 Consulting, Inc.
2020-09-22 23:55:34 +00:00
Brandon Bergren
b75abea4d0 [PowerPC64LE] Set up powerpc.powerpc64le architecture
This is the initial set up for PowerPC64LE.

The current plan is for this arch to remain experimental for FreeBSD 13.

This started as a weekend learning project for me and kinda snowballed from
there.

(More to follow momentarily.)

Reviewed by:	imp (earlier version), emaste
Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D26399
2020-09-22 23:49:30 +00:00
Konstantin Belousov
2be2e7e549 Remove stray line 2020-09-22 23:39:14 +00:00
Konstantin Belousov
b82149116a amd64 pmap: More unification for psind = 1 vs 2 in pmap_enter_largepage().
Move
  pkru check
  wait for page alloc
  wire accounting update
  asserting allowed updates for valid mappings
out of psind conditions.

Also add assert that psind references supported page size.
Remove not true comment.
Avoid uneccessary page table walks from top level.

Reviewed by:	alc, markj (previous version)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D26513
2020-09-22 23:28:06 +00:00