Commit Graph

278 Commits

Author SHA1 Message Date
adrian
12286510b6 Add a function which enables or disables RX RIFS searching, and migrate
the code which does this into it.
2011-05-06 15:33:56 +00:00
adrian
7bb431331f Don't perform NF calibration for radio chains which aren't in use:
Quoting the ath9k commit message:

At present the noise floor calibration is processed in supported
control and extension chains rather than required chains.
Unnccesarily doing nfcal in all supported chains leads to
invalid nf readings on extn chains and these invalid values
got updated into history buffer. While loading those values
from history buffer is moving the chip to deaf state.

This issue was observed in AR9002/AR9003 chips while doing
associate/dissociate in HT40 mode and interface up/down
in iterative manner. After some iterations, the chip was moved
to deaf state. Somehow the pci devices are recovered by poll work
after chip reset. Raading the nf values in all supported extension chains
when the hw is not yet configured in HT40 mode results invalid values.

Reference:	https://patchwork.kernel.org/patch/753862/

Obtained from:	Linux ath9k
2011-05-05 08:11:22 +00:00
adrian
737b9d0f91 Another Howl (AR9130) fix.
I haven't seen a 5ghz AR9130 based board yet though!

Obtained from:	Atheros
2011-05-05 04:43:05 +00:00
adrian
08029191f9 Fix up the chipset checks for the AR5416 and later silicon.
The checks should function as follows:

* AR_SREV_<silicon> : check macVersion matches that version id
* AR_SREV_<silicon>_<revision> : check macVersion and macRevision match
    the version / revision respectively

* AR_SREV_<silicon>_<revision>_OR_LATER: check that
  + if the chip silicon version == macVersion, enforce revision >= macRevision
  + if the chip silicon version > macVersion, allow it.

For example, AR_SREV_MERLIN() only matches AR9280 (any revision),
AR_SREV_MERLIN_10() would only match AR9280 version 1.0, but
AR_SREV_MERLIN_20_OR_LATER() matches AR9280 version >= 2.0 _AND_
any subsequent MAC (So AR9285, AR9287, etc.)

The specific fixes which may impact users:

* if there is Merlin hardware > revision 2.0, it'll now be correctly
  matched by AR_SREV_MERLIN_20_OR_LATER() - the older code simply
  would match on either Merlin 2.0 or a subsequent MAC (AR9285, AR9287, etc.)

* Kite version 1.1/1.2 should now correctly match. As these macros
  are used in the AR9285 reset/attach path, and it's assumed that the
  hardware is kite anyway, the behaviour shouldn't change. It'll only
  change if these macros are used in other codepaths shared with
  older silicon.

Obtained from:	Linux ath9k, Atheros
2011-05-05 03:42:04 +00:00
adrian
95651f0cfe Import some HOWL (AR9130) related fixes from Atheros.
Obtained from:	Atheros
2011-05-05 02:59:31 +00:00
adrian
0b969d4438 Remove this useless bit of code for Kite. The RIFS register value is overriden
by the initvals, so disabling RIFS before calling writeIni() effectively does
nothing.
2011-05-04 09:26:33 +00:00
adrian
192a770888 Remove some holdovers from the AR5212 origin of this code.
These aren't relevant here.
2011-04-29 12:52:18 +00:00
adrian
a4f08be08e Introduce AR9130 (HOWL) WMAC support to the FreeBSD HAL.
The AR9130 is an AR9160/AR5416 family WMAC which is glued directly
to the AR913x SoC peripheral bus (APB) rather than via a PCI/PCIe
bridge.

The specifics:

* A new build option is required to use the AR9130 - AH_SUPPORT_AR9130.
  This is needed due to the different location the RTC registers live
  with this chip; hopefully this will be undone in the future.
  This does currently mean that enabling this option will break non-AR9130
  builds, so don't enable it unless you're specifically building an image
  for the AR913x SoC.

* Add the new probe, attach, EEPROM and PLL methods specific to Howl.

* Add a work-around to ah_eeprom_v14.c which disables some of the checks
  for endian-ness and magic in the EEPROM image if an eepromdata block
  is provided. This'll be fixed at a later stage by porting the ath9k
  probe code and making sure it doesn't break in other setups (which
  my previous attempt at this did.)

* Sprinkle Howl modifications throughput the interrupt path - it doesn't
  implement the SYNC interrupt registers, so ignore those.

* Sprinkle Howl chip powerup/down throughout the reset path; the RTC methods
  were

* Sprinkle some other Howl workarounds in the reset path.

* Hard-code an alternative setup for the AR_CFG register for Howl, that
  sets up things suitable for Big-Endian MIPS (which is the only platform
  this chip is glued to.)

This has been tested on the AR913x based TP-Link WR-1043nd mode, in
legacy, HT/20 and HT/40 modes.

Caveats:

* 2ghz has only been tested. I've not seen any 5ghz radios glued to this
  chipset so I can't test it.

* AR5416_INTERRUPT_MITIGATION is not supported on the AR9130. At least,
  it isn't implemented in ath9k. Please don't enable this.

* This hasn't been tested in MBSS mode or in RX/TX block-aggregation mode.
2011-04-28 12:47:40 +00:00
adrian
104014c224 Wrap the MIMO stuff in #ifdef AH_SUPPORT_AR5416, as the channel
state doesn't have MIMO stuff in it by default.
2011-04-25 15:51:49 +00:00
adrian
38ad077cfd Break out the PLL setup into an overridable method.
The only method right now is ar5416InitPLL() which handles multiple
chipsets; this can now be overridden by newer chipset HAL code.
2011-04-24 15:53:57 +00:00
adrian
15a7e7ce81 Use the refactored ar5416WriteTxPowerRateRegisters() call in the ar9285 code. 2011-04-24 15:48:07 +00:00
adrian
51d82a74e9 Eliminate code duplication between AR5416/AR9160/AR9280 and AR9285.
Writing the TX power registers is the same between all of these chips
and later NICs (AR9287, AR9271 USB, etc.) so this will reduce code
duplication when those NICs are added to the HAL.
2011-04-24 14:50:29 +00:00
adrian
a7ea422c21 Fix a corner-case of interrupt handling which resulted in potentially
spurious (and fatal) interrupt errors.

One user reported seeing this:

Apr 22 18:04:24 ceres kernel: ar5416GetPendingInterrupts: fatal error,
  ISR_RAC 0x0 SYNC_CAUSE 0x2000

SYNC_CAUSE of 0x2000 is AR_INTR_SYNC_LOCAL_TIMEOUT which is a bus timeout;
this shouldn't cause HAL_INT_FATAL to be set.

After checking out ath9k, ath9k_ar9002_hw_get_isr() clears (*masked)
before continuing, regardless of whether any bits in the ISR registers
are set. So if AR_INTR_SYNC_CAUSE is set to something that isn't
treated as fatal, and AR_ISR isn't read or is read and is 0, then
(*masked) wouldn't be cleared. Thus any of the existing bits set
that were passed in would be preserved in the output.

The caller in if_ath - ath_intr() - wasn't setting the masked value
to 0 before calling ath_hal_getisr(), so anything that was present
in that uninitialised variable would be preserved in the case above
of AR_ISR=0, AR_INTR_SYNC_CAUSE != 0; and if the HAL_INT_FATAL bit
was set, a fatal condition would be interpreted and the chip was
reset.

This patch does the following:

* ath_intr() - set masked to 0 before calling ath_hal_getisr();
* ar5416GetPendingInterrupts() - clear (*masked) before processing
  continues; so if the interrupt source is AR_INTR_SYNC_CAUSE
  and it isn't fatal, the hardware isn't reset via returning
  HAL_INT_FATAL.

This doesn't fix any underlying errors which trigger
AR_INTR_SYNC_LOCAL_TIMEOUT - which is a bus timeout of some
sort - so that likely should be further investigated.
2011-04-23 06:37:09 +00:00
adrian
44325abfea Fix the merlin LNA configuration code - these are bit flags, not raw values to be
written into the registers.
2011-04-22 17:57:13 +00:00
adrian
d234d1f171 The second regdomain word is a set of bitflags describing
regulatory domain behaviour. Document what the v14 EEPROM
flags are.
2011-04-22 10:59:20 +00:00
adrian
28c3e6a80d Bring over a pdadc calibration fix from ath9k - unused power detector
gain values should be 58, not the previous values.

Obtained From:	linux ath9k
2011-04-22 10:57:46 +00:00
adrian
05db000c10 Rework the Global TX timeout handling to look more like ath9k.
It correctly now sets the AR_IMR BCNMISC register, along with
the GTT register in AR_IMR_S2.
2011-04-18 14:03:05 +00:00
adrian
8a4d8ea476 Add global TX timeout handling.
The global TX timeout counter increments whenever a frame is ready
to be transmitted and the medium is busy.
2011-04-18 12:15:43 +00:00
adrian
83df5db1b3 Mark the PHY as inactive before the chip is reset.
It's also marked inactive by the initvals, and enabled after
the baseband/PLL has been configured, but before the RF
registers have been programmed.

The origin and reason for this particular change is currently unknown.

Obtained from:	Linux ath9k
2011-04-17 13:46:13 +00:00
adrian
a80ffaaf3c Don't do Kite antenna switch selection this way (for now); antenna
diversity is done elsewhere now.
2011-04-16 13:47:17 +00:00
adrian
1d6c475a4a Disable classic-style fast diversity on the AR5416 and later.
Antenna diversity on the >= AR5416 is implemented differently than the
AR5212 and previous chips. So for now, and not to confuse things, just
disable it for now.
2011-04-16 12:46:46 +00:00
adrian
88b5211583 Remove some duplicate code from the AR9285 TX power configuration path. 2011-04-16 11:59:37 +00:00
adrian
9daf9758f8 Add in the last bit of the HAL support for Kite diversity.
* add a new method, specifically for doing per-RX packet
  antenna diversity
* set that HAL method only if it's Kite and a Kite chip that
  does diversity.
2011-04-13 15:12:48 +00:00
adrian
315a66d912 More kite diversity related changes.
* add a diversity flag to the HAL debugging section
* add a check to make sure the kite diversity code doesn't run
  on boards that don't require it, as not all Kite chips will
  implement it.
* add some debug statements when the diversity code makes
  changes to the antenna diversity/combining setup.
2011-04-13 15:08:51 +00:00
adrian
19aa12465f Change this to be less noisy. 2011-04-13 14:51:07 +00:00
adrian
c009611182 Bring over the antenna diversity logic support for Kite.
Again, this is just the code ported from ath9k and included in the build,
it isn't yet enabled.
2011-04-13 11:32:15 +00:00
adrian
4ea8c76a73 Port over a TX gain fix from ath9k specific to the AR9285 (Kite) and AR9271.
Note: this HAL currently only supports the AR9285.

From Linux ath9k:

The problem is that when the attenuation is increased,
the rate will start to drop from MCS7 -> MCS6, and finally
will see MCS1 -> CCK_11Mbps. When the rate is changed b/w
CCK and OFDM, it will use register desired_scale to calculate
how much tx gain need to change.

The output power with the same tx gain for CCK and OFDM modulated
signals are different. This difference is constant for AR9280
but not AR9285/AR9271. It has different PA architecture
a constant. So it should be calibrated against this PA
characteristic.

The driver has to read the calibrated values from EEPROM and set
the tx power registers accordingly.
2011-04-13 04:40:59 +00:00
adrian
e93a6b226a Add new fields to the v4k EEPROM modal header. 2011-04-13 03:05:42 +00:00
adrian
1a2dc5b1ed Add OS_REG_RMW, which mirrors ath9k's REG_RMW.
This macro does a read-modify-write pass with register bits to set and clear.
2011-04-13 03:05:15 +00:00
adrian
2271b77c59 Add the initial AR9285 PHY glue for supporting antenna diversity.
This code isn't currently used anywhere; it's just linked into the build.
2011-04-13 02:40:45 +00:00
adrian
4de87a7e28 De-dup the ar5416 rates array definition. 2011-04-11 11:15:34 +00:00
adrian
416bdcba5e Fix the completely wrong types I used in the previous commit. 2011-04-08 08:49:50 +00:00
adrian
85cfc21c68 Begin fleshing out a public HAL routine to export the per-chain
ctl/ext noise floor values.

This routine doesn't check to see whether the radio is MIMO
capable - instead, it simply returns either the raw values,
the "nominal" values if the raw values aren't yet available
or are invalid, or '0' values if there's no valid channel/
no valid MIMO values.

Callers are expected to verify the radio is a MIMO radio
(which for now means it's an 11n chipset, there are non-11n
MIMO chipsets out there but I don't think we support them,
at least in MIMO mode) before exporting the MIMO values.
2011-04-08 07:44:00 +00:00
adrian
01612edce6 Export the per-chain ctl/ext noise floor values, raw and uncut, to the
upper-level HAL.

Right now the per-chain noise floor values aren't used anywhere in
the upper-level HAL, so the driver currently has no real reference
to compare the per-chain RSSI values to.

This is needed before per-chain RSSI values (for ctl and ext radios)
are can be thrown upstairs to the net80211 code.
2011-04-08 06:58:01 +00:00
adrian
76769431e0 Extend the RX descriptor block to include two more EVM words.
This will be needed for later AR93xx/AR94xx 3-stream devices.
2011-04-08 06:29:41 +00:00
adrian
d582d39710 Add some more OS_MARK probes to the RX DMA setup/teardown code path.
I'm trying to debug the RX DMA path and help the ath9k guys with
"RX dma abort stuck" issue that both our drivers have.
2011-04-07 13:14:51 +00:00
adrian
9c386c4f5d The xpaBiasLvlFreq[] fields in the modal header also need swapping
when the EEPROM contents are byte-swapped.
2011-04-05 13:14:17 +00:00
adrian
548185cc91 Commit missing bits from the last commit:
* add the hal capability flag
* make sure its disabled for the ar9280/ar9285.
2011-04-04 14:53:36 +00:00
adrian
09aec381fa Add a HAL capability bit for supporting self-linked RX descriptors and disable it for the 11n chipsets.
From the ath9k source:

==

11N: we can no longer afford to self link the last descriptor.
MAC acknowledges BA status as long as it copies frames to host
buffer (or rx fifo). This can incorrectly acknowledge packets
to a sender if last desc is self-linked.

==

Since this is useful for pre-AR5416 chips that communicate PHY errors
via error frames rather than by on-chip counters, leave the support
in there, but disable it for AR5416 and later.
2011-04-04 14:52:31 +00:00
adrian
6893c14693 At least set the coverage class value here; worry about populating the
register values at a later date.
2011-04-04 11:01:53 +00:00
adrian
e36db9e5f9 I missed committing this last time - it's needed for the 5ghz fast clock calculation. 2011-04-03 20:15:41 +00:00
adrian
dd70a45751 Add in the clock timing calculation when Merlin is using the 5ghz fast clock.
This is a 44mhz clock, not a 40mhz clock like normal for 5ghz operation.
2011-04-03 17:36:32 +00:00
adrian
0bf4a6b02b Import a fix from the ath9k - reduce the TX FIFO size for Kite (AR9285.) 2011-04-03 12:02:49 +00:00
adrian
7f75384d40 Add an explanation of the inivals 2011-04-03 11:59:52 +00:00
adrian
e29d8f598e From ath9k - clear the RX descriptor status before recycling it. 2011-04-02 00:27:22 +00:00
adrian
4b46d6dec1 Add some more debugging 2011-04-02 00:24:13 +00:00
adrian
d9826cd23e Introduce AH_AR5416_INTERRUPT_MITIGATION which enables interrupt mitigation for
the AR5416 and later. Rename the older HAL option to use this.
2011-03-31 08:48:05 +00:00
adrian
8b50164a19 .. And another missed commit - add the PSPOLL capability. 2011-03-26 13:06:43 +00:00
adrian
b9966c9f48 This was missing from the previous HAL commit - it fixes a typo and
introduces the PS-POLL hardware support.
2011-03-26 11:59:18 +00:00
adrian
66cc5279f5 Introduce hardware PS-POLL support in the HAL.
Linux ath9k only enables this for AR9280 and later NICs; so
create a capability for it so it isn't enabled for earlier
NICs.

Enabling hardware PS-POLL support will come in a later commit
and will be disabled by default.
2011-03-26 10:47:17 +00:00