Commit Graph

208546 Commits

Author SHA1 Message Date
Ed Maste
03a5ea47c0 readelf: report value of unknown relocation types
Obtained from:	ELF Tool Chain r3387
Sponsored by:	The FreeBSD Foundation
2016-02-05 20:56:11 +00:00
Ed Maste
23541160bb readelf: avoid accidental fallthrough in RISC-V relocations
This would have printed an unknown RISC-V relocation type as a SPARC
relocation.

CID:		1331398
Obtained from:	ELF Tool Chain r3283
Sponsored by:	The FreeBSD Foundation
2016-02-05 20:54:51 +00:00
John Baldwin
5652770d8f Rename aiocblist to kaiocb and use consistent variable names.
Typically <foo>list is used for a structure that holds a list head in
FreeBSD, not for members of a list.  As such, rename 'struct aiocblist'
to 'struct kaiocb' (the kernel version of 'struct aiocb').

While here, use more consistent variable names for AIO control blocks:

- Use 'job' instead of 'aiocbe', 'cb', 'cbe', or 'iocb' for kernel job
  objects.
- Use 'jobn' instead of 'cbn' for use with TAILQ_FOREACH_SAFE().
- Use 'sjob' and 'sjobn' instead of 'scb' and 'scbn' for fsync jobs.
- Use 'ujob' instead of 'aiocbp', 'job', 'uaiocb', or 'uuaiocb' to hold
  a user pointer to a 'struct aiocb'.
- Use 'ujobp' instead of 'aiocbp' for a user pointer to a 'struct aiocb *'.

Reviewed by:	kib
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D5125
2016-02-05 20:38:09 +00:00
Mark Johnston
3f38e13073 Plug a vm_page leak introduced in r292373.
Reported by:	vangyzen
2016-02-05 19:35:53 +00:00
Alexander Motin
b1963ead44 Update script for modern zpool status output. 2016-02-05 18:17:37 +00:00
Alexander Motin
b0fcd5fba2 Add error check to not leak logs with syntax errors in case of failed
`zpool history`.

MFC after:	1 month
2016-02-05 17:28:11 +00:00
Eric Joyner
c80429cedb Update em(4) to 7.6.1; update igb(4) to 2.5.3.
Major changes:

- Add i219/i219(2) hardware support. (Found on Skylake generation and newer
  chipsets.)
  - Further to the last Skylake support diff, this one also includes support for
    the Lewisburg chipset (i219(3)).

- Add a workaround to an igb hardware errata.
  All 1G server products need to have IPv6 extension header parsing turned off.
  This should be listed in the specification updates for current 1G server
  products, e.g. for i350 it's errata #37 in this document:
  http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/ethernet-controller-i350-spec-update.pdf

- Avoton (i354) PHY errata workaround added

And a bunch of minor fixes, as well as #defines for things that the current
em(4)/igb(4) drivers don't implement.

Differential Revision: https://reviews.freebsd.org/D3162
Reviewed by: sbruno, marius, gnn
Approved by: gnn
MFC after: 2 weeks
Sponsored by: Intel Corporation
2016-02-05 17:14:37 +00:00
Andrew Turner
55beb2a538 Implement kdb_cpu_sync_icache on arm64.
Sponsored by:	ABT Systems Ltd
2016-02-05 15:38:28 +00:00
Steven Hartland
89b50f6b4d Fix EFI multi device boot support
Fix EFI boot support when presented with multiple valid boot partitions
across multiple devices.

It now prefers to boot from partitions that are present on the underlying
device that the boot1 image was loaded from. This means that it will boot
from the partitions on device the user chose from EFI boot menu in
preference to those on other devices.

Also fixed is the recovery from a failed attempt to boot, from a seemingly
valid partition, by continuing to trying all other available partitions
no matter what the error.

boot1 now use * to signify a partition what was accepted from the preferred
device and + otherwise.

Finally some error messages where improved and DPRINTF's with slowed boot
to aid debugging.

ZFS will still be preferred over UFS when both are available on the boot
device.

Reviewed by:	imp
MFC after:	1 week
Sponsored by:	Multiplay
Differential Revision:	https://reviews.freebsd.org/D5108
2016-02-05 15:35:33 +00:00
Michal Meloun
a89156f53f ARM: Use new ARMv6 naming conventions for cache and TLB functions
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
2016-02-05 14:57:41 +00:00
Svatopluk Kraus
3af1c2aae2 Follow up r295257 and replace bad reference to TEX in defines,
variables and functions. This stuff is named properly now.

Thus, the VM_MEMATTR_xxx is an index to PTE2 attribute table.

Pointy hat to:	skra
2016-02-05 11:28:35 +00:00
Svatopluk Kraus
a901e7b637 Follow up r295257 and convert also pt_memattr. This did not break
anything as both VM_MEMATTR_WB_WA and PTE2_ATTR_WB_WA are zero.
Correct also type of pmap_dcache_wb_pou() last argument.
2016-02-05 10:40:01 +00:00
Michal Meloun
3025d19dfc ARM: Introduce new cpu-v4.h header and move all ARMv4 specific code
from cpu-v6.h to it.
Remove unneeded cpu-v6.h includes.
2016-02-05 09:46:24 +00:00
Sepherosa Ziehau
3fd8cd9ce4 hyperv: Use malloc for page allocation.
We will eventually convert them to use busdma.

Submitted by:	Jun Su <junsu microsoft com>
Reviewed by:	adrian, sephe, Dexuan Cui <decui microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5087
2016-02-05 07:29:11 +00:00
Sepherosa Ziehau
27cc90ebb1 hyperv: Use WAITOK in the places where we can wait
And convert rndis non-hot path spinlock to mutex.

Submitted by:	Jun Su <junsu microsoft com>
Reviewed by:	adrian, sephe
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5081
2016-02-05 07:20:31 +00:00
Sepherosa Ziehau
f11ef33f0d hyperv: Use standard taskqueue instead of hv_work_queue
HyperV code was ported from Linux.  There is an implementation of
work queue called hv_work_queue.  In FreeBSD, taskqueue could be
used for the same purpose.  Convert all the consumer of hv_work_queue
to use taskqueue, and remove work queue implementation.

Submitted by:	Jun Su <junsu microsoft com>
Reviewed by:	adrian, Hongjiang Zhang <honzhan microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D4963
2016-02-05 07:09:58 +00:00
Sepherosa Ziehau
a7f84cedee hyperv/hn: Add an option to always do transmission scheduling
It is off by default. This eases more experiment on hn(4).

Reviewed by:	adrian, Hongjiang Zhang <honzhan microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5175
2016-02-05 05:50:53 +00:00
Sepherosa Ziehau
62c328f0c4 hyperv/hn: Move LRO flush to the channel processing rollup
This significantly increases LRO aggregation ratio when there are
large amount of connections (improves reception performance a lot).

Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5167
2016-02-05 05:44:31 +00:00
Sepherosa Ziehau
e35e485b04 hyperv/hn: Increase LRO entry count to 128 by default
hn(4) only has one RX ring currently, so default 8 LRO entries
are too small.

Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5166
2016-02-05 05:38:01 +00:00
Sepherosa Ziehau
1e4bb37d22 hyperv/hn: Recover half of the chimney sending space
We lost half of the chimney sending space, because we mis-used
ffs() on a 64 bits mask, where ffsl() should be used.

While I'm here:
- Use system atomic operation instead.
- Stringent chimney sending index assertion.

Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5159
2016-02-05 05:31:31 +00:00
Sepherosa Ziehau
b256e94549 hyperv/hn: Factor out hn_encap() from hn_start_locked()
It will be shared w/ upcoming ifnet.if_transmit implementaion.

No functional changes.

Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5158
2016-02-05 05:25:11 +00:00
Sepherosa Ziehau
58d6fc930e hyperv/hn: Obey IFCAP_RXCSUM configure
Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5104
2016-02-05 05:17:48 +00:00
Sepherosa Ziehau
b8109bd09e hyperv/hn: Add sysctls to trust host side UDP and IP csum verification
Reviewed by:	adrian, Hongjiang Zhang <honzhan microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5103
2016-02-05 05:12:30 +00:00
Sepherosa Ziehau
51ae346f9d hyperv/hn: Enable UDP RXCSUM
Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5102
2016-02-05 05:06:14 +00:00
Sepherosa Ziehau
b0fde7e820 hyperv/hn: Enable IP header checksum offloading
So that:
- TCP/IP stack will not do unnecessary IP header checksum for TSO
  packets.
- Reduce guest load for non-TSO IP packets.

Reviewed by:	adrian
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5099
2016-02-05 05:01:02 +00:00
Sepherosa Ziehau
74506a55d6 hyperv/hn: Reorganize TX csum offloading
- For non-TSO offloading, we don't need to access mbuf to know
  which csum offloading is requested, we can just use the
  CSUM_{IP,TCP,UDP} in the csum_flags.
- For TSO offloading, we still can depend on CSUM_{TSO4,TSO6}
  in the csum_flags to tell whether the TSO packet is an IPv4
  TSO packet or an IPv6 TSO packet.

This streamlines csum offloading handling (remove the two goto)
and allows us the nuke the unnecessary get_transport_proto_type().

Reviewed by:	adrian, Hongjiang Zhang <honzhan microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5098
2016-02-05 04:10:04 +00:00
Sepherosa Ziehau
82db5a8905 hyperv/hn: Avoid duplicate csum features settings
- Record csum features in softc, so we don't need to duplicate the
  logic from attach path to ioctl path.
- Protect if_capenable and if_hwassist changes by main lock.
- Prefer turn on/off bits in if_hwassist explicitly instead of using
  XOR.

Reviewed by:	adrian, Hongjiang Zhang <honzhan microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5085
2016-02-05 04:03:50 +00:00
Sepherosa Ziehau
f70c7ffe5e hyperv/stor: Fix the NULL pointer dereference
Reported by:	Netapp
Submitted by:	Hongjiang Zhang <honzhan microsoft com>
Reviewed by:	adrian, sephe, Dexuan Cui <decui microsoft com>
Approved by:	adrian (mentor)
MFC after:	1 week
Sponsored by:	Microsoft OSTC
Differential Revision:	https://reviews.freebsd.org/D5097
2016-02-05 03:46:53 +00:00
Scott Long
ee5c196b0a Add sysctls for dumping out the device mapping tables. I'm finding this
useful for debugging device-target translation bugs.

MFC after:	3 days
Sponsored by:	Netflix
2016-02-04 23:38:55 +00:00
Adrian Chadd
3f84dfc1cd Provide a workaround for setting the correct endianness when doing CFI on
a mips big-endian board.

This is (hopefully! ish!) a temporary change until a slightly better way
can be found to express this without a config option.

Tested:

* BUFFALO WZR-HP-G300NH 1stGen (by submitter)

Submitted by:	Mori Hiroki <yamori813@yahoo.co.jp>
2016-02-04 22:39:27 +00:00
George V. Neville-Neil
24e61dbfdd Summary: Update the date 2016-02-04 21:46:37 +00:00
George V. Neville-Neil
208ccc1284 Summary: Remove discussion of fastforwarding. 2016-02-04 21:39:58 +00:00
Konstantin Belousov
af582aaed1 When matching brand to the ELF binary by notes, try to find a brand
with interpreter name exactly matching one wanted by the binary.  If
no such brand exists, return first brand which accepted the binary by
note.

The change fixes a regression after r292749, where e.g. our two ia32
compat brands, ia32_brand_info and ia32_brand_oinfo, only differ by
the interpeter path and binary matches to a brand by linkage order.
Then old binaries which require /usr/libexec/ld-elf.so.1 but matched
against ia32_brand_info with interp_path /libexec/ld-elf.so.1, were
considered requiring non-standard interpreter name, and magic to force
ld-elf32.so.1 did not happen.

Note that it might make sense to apply the same selection of brands
for other matching criteria, SCO EI_OSABI and 3.x string.

Reported and tested by:	dwmalone
Sponsored by:	The FreeBSD Foundation
MFC after:	3 days
2016-02-04 20:55:49 +00:00
Ravi Pokala
dd4637c078 Add defines for WRITE_UNCORRECTABLE ATA command, and improve command logging
Add #defines for ATA_WRITE_UNCORRECTABLE48 and its features. Update the
decoding in ATACAM to recognize the new values. Also improve command
decoding for a few other commands (SMART, NOP, SET_FEATURES). Bring the
decoding in ata(4) up to parity with ATACAM.

Reviewed by:	mav, imp
MFC after:	1 month
Sponsored by:	Panasas, Inc.
Differential Revision:	https://reviews.freebsd.org/D5181
2016-02-04 19:53:54 +00:00
Michael Tuexen
2602455cc2 In FreeBSD 10 and higher the driver announces SCTP checksum offloading support
also for 82598, which doesn't support it.
The legacy code has a check for it, which was missed when the code for dealing with
CSUM_IP6_* was added. Add the same check for FreeBSD 10 and higher.

Differential Revision:	https://reviews.freebsd.org/D5192
2016-02-04 18:08:50 +00:00
Jason Helfman
74f9cea2d3 - connect(2) Clarify namelen
PR:		206838
Submitted by:	t@tobik.me
Approved by:	bcr (mentor)
MFH:		after 1 week
Differential Revision:	https://reviews.freebsd.org/D5194
2016-02-04 18:03:06 +00:00
John Baldwin
aa59d767c7 Fix build of powerpc FPU emulator after changes in r295132 to restore the
ABI of struct fpreg.  The FPU emulator operates on the "raw" FPU state
stored in the pcb rather than the "cooked" fpreg state used for ptrace()
and cores.

Reported by:	bz
2016-02-04 17:43:56 +00:00
Andrew Turner
f13ec4b40e Enable checking of the stack alignment. The stack should be aligned to a
16-byte value. With this the hardware will check if a memory access uses
an incorrectly aligned stack pointer as the base address.

Sponsored by:	ABT Systems Ltd
2016-02-04 17:22:15 +00:00
Devin Teske
b5d189b6b6 Fix grammar in error statement
s/consider to migrate to jail.conf/consider migrating to jail.conf/
2016-02-04 17:09:43 +00:00
Michal Meloun
49475a5b47 Replace broken implementation of fuswintr() and suswintr() by functions
which return -1 as well as on tier 1 archs. Remove block_userspace_access
used only in these implementations.

(1) These functions may be called in interrupt context and pcb_onfault
can be already set in this time. Thus, prior pcb_onfault must be saved
and restored afterwards.

(2) The check that an abort came either from nested interrupt or while
in critical section or holding not sleepable lock must be avoided for
this case.

These functions are called only for profiling reason, so there will be
only small gain by making the code more complex.
2016-02-04 17:01:38 +00:00
Konstantin Belousov
76c404fce5 Do not copy by field when converting struct oexport_args to struct
export_args on mount update, bzero() is consistent with
vfs_oexport_conv().
Make the code structure more explicit by using switch.
Return EINVAL if export option layout (deduced from size) is unknown.

Based on the submission by:	bde
Sponsored by:	The FreeBSD Foundation
2016-02-04 16:32:21 +00:00
Edward Tomasz Napierala
e53d0abf73 Add 't' and 'p' postfixes to dd(1).
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
2016-02-04 15:21:01 +00:00
Edward Tomasz Napierala
66d082c84b Reduce code duplication.
MFC after:	1 month
Sponsored by:	The FreeBSD Foundation
2016-02-04 15:10:08 +00:00
Michal Meloun
dfa0f9c66a ARM: For ARMv6/v7, code in locore.S initializes SCTLR and ACTRL registers.
Don't duplicate this initialization in cpu_setup().
2016-02-04 14:32:48 +00:00
Ruslan Bukin
e3ee7f49f1 Access pcpup using gp register. 2016-02-04 14:30:46 +00:00
Svatopluk Kraus
82f313b3f0 Make VM_MEMATTR_xxx definitions independent on pmap internals
for __ARM_ARCH >= 6.

It's TEX class number now, so it still has some meaning.
2016-02-04 14:15:24 +00:00
Michal Meloun
a65bd3c84b ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP
for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
This bit have no effect until unaligned access is enabled.
2016-02-04 14:02:42 +00:00
Svatopluk Kraus
f196c10421 Small rearrangement of abort_handler().
(1) Move cnt.v_trap increment to the beginning. There is cnt.v_vm_faults
counter in vm_fault(), so a number of hardware emulation aborts may be
get roughly as difference.
(2) Move kdb_reenter() up to not be ignored if pmap_fault() has failed.
(3) Update comments.
2016-02-04 13:35:40 +00:00
Michal Meloun
f7e5efbbae ARM: RPI-B kernel was broken by r294740. Make it functional again. 2016-02-04 13:32:29 +00:00
Ruslan Bukin
4d50647d52 Reuse gp register for pcpu pointer.
gp (global pointer) is used by compiler in userland only,
so re-use it for pcpup in kernel, save it on stack on switching
out to userland and load back on return to kernel.

Discussed with:	jhb, andrew, kib
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D5178
2016-02-04 12:49:28 +00:00