Commit Graph

27 Commits

Author SHA1 Message Date
hrs
b36d757c0b Add support for Marvell 88F6282.
Sponsored by:	Plat'Home, Co.,Ltd.
2012-07-28 21:56:24 +00:00
mav
2836cfaf80 - Limit r214102 workaround to only x86. On arm it causes more problems
then solves because of cache coherency issues. This fixes periodic error
messages on console and command timeouts.
 - Patch SATA PHY configuration for 65nm SoCs to improve SNR same as
Linux does.

MFC after:	2 weeks
2012-06-12 11:08:51 +00:00
mav
6450bdd899 Partially revert r236666:
Return PROTO_ATA protocol in response to XPT_PATH_INQ.

smartmontools uses it to identify ATA devices and I don't know any other
place now where it is important. It could probably use XPT_GDEV_TYPE
instead for more accurate protocol information, but let it live for now.

Reported by:	matthew
MFC after:	3 days
2012-06-10 11:17:14 +00:00
mav
ee6412e858 ATA/SATA controllers have no idea about protocol of the connected device
until transport will do some probe actions (at least soft reset).
Make ATA/SATA SIMs to not report bogus and confusing PROTO_ATA protocol.
Make ATA/SATA transport to fill that gap by reporting protocol to SIM with
XPT_SET_TRAN_SETTINGS and patching XPT_GET_TRAN_SETTINGS results if needed.
2012-06-06 06:52:51 +00:00
mav
693ceab23e Add two functions xpt_batch_start() and xpt_batch_done() to the CAM SIM KPI
to allow drivers to handle request completion directly without passing
them to the CAM SWI thread removing extra context switch.
Modify all ATA/SATA drivers to use them.

Reviewed by:	gibbs, ken
MFC after:	2 weeks
2012-05-12 13:55:36 +00:00
raj
b1a5cbc2ba Adjust mvs(4) to handle interrupt cause reg depending on the actual number of
channels available

- current code treats bits 4:7 in 'SATAHC interrupt mask' and 'SATAHC
  interrupt cause' as flags for SATA channels 2 and 3

- for embedded SATA controllers (SoC) these bits have been marked as reserved
  in datasheets so far, but for some new and upcoming chips they are used for
  purposes other than SATA

Submitted by:	Lukasz Plachno
Reviewed by:	mav
Obtained from:	Semihalf
MFC after:	2 weeks
2012-02-01 13:39:52 +00:00
hselasky
53a216b722 Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
hselasky
3bcdb8772a Move the device_delete_all_children() function from usb_util.c
to kern/subr_bus.c. Simplify this function so that it no longer
depends on malloc() to execute. Identify a few other places where
it makes sense to use device_delete_all_children().

MFC after:	1 week
2011-11-19 10:11:50 +00:00
ed
e97eae1577 Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.
This means that their use is restricted to a single C file.
2011-11-07 06:44:47 +00:00
mav
ddcb287699 According to SATA specification, when Serial ATA Enclosure Management Bridge
(SEMB) is unable to communicate to Storage Enclosure Processor (SEP), in
response to hard and soft resets it should among other things return value
0x7F in Status register. The weird side is that it means DRQ bit set, which
tells that reset request is not completed. It would be fine if SEMB was the
only device on port. But if SEMB connected to PMP or built into it, it may
block access to other devices sharing same SATA port.

Make some tunings/fixes to soft-reset handling to workaround the issue:
 - ahci(4): request CLO on the port after soft reset to ignore DRQ bit;
 - siis(4): gracefully reinitialize port after soft reset timeout (hardware
doesn't detect reset request completion in this case);
 - mvs(4): if PMP is used, send dummy soft-reset to the PMP port to make it
clear DRQ bit for us.

For now this makes quirks in ata_pmp.c, hiding SEMB ports of SiI3726/SiI4726
PMPs, less important. Further, if hardware permit, I hope to implement real
SEMB support.
2011-05-25 13:55:49 +00:00
mav
ccce60bdeb Fix some English grammar. 2011-04-19 10:57:40 +00:00
mav
0b4c448250 According to specification. device should respond to COMRESET with COMINIT
in no more then 10ms. If we detected no device presence within that time,
there is no reason to wait longer.
2011-04-19 10:51:19 +00:00
mav
cc8f016bc1 Properly handle memory allocation errors during error recovery. 2011-04-19 08:01:17 +00:00
mav
98e5071ee7 Refactor hard-reset implementation in mvs(4).
Instead of spinning in a tight loop for up to 15 seconds, polling for device
readiness while it spins up, return reset completion just after PHY reports
"connect well" or 100ms connection timeout. If device was found, use callout
for checking device readiness with 100ms period up to full 31 second timeout.

This fixes system freeze for 5-10 seconds on drives hot plug-in.
2011-04-14 07:49:45 +00:00
mav
193a7ed98c Improve SATA Asynchronous Notification feature support in CAM:
- make SATA SIMs announce capabilities to handle SDB with Notification bit;
 - make PMP driver honor this SIMs capability;
 - make SATA XPT to negotiate and enable this feature for ATAPI devices.

This feature allows supporting SATA ATAPI devices to inform system about
some events happened, that may require attention. In my case this allows
LG GH22LS50 SATA DVR-RW drive to report tray open/close events. Events
reported to CAM in form of AC_SCSI_AEN async. Further they could be used
as a hints for checking device status and reporting media change to upper
layers, for example, via spoiling mechanism of GEOM.
2011-04-13 16:20:54 +00:00
mav
9f2652dbbc Implement automatic SCSI sense fetching for mvs(4).
Make few improvements/changes to ATAPI PIO support to pass most of scgcheck
(cdrtools) tests.
2011-04-12 16:01:27 +00:00
mav
5a15df2be8 Update mvs(4) driver to work over FDT's simplebus(4) bus. 2011-03-28 11:08:58 +00:00
mav
3def9492c7 Workaround strange situation when EDMA_RESQIP register returns zero instead
of proper value. It caused bunch of "EMPTY CRPB" messages and potentially
may cause premature requests completion, which could cause data corruption.
For most cases it seems enough to just reread register to get proper value.
To protect against worse cases - erase processed queue entries with
impossible values and ignore them if problem still happen.
2010-10-20 07:47:31 +00:00
mav
07d00671e9 Some style cleanup:
- remove commented debugging code;
- wrap long lines.
2010-10-20 07:22:34 +00:00
mav
c24aa138ad Fix panic, when due to some kind of congestion on FIS-based switching
port multiplier some command triggers false positive timeout, but then
completes normally.

MFC after:	2 weeks
2010-09-16 12:39:50 +00:00
mav
68b26f6649 Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers to
GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
2010-07-25 15:43:52 +00:00
mav
facac1187d Plug memory leak to silent Coverity. Error is still not really handled.
Found with:   Coverity Prevent(tm)
CID:          4137
2010-06-05 08:21:18 +00:00
mav
98a829859d Fill rman range start/end values. It makes devinfo output more readable. 2010-05-22 08:30:47 +00:00
mav
810a32455d Report ATA/SATA channel number to NewBus at location string. 2010-05-22 07:32:47 +00:00
mav
2c96d9f1c5 Improve suspend/resume support. Make sure controller is idle on suspend
and reset it on resume.
2010-05-21 17:26:16 +00:00
mav
9ba3275800 Fix polled operation. Now it is possible to dump kernel via mvs(4). 2010-05-06 06:44:26 +00:00
mav
071496a9c7 Import mvs(4) - Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA controllers
driver for CAM ATA subsystem. This driver supports same hardware as
atamarvell, ataadaptec and atamvsata drivers from ata(4), but provides
many additional features, such as NCQ, PMP, etc.
2010-05-02 19:28:30 +00:00