Commit Graph

257 Commits

Author SHA1 Message Date
hselasky
35b126e324 Pull in r267961 and r267973 again. Fix for issues reported will follow. 2014-06-28 03:56:17 +00:00
gjb
fc21f40567 Revert r267961, r267973:
These changes prevent sysctl(8) from returning proper output,
such as:

 1) no output from sysctl(8)
 2) erroneously returning ENOMEM with tools like truss(1)
    or uname(1)
 truss: can not get etype: Cannot allocate memory
2014-06-27 22:05:21 +00:00
hselasky
bd1ed65f0f Extend the meaning of the CTLFLAG_TUN flag to automatically check if
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.

Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.

MFC after:	2 weeks
Sponsored by:	Mellanox Technologies
2014-06-27 16:33:43 +00:00
kib
23d48b19e1 For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of the
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.

The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.

Reviewed by:	davide, fabient
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2014-06-04 16:06:38 +00:00
gnn
17a2ad14fc Add missing Ivy Bridge and Haswell events.
Submitted by: Anton Rang <rang@mac.com>
MFC: 2 weeks
2014-06-02 20:50:08 +00:00
markj
1ee93b78d4 Remove some prototypes for undefined functions.
MFC after:	3 days
2014-05-15 21:19:13 +00:00
jhibbits
c76bc003ed Enable and disable the PMC unit at load/unload time, respectively.
MFC after:	3 weeks
2014-04-18 06:39:00 +00:00
hiren
2babaa36d7 Update hwpmc to support core events for Atom Silvermont microarchitecture.
(Model 0x4D as per Intel document 330061-001 01/2014)

Tested by:	Olivier Cochard-Labbe <olivier@cochatrd.me>
MFC after:	4 weeks
2014-03-20 20:51:08 +00:00
rwatson
33fdc14c0c Update kernel inclusions of capability.h to use capsicum.h instead; some
further refinement is required as some device drivers intended to be
portable over FreeBSD versions rely on __FreeBSD_version to decide whether
to include capability.h.

MFC after:	3 weeks
2014-03-16 10:55:57 +00:00
eadler
1130a4041b Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:40 +00:00
eadler
448a71e0c6 Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:01 +00:00
kib
801489b5e7 Use correct types for sizeof() in the calculations for the malloc(9) sizes [1].
While there, remove unneeded checks for failed allocations with M_WAITOK flag.

Submitted by:	Conrad Meyer <cemeyer@uw.edu> [1]
MFC after:	1 week
2014-03-12 10:25:26 +00:00
jhibbits
5873400b7c Fix callchain capture for hwpmc(4). While here, some style(9) fixes, too.
MFC after:	2 weeks
2014-02-27 04:45:29 +00:00
jhibbits
859fb3bb22 Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
2014-02-01 02:03:50 +00:00
jhibbits
c7db1aef3d MPC74xx should not fall through, to the error case.
MFC after:	1 week
2014-01-25 22:50:42 +00:00
jhb
b2533ec507 Move <machine/apicvar.h> to <x86/apicvar.h>. 2014-01-23 20:10:22 +00:00
gnn
39ab4f7cb2 Add another Haswell model (0x45) to the set of supported chips.
Model 0x45 appears, for example, in late 2013 Mac Book Pro models
and is properly emulated by VMware.
2013-12-20 20:22:10 +00:00
attilio
10b4f63c53 o Remove assertions on ipa_version as sometimes the version detection
using cpuid can be quirky (this is the case of VMWare without the
  vPMC support) but fail to probe hwpmc.
o Apply the fix for XEON family of processors as established by
  315338-020 document (bug AJ85).

Sponsored by:	EMC / Isilon storage division
Reviewed by:	fabient
2013-12-20 14:03:56 +00:00
jhibbits
c4ffb19933 Add userland PMC backtracing, and use the PMC trapframe macros for kernel
backtraces.

MFC after:	1 week
2013-12-14 20:12:28 +00:00
eadler
44c01df173 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
davide
023fd8bc67 Remove local change leftover, this should never have been part of
r255745.

Pointy-hat to:	davide
Approved by:	re (implicit)
2013-09-20 23:10:52 +00:00
davide
5273d359fd Fix lc_lock/lc_unlock() support for rmlocks held in shared mode. With
current lock classes KPI it was really difficult because there was no
way to pass an rmtracker object to the lock/unlock routines. In order
to accomplish the task, modify the aforementioned functions so that
they can return (or pass as argument) an uinptr_t, which is in the rm
case used to hold a pointer to struct rm_priotracker for current
thread. As an added bonus, this fixes rm_sleep() in the rm shared
case, which right now can communicate priotracker structure between
lc_unlock()/lc_lock().

Suggested by:	jhb
Reviewed by:	jhb
Approved by:	re (delphij)
2013-09-20 23:06:21 +00:00
jhibbits
2764ddeb0a Fix the build. 2013-09-05 01:13:26 +00:00
pjd
029a6f5d92 Change the cap_rights_t type from uint64_t to a structure that we can extend
in the future in a backward compatible (API and ABI) way.

The cap_rights_t represents capability rights. We used to use one bit to
represent one right, but we are running out of spare bits. Currently the new
structure provides place for 114 rights (so 50 more than the previous
cap_rights_t), but it is possible to grow the structure to hold at least 285
rights, although we can make it even larger if 285 rights won't be enough.

The structure definition looks like this:

	struct cap_rights {
		uint64_t	cr_rights[CAP_RIGHTS_VERSION + 2];
	};

The initial CAP_RIGHTS_VERSION is 0.

The top two bits in the first element of the cr_rights[] array contain total
number of elements in the array - 2. This means if those two bits are equal to
0, we have 2 array elements.

The top two bits in all remaining array elements should be 0.
The next five bits in all array elements contain array index. Only one bit is
used and bit position in this five-bits range defines array index. This means
there can be at most five array elements in the future.

To define new right the CAPRIGHT() macro must be used. The macro takes two
arguments - an array index and a bit to set, eg.

	#define	CAP_PDKILL	CAPRIGHT(1, 0x0000000000000800ULL)

We still support aliases that combine few rights, but the rights have to belong
to the same array element, eg:

	#define	CAP_LOOKUP	CAPRIGHT(0, 0x0000000000000400ULL)
	#define	CAP_FCHMOD	CAPRIGHT(0, 0x0000000000002000ULL)

	#define	CAP_FCHMODAT	(CAP_FCHMOD | CAP_LOOKUP)

There is new API to manage the new cap_rights_t structure:

	cap_rights_t *cap_rights_init(cap_rights_t *rights, ...);
	void cap_rights_set(cap_rights_t *rights, ...);
	void cap_rights_clear(cap_rights_t *rights, ...);
	bool cap_rights_is_set(const cap_rights_t *rights, ...);

	bool cap_rights_is_valid(const cap_rights_t *rights);
	void cap_rights_merge(cap_rights_t *dst, const cap_rights_t *src);
	void cap_rights_remove(cap_rights_t *dst, const cap_rights_t *src);
	bool cap_rights_contains(const cap_rights_t *big, const cap_rights_t *little);

Capability rights to the cap_rights_init(), cap_rights_set(),
cap_rights_clear() and cap_rights_is_set() functions are provided by
separating them with commas, eg:

	cap_rights_t rights;

	cap_rights_init(&rights, CAP_READ, CAP_WRITE, CAP_FSTAT);

There is no need to terminate the list of rights, as those functions are
actually macros that take care of the termination, eg:

	#define	cap_rights_set(rights, ...)				\
		__cap_rights_set((rights), __VA_ARGS__, 0ULL)
	void __cap_rights_set(cap_rights_t *rights, ...);

Thanks to using one bit as an array index we can assert in those functions that
there are no two rights belonging to different array elements provided
together. For example this is illegal and will be detected, because CAP_LOOKUP
belongs to element 0 and CAP_PDKILL to element 1:

	cap_rights_init(&rights, CAP_LOOKUP | CAP_PDKILL);

Providing several rights that belongs to the same array's element this way is
correct, but is not advised. It should only be used for aliases definition.

This commit also breaks compatibility with some existing Capsicum system calls,
but I see no other way to do that. This should be fine as Capsicum is still
experimental and this change is not going to 9.x.

Sponsored by:	The FreeBSD Foundation
2013-09-05 00:09:56 +00:00
jhibbits
6fc9e86bed Fix hwpmc(4) for 32-bit PowerPC. 2013-09-04 04:11:38 +00:00
jhibbits
241d6ad5a0 Refactor PowerPC hwpmc(4) driver into generic and specific. More refactoring
will likely be done as more drivers are added, since AIM-compatible processors
have similar PMC configuration logic.
2013-09-03 00:34:18 +00:00
davide
0920b58072 Complete r250105. Do not zero fields if M_ZERO flag is specified to
malloc(9).

Reported by:	pluknet, glebius
2013-09-01 21:44:43 +00:00
adrian
41d7ccf605 Remove the duplicate LLC_MISS event and put it in the right order. 2013-08-29 13:52:51 +00:00
adrian
1f5f1f4e50 Update the mis-predicted branch PMC names (for sandy bridge) to not clash.
The SDM (June 2013) tables on these are rather confusing.  Yes, they
assign the same name (BR_MISP_RETIRED.ALL_BRANCHES) to two codes
(C5H/00H and C5H/04H.) The latter however is the PEBS version.

So, to make it easier to see the difference - and yes, we can use
both without having to actually enable the PEBS specific bits! -
just rename the PEBS one to _PS so there's no clashing.

Tested:

* Sandy bridge
2013-08-25 12:58:34 +00:00
adrian
99136ad2af Fix a >80 character long line, introduced in my previous commit.
Noticed by: hiren
2013-08-25 12:02:20 +00:00
adrian
055650f8c7 Update the MEM_UOP_RETIRED PMC operation for sandy bridge and sandy
bridge Xeon.

Summary: These are PEBS events but they're also available as normal
counter/sample events.  The source table (Table 19-2) lists the
base versions (LOAD, STLB_MISS, SPLIT, ALL) but it says they must
be qualified with other values.  This particular commit fleshes
out those umask values.

Source:

* Linux; SDM June 2013, Volume 3B, Table 19-2 and 18-21.

Tested:

* Sandy Bridge (non-Xeon)
2013-08-25 02:07:28 +00:00
markj
3541d8b143 Rename the kld_unload event handler to kld_unload_try, and add a new
kld_unload event handler which gets invoked after a linker file has been
successfully unloaded. The kld_unload and kld_load event handlers are now
invoked with the shared linker lock held, while kld_unload_try is invoked
with the lock exclusively held.

Convert hwpmc(4) to use these event handlers instead of having
kern_kldload() and kern_kldunload() invoke hwpmc(4) hooks whenever files are
loaded or unloaded. This has no functional effect, but simplifes the linker
code somewhat.

Reviewed by:	jhb
2013-08-24 21:13:38 +00:00
adrian
6d47a8c959 Change the name of this particular event to reflect the name used in
Linux and Intel examples.

Sourced:

* https://github.com/andikleen/pmu-tools/blob/master/snb-client.csv
* http://software.intel.com/en-us/comment/1747932#comment-1747932

Note:

* It's not currently in the Intel SDM; I need to chase down what's
  going on.

Tested:

* Sandy Bridge
2013-08-21 21:47:56 +00:00
bz
197a6108f9 Correct a typo in the event mask mnemonic.
Reviewed by:	gnn
MFC after:	3 days
2013-08-20 14:59:31 +00:00
adrian
e405686dc7 Add in missing events for Sandy Bridge Xeon.
* Add in MEM_LOAD_UOPS_LLC_HIT_RETIRED for both sandy bridge and sandy
  bridge Xeon.  Right now it only is enabled for Sandy Bridge.
* D2/0F is actually a combination rather than a separate counter, so
  just flip that on for the CPU types that support it.

There's an errata for using this on SB Xeon hardware - I've documented
it in kern/181346.

Tested:

* Sandy Bridge
* Sandy Bridge Xeon

Sponsored by:	Netflix, Inc.
2013-08-18 06:08:52 +00:00
alc
b4fae70474 Relax the vm object locking. Use a read lock.
Sponsored by:	EMC / Isilon Storage Division
2013-06-05 17:00:10 +00:00
davide
0a4bbe752e Suppress a GCC warning. This warning is actually bogus and newer GCC
versions than the one in base (dim@ mentioned he tried on 4.7.3 and 4.8.1)
do not whine about it, so, at some point this workaround will be reverted.

Reported by:	ache
Discussed with:	dim
2013-05-02 14:55:21 +00:00
davide
6fde656c55 malloc(9) cannot return NULL if M_WAITOK flag is specified. 2013-04-30 15:59:22 +00:00
davide
e45f362b6b The Intel PMC architectural events have encodings which are identical to
those of some non-architectural core events. This is not a problem in the
general case as long as there's an 1:1 mapping between the two, but there
are few exceptions. For example, 3CH_01H on Nehalem/Westmere represents
both unhalted-reference-cycles and CPU_CLK_UNHALTED.REF_P.
CPU_CLK_UNHALTED.REF_P on the aforementioned architectures does not measure
reference (i.e. bus) but TSC, so there's the need to disambiguate.
In order to avoid the namespace collision rename all the architectural
events in a way they cannot be ambigous and refactor the architectural
events handling function to reflect this change.
While here, per Jim Harris request, rename
iap_architectural_event_is_unsupported() to iap_event_is_architectural().

Discussed with:	jimharris
Reviewed by:	jimharris, gnn
2013-04-30 15:31:45 +00:00
davide
70ee3bdcde Complete r250097:
Do not change the initialization order in pmc_intel_initialize().
2013-04-30 14:56:41 +00:00
davide
cce56d6bd8 When hwpmc(4) module is unloaded it reports a double leakage. This happens
at least if FreeBSD is ran under VirtualBox. In order to avoid the leakage,
properly deallocate structures in case CPU claims that hw performance
monitoring counters are not supported.

Reported by:	hiren
2013-04-30 08:33:38 +00:00
davide
3569f976bf Fixup Westmere hwpmc(4) support: add missing CPU flag so that
intrucion-retired, llc-misses and llc-reference events can now be
allocated.

Reviewed by:	jimharris, gnn
2013-04-30 08:18:08 +00:00
hiren
67955559b1 Improve/correct a comment. We now support a lot more cpu types.
PR:	kern/177496
Approved by:	sbruno (mentor)
2013-04-14 02:26:12 +00:00
rstone
3343598ba8 Cosmetic change: make a comment reference Sandy Bridge *Xeon*
Reviewed by:	sbruno
MFC after:	1 week
2013-04-12 20:43:14 +00:00
sbruno
20a2c3e096 Trailing whitespace cleanup along with 80 column enforcemnt.
Submitted by:	hiren.panchasara@gmail.com
Reviewed by:	sbruno@freebsd.org
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-04-03 21:34:35 +00:00
sbruno
18d941830f Update hwpmc to support Haswell class processors.
0x3C:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-03-28 19:15:54 +00:00
attilio
bf1dc90446 MFC 2013-03-08 00:03:07 +00:00
fabient
5e81647255 Add a generic way to call per event allocate / release function.
Reviewed by:	mav
MFC after:	1 month
2013-03-05 10:18:48 +00:00
attilio
820ab571ec MFC 2013-02-26 21:09:35 +00:00
mav
fdde785247 Add support for good old 8192Hz profiling clock to software PMC.
Reviewed by:	fabient
2013-02-26 18:13:42 +00:00
attilio
afe5ce0c13 MFC 2013-02-26 17:33:18 +00:00
mav
d9ff8818e5 Change the way how software PMC updates counters.
This at least fixes -n option of pmcstat.

Reviewed by:	fabient
2013-02-26 13:59:39 +00:00
attilio
15bf891afe Rename VM_OBJECT_LOCK(), VM_OBJECT_UNLOCK() and VM_OBJECT_TRYLOCK() to
their "write" versions.

Sponsored by:	EMC / Isilon storage division
2013-02-20 12:03:20 +00:00
attilio
658534ed5a Switch vm_object lock to be a rwlock.
* VM_OBJECT_LOCK and VM_OBJECT_UNLOCK are mapped to write operations
* VM_OBJECT_SLEEP() is introduced as a general purpose primitve to
  get a sleep operation using a VM_OBJECT_LOCK() as protection
* The approach must bear with vm_pager.h namespace pollution so many
  files require including directly rwlock.h
2013-02-20 10:38:34 +00:00
sbruno
577b42d393 Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
sbruno
c3acd922ed Quiesce a couple of clang warnings
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Obtained from:	Yahoo! Inc
2013-01-12 18:30:52 +00:00
attilio
279b97daea Fixup r240246: hwpmc needs to retain the pinning until ASTs are not
executed. This means past the point where userret() is generally
executed.

Skip the td_pinned check if a callchain tracing is currently happening
and add a more robust check to pmc_capture_user_callchain() in order to
catch td_pinned leak past ast() in hwpmc case.

Reported and tested by:	fabient
MFC after:	1 week
X-MFC:	r240246
2012-10-30 15:10:50 +00:00
sbruno
88f73ca292 Cleanup and rename some variables in libpmc and hwpmc.
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ sbruno@
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2012-10-24 01:26:29 +00:00
kib
560aa751e0 Remove the support for using non-mpsafe filesystem modules.
In particular, do not lock Giant conditionally when calling into the
filesystem module, remove the VFS_LOCK_GIANT() and related
macros. Stop handling buffers belonging to non-mpsafe filesystems.

The VFS_VERSION is bumped to indicate the interface change which does
not result in the interface signatures changes.

Conducted and reviewed by:	attilio
Tested by:	pho
2012-10-22 17:50:54 +00:00
sbruno
90144fd204 Update hwpmc to support the Xeon class of Sandybridge processors.
(Model 0x2D     /* Per Intel document 253669-044US 08/2012. */)

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ fabient@
Obtained from:	Yahoo! Inc.
MFC after:	  2 weeks
2012-10-19 17:01:27 +00:00
avg
74c707d4d1 hwpmc amd_pcpu_fini: fix a bug in code locked under DEBUG
MFC after:	16 days
2012-09-18 13:33:39 +00:00
attilio
d63ec4c4ce Remove all the checks on curthread != NULL with the exception of some MD
trap checks (eg. printtrap()).

Generally this check is not needed anymore, as there is not a legitimate
case where curthread != NULL, after pcpu 0 area has been properly
initialized.

Reviewed by:	bde, jhb
MFC after:	1 week
2012-09-13 22:26:22 +00:00
fabient
4bd6d33d21 Complete and merge the list between Sandy/Ivy bridge of events
that can run on specific PMC.

MFC after:	1 month
2012-09-07 14:45:59 +00:00
fabient
2a46ae3db5 Add Intel Ivy Bridge support to hwpmc(9).
Update offcore RSP token for Sandy Bridge.
Note: No uncore support.

Will works on Family 6 Model 3a.

MFC after: 1 month
Tested by: bapt, grehan
2012-09-06 13:54:01 +00:00
davide
7d51c0c29c Disable hwpmc(4) support for Intel Xeon Sandy Bridge (Model 0x2D).
Due to some differences in MSRs between Xeon Sandy Bridge and Core Sandy
Bridge (Model 0x2A), wrmsr() may generate in a GP# fault exception and so a
panic of the machine.

Approved by:		gnn (mentor)
MFC after:		3 days
2012-06-17 13:48:39 +00:00
fabient
028605e4f6 Add ARM callchain support for hwpmc.
Sponsored by: NETASQ
MFC after:	3 days
2012-06-13 06:38:25 +00:00
fabient
be5bfc0308 Soft PMC support for ARM.
Callgraph is not captured, only current location.

Sample system wide profiling: "pmcstat -Sclock.hard -T"
2012-05-23 13:23:40 +00:00
fabient
40edf7c840 Remove out of date KASSERT that fire with soft PMC.
MFC after:	1 week
2012-05-10 14:27:49 +00:00
gnn
28463f80dd Fix so that ,usr and ,os work correctly with fixed function (IAF)
counters.

MFC after:	1 week
2012-05-02 16:23:36 +00:00
fabient
76203b349f Fix class malloc init for mips and powerpc that was not converted
by r233628.

Found by: monthadar, adrian
MFC after:	1 week
2012-04-23 08:58:01 +00:00
fabient
5edfb77dd3 Add software PMC support.
New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after:	1 month
2012-03-28 20:58:30 +00:00
gonzo
edf893b531 Fix crash on VirtualBox (and probably on some real hardware):
- Do not cover error returned by pmc_core_initialize with the
    result of pmc_uncore_initialize, fail right away.
- Give a user something to report instead failing silently

Reported by:	Alexandr Kovalenko <never@nevermind.kiev.ua>
2012-03-27 18:22:14 +00:00
fabient
961cc7f6b4 Fix random deadlock on pmcstat exit:
- Exit the thread when soft shutdown is requested
- Wakeup owner thread.

Reproduced/tested by looping pmcstat measurement:
pmcstat -S instructions -O/tmp/test ls

MFC after:	1 week
2012-03-27 14:02:22 +00:00
gonzo
d2702a3c7c Add Octeon PMC hardware backend 2012-03-23 00:09:27 +00:00
gonzo
9c120510f9 Add list of Octeon's PMC counters obtained from cvmx-core.h 2012-03-23 00:04:09 +00:00
gonzo
44ac3b71b6 Rework MIPS PMC code:
- Replace MIPS24K-specific code with more generic framework that will
    make adding new CPU support easier
- Add MIPS24K support for new framework
- Limit backtrace depth to 1 for stability reasons and add option
    HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
gonzo
0e6c83a1b6 - Remove unncessary type casts
- Make kernel backtrace routine more robust by refusing to backtrace
    further when encountered function that is possibly modifies SP
    value
2012-03-14 23:46:07 +00:00
adrian
39ac3b03fd This header file no longer exists when doing cross builds, so remove it.
mips24k hwpmc now compiles again.
2012-03-12 17:25:35 +00:00
gonzo
a3042173e1 Implement pmc_save_user_callchain and pmc_save_kernel_callchain for MIPS 2012-03-12 01:19:41 +00:00
gnn
6ce0b47b5a Properly mask off bits that are not supported in the IAP counters.
This fixes a bug where users would see massively large counts, near
to 2**64 -1, due to the bits not being cleared.

MFC after:	3 weeks
2012-03-06 17:17:03 +00:00
davide
8636a37ecc - Add support for the Intel Sandy Bridge microarchitecture (both core and uncore counting events)
- New manpages with event lists.
- Add MSRs for the Intel Sandy Bridge microarchitecture

Reviewed by:	attilio, brueffer, fabient
Approved by:	gnn (mentor)
MFC after:	3 weeks
2012-03-01 21:23:26 +00:00
emaste
ca620d68ac pmc_*_initialize may return NULL if the CPU is not supported, so check
that md is not null before dereferencing it.

PR:		kern/156540
2012-01-28 01:38:48 +00:00
gnn
405e6f5ec5 Clean up a switch statement for uncore events on Westmere processors.
Submitted by:	Davide Italiano
Reviewed by:	gnn
MFC after:	1 week
2012-01-13 17:13:46 +00:00
fabient
8e0daca029 Update PMC events from October 2011 Intel documentation.
Submitted by:	Davide Italiano <davide.italiano@gmail.com>
MFC after:	3 days
2012-01-04 07:58:36 +00:00
fabient
ca76b8cdad Add missing MSR programming for some events.
Submitted by:	Davide Italiano <davide.italiano@gmail.com>
MFC after:	3 days
2012-01-04 07:33:06 +00:00
dim
21c9c8f9bc In sys/dev/hwpmc/hwpmc_amd.c, fix a clang warning about invalid enum
conversions.

Reviewed by:	jkoshy
MFC after:	1 week
2011-12-31 12:37:07 +00:00
bz
51ccfb890c Quite the tinderbox for the holidays. Remove the assert[1].
Suggested by:	jhibbits [1]
MFC after:	3 days
2011-12-25 14:29:36 +00:00
jhibbits
8eb9e6b548 Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).
Sampling is in progress.

Approved by:	nwhitehorn (mentor)
MFC after:	9.0-RELEASE
2011-12-24 19:34:52 +00:00
eadler
7833205d78 - Remove extra space
Submitted by:	Davide Italiano <davide.italiano@gmail.com>
Approved by:	brucec
2011-12-21 17:51:49 +00:00
fabient
a7b842db79 There's a small set of events on Nehalem, that are not supported in
processors with CPUID signature 06_1AH, 06_1EH, and 06_1FH.

Refuse to allocate them on unsupported model.

Submitted by:	Davide Italiano <davide.italiano@gmail.com>
MFC after:	1 month
2011-12-12 13:12:55 +00:00
fabient
13c5d55aef Update Westmere uncore event exception list.
Submitted by:	Davide Italiano <davide italiano at gmail com>
MFC after:	1 week
2011-12-02 10:02:49 +00:00
adrian
0070160cea Flip on processing interrupt profile events for mips24k.
This is a bit hackish and should be made more generic (ie, support more than
two hard-coded performance counter+config register pairs) so it can be used
for mips74k and other chips.

All this does is process the initial interrupt event. It doesn't (yet) handle
callgraph events, so even if you route the exception/interrupt to this routine
and flip the bit on, it will hang and crash pmc unless you disable callgraph
support when you enable a sample based PMC.
2011-11-09 17:38:27 +00:00
fabient
c0da433b0a Add a flush of the current PMC log buffer before displaying the next top.
As the underlying block is 4KB if the PMC throughput is low the measurement
will be reported on the next tick. pmcstat(8) use the modified flush API to
reclaim current buffer before displaying next top.

MFC after:	1 month
2011-10-18 15:25:43 +00:00
adrian
43d046c97a Begin implementing correct MIPS24K sampling mode behaviour.
* Add the interrupt bit in the configuration register
* Correctly set the counter register for the sampling overflow
  interrupt. The interrupt is asserted when bit 31 is set.
  So set the overflow value at 0x80000000 and subtract the
  programmed value as appropriate.
2011-10-07 06:13:38 +00:00
kmacy
99851f359e In order to maximize the re-usability of kernel code in user space this
patch modifies makesyscalls.sh to prefix all of the non-compatibility
calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel
entry points and all places in the code that use them. It also
fixes an additional name space collision between the kernel function
psignal and the libc function of the same name by renaming the kernel
psignal kern_psignal(). By introducing this change now we will ease future
MFCs that change syscalls.

Reviewed by:	rwatson
Approved by:	re (bz)
2011-09-16 13:58:51 +00:00
rwatson
4af919b491 Second-to-last commit implementing Capsicum capabilities in the FreeBSD
kernel for FreeBSD 9.0:

Add a new capability mask argument to fget(9) and friends, allowing system
call code to declare what capabilities are required when an integer file
descriptor is converted into an in-kernel struct file *.  With options
CAPABILITIES compiled into the kernel, this enforces capability
protection; without, this change is effectively a no-op.

Some cases require special handling, such as mmap(2), which must preserve
information about the maximum rights at the time of mapping in the memory
map so that they can later be enforced in mprotect(2) -- this is done by
narrowing the rights in the existing max_protection field used for similar
purposes with file permissions.

In namei(9), we assert that the code is not reached from within capability
mode, as we're not yet ready to enforce namespace capabilities there.
This will follow in a later commit.

Update two capability names: CAP_EVENT and CAP_KEVENT become
CAP_POST_KEVENT and CAP_POLL_KEVENT to more accurately indicate what they
represent.

Approved by:	re (bz)
Submitted by:	jonathan
Sponsored by:	Google Inc
2011-08-11 12:30:23 +00:00
attilio
fe4de567b5 Commit the support for removing cpumask_t and replacing it directly with
cpuset_t objects.
That is going to offer the underlying support for a simple bump of
MAXCPU and then support for number of cpus > 32 (as it is today).

Right now, cpumask_t is an int, 32 bits on all our supported architecture.
cpumask_t on the other side is implemented as an array of longs, and
easilly extendible by definition.

The architectures touched by this commit are the following:
- amd64
- i386
- pc98
- arm
- ia64
- XEN

while the others are still missing.
Userland is believed to be fully converted with the changes contained
here.

Some technical notes:
- This commit may be considered an ABI nop for all the architectures
  different from amd64 and ia64 (and sparc64 in the future)
- per-cpu members, which are now converted to cpuset_t, needs to be
  accessed avoiding migration, because the size of cpuset_t should be
  considered unknown
- size of cpuset_t objects is different from kernel and userland (this is
  primirally done in order to leave some more space in userland to cope
  with KBI extensions). If you need to access kernel cpuset_t from the
  userland please refer to example in this patch on how to do that
  correctly (kgdb may be a good source, for example).
- Support for other architectures is going to be added soon
- Only MAXCPU for amd64 is bumped now

The patch has been tested by sbruno and Nicholas Esborn on opteron
4 x 12 pack CPUs. More testing on big SMP is expected to came soon.
pluknet tested the patch with his 8-ways on both amd64 and i386.

Tested by:	pluknet, sbruno, gianni, Nicholas Esborn
Reviewed by:	jeff, jhb, sbruno
2011-05-05 14:39:14 +00:00
attilio
3fcaa270bf Fix a typo/error. 2011-04-30 22:34:44 +00:00
attilio
5d1f479a00 Remove unnecessary usage of memory barriers when dealing with
pmc_cpumask.

Discussed with:	fabient
2011-04-30 22:33:11 +00:00
gnn
29cc3a6212 Fix two aliases that had the same name but were pointing to different
events.  These are now disamiguated.

MFC after:	1 week
2010-10-04 17:22:18 +00:00