316 Commits

Author SHA1 Message Date
imp
16840ac973 Make the multiple interrupts attachment an error not a panic.
Sometimes, when pccardd is restarted, it fails to realize that the
device is already attached and tries to attach it again.  This leads
to bad mojo since the pccard code isn't setup to handle that, so the
panic was put in.  Now it appears that it is triggering too easily, so
I'm backing it off to a non-fatal error.
2001-07-25 15:09:54 +00:00
imp
ab53999cee When including pci header files, do things differently for 5x and 4x
to make code sharing between the two easier.

Also, only do power management in -current.  It doesn't exist in stable
yet.
2001-07-19 21:43:01 +00:00
imp
d107d4e34a Use INTR_TYPE_AV rather than INTR_TYPE_MISC for the interrupt for
pci interrupts for the bridge.
2001-07-10 04:43:21 +00:00
imp
d5a4de320f Note that spls are noops 2001-07-09 16:06:06 +00:00
imp
fd367e43b0 Cleanup some obsolete comments 2001-07-06 05:52:59 +00:00
imp
b1763d41dd Combine a couple of tests to reduce the indentation level. 2001-07-01 23:41:57 +00:00
imp
aef6e26169 Some interrelated interrupt changes.
Frist, for pci slots, make the setup intr save the requested interrupt
vector and arg and return rather than passing it up to our parent.  On
interrupts, we call this vector iff there's a card in the slot.  This
should eliminate some of the hangs or "weird" messages that people see
when ejecting cards and also help close the race window somewhat.
Reading the pci bus one more time for this information is judged to be
an acceptible tradeoff since it is very very fast.

Cleanup a little how we detect unsupported cards.  Only detect
unsupported cards (eg cardbus cards) on card insertion (or more
pedantically when a card is actually present).  This should allow us
to change the message in the future to "cardbus card not supported
with OLDCARD" :-).

Note:
	We may also consider this for the ISA bus case, but there the
	reads are much more expensive and the location of the CD pin
	status lines appears to be less standardized.  Also, the ISA
	management interrupt isn't shared with the card's interrupt.
	The mutliplex the CSC and function interrupts bit also appears
	to be non-standard (or at least not imlemented on all
	bridges).
2001-07-01 23:41:43 +00:00
imp
128e29a1c0 Write zeros into the base/bounds register bars. We need to do this
because NEWBUS (and I think some versions of Windows sometimes) writes
0xffffffff to these registers to disable them.  When they are
"disabled" like this, writing memory ranges to the pcic registers are
ignored and you will get "card (null) (null)" when you insert a call
otherwise.
2001-07-01 23:41:24 +00:00
imp
ae6d28ac15 First cut at getting the pcic controller and power information for
each of the bridge chips.  Before we wrongly assumes that all cardbus
bridge chips were intel compatible step A/B.  This mostly worked, but
likely caused problems with certain cirrus logic cardbus bridges.
2001-07-01 23:41:09 +00:00
imp
1233b006a4 Clarify some of the 3.3V code with better comments. Also, since the
types are treated as a bitfield, test them as such.
2001-07-01 23:40:54 +00:00
imp
72676d41d5 Add comments explaining why we do the somewhat odd irq mapping on PC98
machines with C-BUS cards.
2001-07-01 23:40:41 +00:00
imp
a1e3a3a042 Minor whitespace nit. 2001-07-01 23:40:19 +00:00
imp
9c03640f81 Work around a bug in the current interrupt system by explicitly
rejecting INTR_FAST interrupts.  Since they can't be shared anyway,
this just short circuits a failure case that should work but is panic
fodder now.

This bug is that if the interrut condiation is active when you activate
the interrupt, then the interrupt routine will be called.  jhb had
a patch that may or may not work to fix it, but I've lost it.

This may be due to the sio probe doing something odd too.
2001-06-25 04:13:54 +00:00
imp
59b4b8de49 Some people are having problems with insert/eject. Add some debug
information until the problems can be tracked down.  Right now these
are unconditional, but later it will be hidden behind a boot verbose.

Also, if there are no events listed in the event mask, return right
away.  Specifically avoid writing back interrupt acks in this case.
2001-06-16 23:26:18 +00:00
imp
9b40d4fdc2 Save the IRQ that we get in pci attachment.
Print type of pci bridge we find.
Force the IRQ of pci bridges upon all its children.
Allocate the resources on behalf of the bridge when we're testing to see if
they exist.

This should help people who don't read updating instructions very well.

This patch started out with an idea from Shigeru Yamamoto-san in -current.
2001-06-16 06:33:01 +00:00
imp
2819707a6c On PC-98, map IRQ 6 to IRQ 7 at the pcic level. That is, when we're
told to use IRQ 6, progam the pcic to use irq 7 instead.  Evidentally,
at least some of the cards are wired this way.  If you want to use irq
6, configure it.  All the mapping is done just before we set the
interrupt registers.  See [FreeBSD98-testers 5064] for details.

Added commentary about valid interrupts on some CBUS pc98 CL PD6722
based cards.

Submitted by: Hiroshi TSUKADA-san <hiroshi@kiwi.ne.jp>
2001-06-16 06:18:16 +00:00
imp
d12ef14587 First stab at adding back in CL-PD6729 support. 2001-06-09 07:34:17 +00:00
imp
3177247cd5 Add PC9801-102 CBUS card to the list of plug and play devices. Some
mapping of irq 6 may be required to use that irq, but if so,
additional commits will follow.

Submitted by: Hiroshi TSUKADA-san
2001-06-09 06:43:54 +00:00
imp
515e92f7f2 Go ahead and request 0x44000000 through 0xfffffff instead of just
0xefffffff

# Note, this is bogus, but less bogus than before.
2001-06-08 18:31:51 +00:00
imp
05d2bc21eb The TI-1031 is more like the TI-113x chips rather than the 12xx or
higher chips.  Treat it as if it were a 113x.  This is correct as far
as 16-bit cards go, at least how we're using it.

# It appears that my TI-1031 based pci card that YAMAMOTO shigeru-san gave
# me on my trip to Japan now works.
2001-06-08 07:16:56 +00:00
imp
93128f58b0 If the chip isn't in power state D0, put it in power state D0. I
elected to do this in the probe rather than the attach so that we don't
disturb things which this might reset.  different cards have different
quirks, according to their datasheets.

This should fix the "I booted in windows and rebooted to FreeBSD and
now things don't work" problem.

PR: 4847, 20670
2001-06-04 17:14:28 +00:00
imp
a83bd75d36 Add new pci attachment for pcic. This supports pci cards as well as
card bus bridges.

We now always use pci interrupts for pci cards.  This will allow us to
more easily configure things.  You must change your IRQ lines in
/etc/pccard.conf to match what we've probed.  I'm not sure the right
way to deal with this right now.

Development of pci pcmcia has been funded by Monzoon Networks AG.  I
am grateful for their generosity.
2001-06-04 06:49:46 +00:00
imp
87ef6dd449 #defines for pci way interrupt routing. 2001-06-04 03:36:22 +00:00
imp
b7a73ced2f Move the pcic interrupt from pcic.c to pcic_isa.c. The ISA handling
for card change interrupts is different than the pci stuff that's
coming soon.  Set the management irq in different ways.  If
pci_parallel interrutp routing, then use the PCI way of getting
interrupts.  Move polling mode into pcic_isa since when we're routing
via pci polling doesn't work because many bridges (systems hang solid).

If we're routing interrupts via pci, they can be shared, so flag them
as such.

Note, this doesn't actually change anything since the pci attachment
isn't quite ready to be committed.
2001-06-04 03:29:06 +00:00
imp
68781cda99 Minor style(9) nit. a|b -> a | b. 2001-06-04 03:13:45 +00:00
imp
57d12fd872 Change plxic to plxcard, per phk. He thnks plxic is too generic a
name.  I didn't do repo magic because this is so new.
2001-06-01 05:20:38 +00:00
imp
bc197cee36 Add a simple plx pci9052 based pccard bridges. This doesn't work yet,
but I'll be fleshing this out as I have time.  This should mean we no
longer need to have an and wi pci attachments, but that's a ways off.
2001-05-31 19:04:29 +00:00
imp
476e3d24e2 Turns out that one bit isn't enough. Introduce two new fields
csc_route and func_route to hold the way that each interrupt is
routed.  csc is Card Status Change in the datasheets and standard, but
is called "Management Interrupt" in FreeBSDese.  There are three types
of interrupt routing:  ISA parallel, PCI parallel and ISA serial (some
chipsets support other types as well, but I don't plan on supporting
them).

When we try to allocate an interrupt, and the type for that interrupt
is pci_parallel, allow it to be shared by oring in RF_SHAREABLE to the
flags argument.  Introduce pcic_alloc_resource to allow this to
happen.
2001-05-28 02:53:02 +00:00
imp
7e15f71f4f Allow a shareable interrupts. Note, the bridge must set this flag or
the irq will be unshareable, as things are now.

More work likely is needed, but this is a good checkpoint.

# pcic_pci.c is getting closer :-)
2001-05-27 05:53:37 +00:00
imp
7dc7fa75ea Fix a minor formatting nit 2001-05-25 19:24:58 +00:00
imp
644f5a620b Move to using the common device list.
Move to table driven probing of these devices since we have such a long list.
2001-05-25 19:22:36 +00:00
imp
cfd71a8415 Migrate from unit based to dev base. Don't save unit number, but do save
dev.  Convert all uses of unit to dev as appropriate.  Minor comment fixes
to pcic_softc definition.
2001-05-25 18:28:49 +00:00
imp
61a33a7085 Update copyright info 2001-05-25 18:03:07 +00:00
imp
3a70962792 Add intrack field to each slot. This can be used to acknowledge
interrupts on other buses.  Right now it isn't used, but will be for
the pci attachment.

# Add copyright by me for this year since I've changed so much.
2001-05-25 05:25:43 +00:00
imp
3a5034ec48 Minor name space issues. 2001-05-25 05:22:00 +00:00
imp
a55e3ddc32 Use bus_space functions rather than inb/outb.
Add defines for PCIC_INDEX and PCIC_DATA offsets.
Change PCIC_INDEX_0 to PCIC_PORT_0
Add define for PCIC_NPORT.
Document why the vadem probe works.
2001-05-24 06:54:48 +00:00
imp
ab4dae83b5 Do what we should have done a long time ago:
o If the class is PCIC_BRIDGE, subclass is PCIS_BRIDGE_PCMCIA and
  programming interface is 0, assume that it is a generic PCMCIA PCI
  chip we can program.  I don't think there are any of these that
  we don't know about, but you never know.
o If the class is PCIC_BRIDGE, subclass is PCIS_BRIDGE_CARDBUS and
  programming interface is 0, assume that it is a YENTA cardbus bridge
  that we know how to cope with.  There are likely some cardbus bridges
  that haven't it made it in here yet.
2001-05-24 04:24:22 +00:00
imp
85de757366 Move getb1 and putb1 from pcic_isa.c to pcic.c. Rename them to
pcic_{get,put}b_io.  There are some pci bridges (the CL-PD6729 and
maybe others) that do not have memory mapped registers, so we'll need
these in both places.  Declare them in pcicvar.h.
2001-05-24 04:03:28 +00:00
imp
4ebc84e616 Add better support for the Ricoh 5C296 and 5C396 chips. These chips
have a slightly different 3.3V support than the other clones, so
compensate as best we can.  Note: 3.3V support is untested since I do
not have any 3.3V cards that I know of to test it with.
2001-05-23 05:06:04 +00:00
imp
f5bcf454fa Add recognition for Toshiba ToPIC-100.
Submitted by: Shimodaira Toshio <tshimod1@ym.nsw.co.jp> in [bsd-nomads:15589]
2001-05-23 04:37:00 +00:00
imp
c65c10ec83 Move allocation of ExCA registers from the base driver into the bus
attachment code.
2001-05-21 07:32:46 +00:00
imp
f7d282ea38 Move setting of Vcc bit to before the vcc switch statement. The
datasheets I have seem to indicate that generally this bit is viewed
as a toggle.  Correct comments to match code.
2001-05-21 05:49:15 +00:00
imp
39ce0c191f Next step on the road to pci: power taming.
Work through the various power commands and convert them from a "is
this a foo controller or a foo' controller or a foo''' controller" to
a cabability based scheme.  We have bits in the softc that tell us
what kind of power control scheme the controller uses, rather than
relying on being able to enumerate them all.  Cardbus bridges are
numerous, but nearly all implement the i82365sl-DF scheme (well, a few
implement cirrus CL-PD67xx, but those were made by Cirrus Logic!).

Add a pointer back to the softc in each pcic_slot so we can access
these flags.

Add comments that talk about the issues here.  Also note in passing
that there are two differ Vpp schemes in use and that we may need to
adjust the code to deal with both of them.  Note why it usually works
now.

We have 5 power management modes right now: KING, AB, DF, PD and VG.
AB is for the i82365 stpes A, B and C.  DF is for step DF.  PD is the
cirrus logic extensions for 3.3V while VG is the VADEM extensions for
3.3V.  KING is for the IBM KING controller found on some old cards.
# I'm looking for one of those old cards or a laptop that has the KING
# bridge in it.

We have to still cheat and treat the AB parts like the DF parts
because pci isn't here yet.  As far as I can tell, this is harmless
for actual old parts and necessary to work with 3.3V cards in some
laptops.

This almost eliminates all tests for controller in the code.  There
are still a few unrelated to power that need taming as well.
2001-05-21 04:44:14 +00:00
imp
c647eb3dd3 Next step towards pcic_pci: the ability to allocate mapped memory in attach.
o Introduce flags word to the softc.  This will be used to control various
  aspects of the driver.  Right now there are two bits defined, PCIC_IO_MAPPED
  and PCIC_MEM_MAPPED.  One for ISA cards that are I/O mapped, the other is
  for PCI cards that are memory mapped.  Only the ISA side is implemented
  with this commit.
o Introduce a pcic_dealloc which will cleanly dealloc resources used.  Right
  now it is only supported when called from probe/attach.
o Keep track of resources allocated in the pcic_softc.
o move pcictimeout_ch to the softc so we can support multiple devices
  in polling mode.
o In ISA probe, set PCIC_IO_MAPPED.
o Introduce and compute the slot mask.  This will be used later when
  we expand the number of slots on ISA from 2 to 4.  In such a case, we
  appear to have to use polling mode otherwise we get two different cards
  trying to drive the same interrupt line.  I don't have hardware to
  test this configuration, so I'll stop here.
2001-05-21 03:22:52 +00:00
imp
727acb940e Two comments and one bug fix:
o Add defines for the VS[12]# bits in register 0x16.
o Add comment about what we're doing reading register 0x16 (PCIC_CDGC)
  in the DF case.
o Check bit VS1# rather than a random bit I was checking due to a bogus
  transcrition on my part from nakagawa-san's article.
o Add note about IBM KING and 3.3V operation from information larned from
  wildboard.
2001-05-21 00:55:44 +00:00
imp
cd110221e4 Add back the plain i82365 to the list of bridges that do special
things to get 3.3V.  It appears that some cardbus chipsets have id
registers that say they are C step parts, but they really support the
DF step 3.3V functionality.

# Need to verify that IBM KING is handled properly since the MISC1
# register is really a cirrus logic only register.
2001-05-19 06:36:09 +00:00
imp
1a0ef36b01 Initialize cinfo structure at compile time rather than run time since
they are now constant.
2001-05-19 06:17:37 +00:00
imp
9566430dfa slots and next haven't been used in a while. GC them. 2001-05-19 06:13:12 +00:00
imp
4521ca8b4d Now that we've moved the mecia support out of pcic.c to its own
driver, we no longer need to go through the cinfo.XXXX indirections.
restore the direct calls that were replaced earlier.
2001-05-19 05:50:42 +00:00
imp
19cf17e66b Move ISA specific code into pcic_isa. This is the probe routine, the
get/setb1 routines.  Also expose clrb and setb as pcic_{clrb,setb} so
we can use it from the probe.  pcic_probe is no longer needed.
2001-05-19 05:21:23 +00:00