11 Commits

Author SHA1 Message Date
pfg
1d4c34376a sys/arm: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-27 15:04:10 +00:00
mmel
fd38ead294 ARM: Use new ARMv6 naming conventions for cache and TLB functions
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
2016-02-05 14:57:41 +00:00
zbb
030d8a98be Introduce support for HW watchpoints and single stepping for ARMv6/v7
Allows for using hardware watchpoints for 1, 2, 4, 8 byte long addresses.
The default configuration of watchpoint is RW but code allows to select
RO or WO and X.
Since debugging registers are per-CPU (CP14) the watchpoint is set on
the CPU that was lucky (or not) to enter DDB.

HW breakpoints are used to perform single step in KDB.
When HW breakpoint is enabled all watchpoints are temporary disabled
to avoid recursive abort on both watchpoint and breakpoint.
In case of branch, the breakpoint is set to both - next instruction
and possible branch address. This requires at least 2 breakpoints
supported in the CPU however this is a must for ARMv6/v7 CPUs.

Reviewed by:   imp
Submitted by:  Zbigniew Bodek <zbb@semihalf.com>
Obtained from: Semihalf
Sponsored by:  Juniper Networks Inc.
Differential Revision: https://reviews.freebsd.org/D4037
2016-01-25 18:02:28 +00:00
ian
b934a68cf3 Remove cpu_idcache_wbinv_all() from kdb_cpu_trap(), it's no longer needed.
This was added ca. 2004 for the purpose of ensuring the caches were in the
right state after the debugger set a breakpoint.  kdb_cpu_sync_icache()
was added in 2007 to handle that situation, and now the wbinv_all is
actually harmful because the operation isn't broadcast to other cores.
2014-04-27 18:12:55 +00:00
ian
b6e63d67c1 Call cpu_icache_sync_range() rather than sync_all since we know the range
and flushing the entire icache is needlessly expensive.
2014-04-26 23:09:01 +00:00
cognet
a0d3fd83ce Define KDB_STOPPEDPCB, so that we can access the backtraces of threads running
on other cores.
2013-07-29 08:07:35 +00:00
gber
f411f23122 Flush D and I caches after setting a breakpoint.
Reviewed by: imp
Obtained from: Semihalf
2012-05-30 13:31:08 +00:00
marcel
75588c5a15 Add kdb_cpu_sync_icache(), intended to synchronize instruction
caches with data caches after writing to memory. This typically
is required to make breakpoints work on ia64 and powerpc. For
those architectures the function is implemented.
2007-06-09 21:55:17 +00:00
imp
77267e277f Start all license statements with /*- 2005-01-05 21:58:49 +00:00
cognet
22b168ab24 Implement breakpoints and single stepping on arm.
Obtained from:	NetBSD
2004-11-21 18:11:39 +00:00
cognet
5eba49c6e6 Import a kdb.h for arm, which contains stubs right now. 2004-07-12 21:17:51 +00:00