Commit Graph

1894 Commits

Author SHA1 Message Date
kientzle
3d78b5fc96 Don't use the old stack-walking code with
EABI ARM kernels or clang-compiled ARM kernels.

This fixes a crash seen in clang-compiled ARM
kernels that include WITNESS.

This code could be easily modified to walk the stack
for current clang-generated code (including EABI)
but Andrew Turner has raised concerns that the
stack frame currently emitted by clang isn't actually
required by EABI so such a change might cause problems
down the road.

In case anyone wants to experiment, the change
to support current clang-compiled kernels
involves simply setting FR_RFP=0 and FR_SCP=1.
2013-05-11 22:32:43 +00:00
ray
ed41ecad2b Update copyright date. 2013-05-08 09:42:50 +00:00
attilio
b24a52ec9e Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h in
order to match the MAXCPU concept.  The change should also be useful
for consolidation and consistency.

Sponsored by:	EMC / Isilon storage division
Obtained from:	jeff
Reviewed by:	alc
2013-05-07 22:46:24 +00:00
gber
5b4ace940c decode_win_sdram_fixup() function should be declared, defined and used
only by Armada XP

Obtained from:	Semihalf
2013-05-07 06:42:07 +00:00
gber
1734db112a Fix page reference emulation on ARMv6 and v7
Submitted by: Zbigniew Bodek
Obtained from: Semihalf
2013-05-06 16:11:53 +00:00
gber
961ec795d0 Fix L2 PTE access permissions management.
Keep following access permissions:

APX     AP     Kernel     User
 1      01       R         N
 1      10       R         R
 0      01      R/W        N
 0      11      R/W       R/W

Avoid using reserved in ARMv6 APX|AP settings:
- In case of unprivileged (user) access without permission to write,
  the access permission bits were being set to reserved for ARMv6
  (but valid for ARMv7) value of APX|AP = 111.

Fix-up faulting userland accesses properly:
- Wrong condition statement in pmap_fault_fixup() caused that
  any genuine, unprivileged access was being fixed-up instead of
  just skip doing anything and return. Staring from now we ensure
  proper reaction for illicit user accesses.

L2_S_PROT_R and L2_S_PROT_U names might be misleading as they do not
reflect real permission levels. It will be clarified in following
patches (switch to AP[2:1] permissions model).

Obtained from: Semihalf
2013-05-06 15:30:34 +00:00
gber
03f9e64ed4 Correct comment about initial VA=>PA mapping 2013-05-06 14:57:02 +00:00
gber
ff5f520f78 Disable decoding windows with no FDT entry.
- On ARMADAXP B0 (GP development board) we are not able to use PCI due to
   whole 32-bit address space used by 4GB of RAM memory.
- Change is required to destroy unnecessary window to free address space
   for PCI and other devices
- Fix offset value for SDRAM decoding windows

Obtained from:	Semihalf
2013-05-06 14:54:17 +00:00
gber
ec12f28a77 Avoid calling pcpu_init() simultaneously.
pcpu_init() updates queue, so cannot be called by multiple cores
at the same time

Obtained from:	Semihalf
2013-05-06 14:27:46 +00:00
gber
5bbe70ff76 Properly initialize Armada XP MP subsystem.
- correct setting of Auxiliary Control Register for MP mode
- correct setting of Auxiliarty Debug registers
- cleanup management of memory contains bootup code
- early initialization of Coherency Fabric (MP and not-MP mode)
- enable Snoop Filtering

Obtained from:	Semihalf
2013-05-06 14:12:36 +00:00
gber
4f72fc8977 Initialize L2 cache for Armada XP.
Obtained from:	Semihalf
2013-05-06 13:52:49 +00:00
gber
8ead7d44b7 Move initialization of CESA decoding windows from common section
to driver specific files.

- window initialization is done during device attach
- CESA TDMA decoding windows values are set based on DTS,
 not copied from CPU registers
- remove unnecessary virtual mapping
- update dts file

Obtained from: Semihalf
2013-05-06 13:34:36 +00:00
kientzle
ee0a366be9 Make a debugging printf a little more useful. 2013-05-04 21:26:11 +00:00
ian
bb1f3d8a1a Fix comment block formatting. 2013-05-04 20:02:34 +00:00
ian
d566907636 Insert STOP_UNWINDING directives in the _start (kernel entry point) and
fork_trampoline (thread entry point) assembler routines, because it's
not possible to unwind beyond those points.

Also insert STOP_UNWINDING in the exception_exit routine, to prevent an
unwind-loop at that point.  This is just a stopgap until we get around
to instrumenting all assembler functions with proper unwind metadata.
2013-05-04 19:59:35 +00:00
ian
34a388c771 EABI unwinder enhancements... When it's time to stop unwinding, don't
exit the loop until after printing info about the current frame.  Also,
if executing the unwind function for a frame doesn't change the values of
any registers, log that and exit the loop rather than looping endlessly.
2013-05-04 19:50:50 +00:00
eadler
a5a9ec51d6 Correct a few sizeof()s
Submitted by:	swildner@DragonFlyBSD.org
Reviewed by:	alfred
2013-05-01 04:37:34 +00:00
wkoszek
4f2702c1c3 Bring copyright changes with the agreement of Thomas Skibo.
Communication on src-commiters, Sat, 27 Apr 2013 22:09:06 -0700,
Subject was: "Re: svn commit: r249997"

As I'm here, fix the style main block comments in files' headers.
2013-04-28 07:00:36 +00:00
wkoszek
e5f418e744 Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.
Submitted by:	Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Tested by:	wkoszek (ZedBoard)
Reviewed by:	wkoszek, freebsd-arm@ (no objections raised)
2013-04-27 23:07:49 +00:00
wkoszek
1497a98f71 Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.
Submitted by:	Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Reviewed by:	wkoszek, freebsd-arm@ (no objections raised)
2013-04-27 22:38:29 +00:00
dmarion
3594d490ac Initialize GIC_PMRR register on ARM GIC.
Provided by: Thomas Skibo
2013-04-22 08:28:53 +00:00
gabor
301f6461b7 - Correct mispellings of word resource
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2013-04-17 11:47:32 +00:00
gabor
d3ee8e3ff6 - Correct mispellings of the word occurrence
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de> (via private mail)
2013-04-17 11:40:10 +00:00
dim
6a5be05861 Fix undefined behaviour in several gpio_pin_setflags() routines (under
sys/arm and sys/mips), squelching the clang 3.3 warnings about this.

Noticed by:	tinderbox and many irate spectators
Submitted by:	Luiz Otavio O Souza <loos.br@gmail.com>
PR:		kern/177759
MFC after:	3 days
2013-04-13 21:21:13 +00:00
trasz
80b8b2f779 Remove ctl(4) from GENERIC. Also remove 'options CTL_DISABLE'
and kern.cam.ctl.disable tunable; those were introduced as a workaround
to make it possible to boot GENERIC on low memory machines.

With ctl(4) being built as a module and automatically loaded by ctladm(8),
this makes CTL work out of the box.

Reviewed by:	ken
Sponsored by:	FreeBSD Foundation
2013-04-12 16:25:03 +00:00
glebius
9cf64d6c35 Merge from projects/counters: counter(9).
Introduce counter(9) API, that implements fast and raceless counters,
provided (but not limited to) for gathering of statistical data.

See http://lists.freebsd.org/pipermail/freebsd-arch/2013-April/014204.html
for more details.

In collaboration with:	kib
Reviewed by:		luigi
Tested by:		ae, ray
Sponsored by:		Nginx, Inc.
2013-04-08 19:40:53 +00:00
glebius
8c6eba117e Merge from projects/counters:
Pad struct pcpu so that its size is denominator of PAGE_SIZE. This
is done to reduce memory waste in UMA_PCPU_ZONE zones.

Sponsored by:	Nginx, Inc.
2013-04-08 19:19:10 +00:00
hselasky
c29caa8936 Fix regression issue after r248910.
PR:		arm/177685
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2013-04-07 13:03:57 +00:00
gonzo
0d9d3d4fa4 Properly clean "spurious interrupt" state
Suggested by: Ian Lepore
2013-04-06 03:31:28 +00:00
andrew
027510f594 Hide non-assembler bits behind #ifndef __ASSEMBLER__ 2013-04-06 00:47:33 +00:00
andrew
ab63899902 Add the hw.floatingpoint sysctl to ARM to tell us if we have vfp support
in the kernel and the hardware includes a vfp unit.
2013-04-05 23:35:23 +00:00
mav
7c2b81b0e9 Remove all legacy ATA code parts, not used since options ATA_CAM enabled in
most kernels before FreeBSD 9.0.  Remove such modules and respective kernel
options: atadisk, ataraid, atapicd, atapifd, atapist, atapicam.  Remove the
atacontrol utility and some man pages.  Remove useless now options ATA_CAM.

No objections:	current@, stable@
MFC after:	never
2013-04-04 07:12:24 +00:00
ian
5b38501da6 Fix low-level uart drivers that set their fifo sizes in the softc too late.
uart(4) allocates send and receiver buffers in attach() before it calls
the low-level driver's attach routine.  Many low-level drivers set the
fifo sizes in their attach routine, which is too late.  Other drivers set
them in the probe() routine, so that they're available when uart(4)
allocates buffers.  This fixes the ones that were setting the values too
late by moving the code to probe().
2013-04-01 00:44:20 +00:00
ian
720da1df6b Enable hardware flow control and high speed bulk data transfer in at91 uarts.
Changes to make rtc/cts flow control work...

This does not turn on the builtin hardware flow control on the SoC's usart
device, because that doesn't work on uart1 due to a chip erratum (they
forgot to wire up pin PA21 to RTS0 internally).  Instead it uses the
hardware flow control logic where the tty layer calls the driver to assert
and de-assert the flow control lines as needed.  This prevents overruns at
the tty layer (app doesn't read fast enough), but does nothing for overruns
at the driver layer (interrupts not serviced fast enough).

To work around the wiring problem with RTS0, the driver reassigns that pin
as a GPIO and controls it manually.  It only does so if given permission via
hint.uart.1.use_rts0_workaround=1, to prevent accidentally driving the pin
if uart1 is used without flow control (because something not related to
serial IO could be wired to that pin).

In addition to the RTS0 workaround, driver changes were needed in the area
of reading the current set of DCE signals.  A priming read is now done at
attach() time, and the interrupt routine now sets SER_INT_SIGCHG when any
of the DCE signals change.  Without these changes, nothing could ever be
transmitted, because the tty layer thought CTS was de-asserted (when in fact
we had just never read the status register, and the hwsig variable was
init'd to CTS de-asserted).

Changes to support bulk high-speed (230kbps and higher) data reception...

Allow the receive fifo size to be tuned with hint.uart.<dev>.fifo_bytes.
For high speed receive, a fifo size of 1024 works well.  The default is
still 128 bytes if no hint is provided.  Using a value larger than 384
requires a change in dev/uart/uart_core.c to size the intermediate
buffer as MAX(384, 3*sc->sc_rxfifosize).

Recalculate the receive timeout whenever the baud rate changes.  At low
baud rates (19.2kbps and below) the timeout is the number of bits in 2
characters.  At higher speed it's calculated to be 500 microseconds
worth of bits.  The idea is to compromise between being responsive in
interactive situations and not timing out prematurely during a brief
pause in bulk data flow.  The old fixed timeout of 1.5 characters was
just 32 microseconds at 460kbps.

At interrupt time, check for receiver holding register overrun status
and set the corresponding status bit in the return value.

When handling a buffer overrun, get a single buffer emptied and handed
back to the hardware as quickly as possible, then deal with the second
buffer.  This at least minimizes data loss compared to the old logic
that fully processed both buffers before restarting the hardware.

Rewrite the logic for handling buffers after a receive timeout.  The
original author speculated in a comment that there may be a race with
high speed data.  There was, although it was rare.  The code now handles
all three possible scenarios on receive timeout: two empty buffers, one
empty and one partial buffer, or one full and one partial buffer.

Reviewed by:	imp
2013-04-01 00:00:10 +00:00
ian
fea6d14816 When running on armv6, set alignment checking to modulo-4 mode rather
than modulo-8, because clang emits ldrd and strd instructions for
addresses that are only 4-byte aligned.
2013-03-31 22:42:25 +00:00
ian
1f73a954db Fix a typo in the CF device driver name that prevented instantiation. 2013-03-31 12:51:56 +00:00
ian
f7d5fae7ec Add userland access to at91 gpio functionality via ioctl calls. Also,
add the ability for userland to be notified of changes on gpio pins via
a select(2)/read(2) interface.

Change the interrupt handler from filtered to threaded.

Because of the uiomove() calls in the new interface, change locking from
standard mutex to sx.

Add / restore the at91_gpio_high_z() function.

Reviewed by:	imp (long ago)
2013-03-29 19:52:57 +00:00
ian
581bf19e7b Change the API for at91_pio_gpio_get() to return the entire masked set
of bits, not just a 0/1 indicating whether any of the masked bits are on.
This is compatible with the single in-tree caller of this function right now
(at91_vbus_poll() in dev/usb/controller/at91dci_atemelarm.c).
2013-03-29 19:04:18 +00:00
ian
899ea162b1 Call soc_info.soc_data->soc_clock_init() before at91_pmc_init_clock(), so
that the latter correctly fills in the clock data structures based on
proper hardware-specific shift and mask values from the soc_data structure.
2013-03-29 18:47:08 +00:00
ian
6321d72f7d Add a couple forward declarations, so that board support routines don't have
to pre-include a bunch of header files they don't need just to use this one.
2013-03-29 18:43:10 +00:00
ian
10e285049e Redo the workaround for at91rm9200 erratum #26 in a way that doesn't
cause a lockup on some rm92 hardware.
2013-03-29 18:17:51 +00:00
ian
2d18442bf8 Fix a typo: the RXD0 pin is PA18, not PA19. 2013-03-29 18:06:54 +00:00
ian
50331a7e74 Remove a really noisy printf left over from debugging hardware errata. 2013-03-29 17:57:24 +00:00
ian
6b18376e62 Don't check and warn about pmap mismatch on every call to busdma sync.
With some recent busdma refactoring, sometimes it happens that a sync
op gets called when bus_dmamap_load() never got called, which results
in a spurious warning about a map mismatch when no sync operations will
actually happen anyway.  Now the check is done only if a sync operation
is actually performed, and the result of the check is a panic, not just
a printf.

Reviewed by:	cognet (who prevented me from donning a point hat)
2013-03-23 17:17:06 +00:00
mav
6f03afeee9 Minimal timer period of 100us introduced in r244758 is overkill. While
original 2us are indeed not enough, 3us are working quite well on my tests.
To be more safe set minimal period to 5us and to be even more safe replicate
here from HPET mechanism of rereading counter after programming comparator.

This change allows to handle 30K of short nanosleep() calls per second on
Raspberry Pi instead of just 8K before.

Discussed with:	gonzo
2013-03-21 15:42:41 +00:00
ray
a88f1a3d13 Integrate Efika MX project back to home.
Sponsored by:	The FreeBSD Foundation
2013-03-20 15:39:27 +00:00
kib
7c26a038f9 Implement the concept of the unmapped VMIO buffers, i.e. buffers which
do not map the b_pages pages into buffer_map KVA.  The use of the
unmapped buffers eliminate the need to perform TLB shootdown for
mapping on the buffer creation and reuse, greatly reducing the amount
of IPIs for shootdown on big-SMP machines and eliminating up to 25-30%
of the system time on i/o intensive workloads.

The unmapped buffer should be explicitely requested by the GB_UNMAPPED
flag by the consumer.  For unmapped buffer, no KVA reservation is
performed at all. The consumer might request unmapped buffer which
does have a KVA reserve, to manually map it without recursing into
buffer cache and blocking, with the GB_KVAALLOC flag.

When the mapped buffer is requested and unmapped buffer already
exists, the cache performs an upgrade, possibly reusing the KVA
reservation.

Unmapped buffer is translated into unmapped bio in g_vfs_strategy().
Unmapped bio carry a pointer to the vm_page_t array, offset and length
instead of the data pointer.  The provider which processes the bio
should explicitely specify a readiness to accept unmapped bio,
otherwise g_down geom thread performs the transient upgrade of the bio
request by mapping the pages into the new bio_transient_map KVA
submap.

The bio_transient_map submap claims up to 10% of the buffer map, and
the total buffer_map + bio_transient_map KVA usage stays the
same. Still, it could be manually tuned by kern.bio_transient_maxcnt
tunable, in the units of the transient mappings.  Eventually, the
bio_transient_map could be removed after all geom classes and drivers
can accept unmapped i/o requests.

Unmapped support can be turned off by the vfs.unmapped_buf_allowed
tunable, disabling which makes the buffer (or cluster) creation
requests to ignore GB_UNMAPPED and GB_KVAALLOC flags.  Unmapped
buffers are only enabled by default on the architectures where
pmap_copy_page() was implemented and tested.

In the rework, filesystem metadata is not the subject to maxbufspace
limit anymore. Since the metadata buffers are always mapped, the
buffers still have to fit into the buffer map, which provides a
reasonable (but practically unreachable) upper bound on it. The
non-metadata buffer allocations, both mapped and unmapped, is
accounted against maxbufspace, as before. Effectively, this means that
the maxbufspace is forced on mapped and unmapped buffers separately.
The pre-patch bufspace limiting code did not worked, because
buffer_map fragmentation does not allow the limit to be reached.

By Jeff Roberson request, the getnewbuf() function was split into
smaller single-purpose functions.

Sponsored by:	The FreeBSD Foundation
Discussed with:	jeff (previous version)
Tested by:	pho, scottl (previous version), jhb, bf
MFC after:	2 weeks
2013-03-19 14:13:12 +00:00
ray
5f339017dc o Switch to use physical addresses in rman for FDT.
o Remove vtophys used to translate virtual address to physical in case rman carry virtual.

Sponsored by:	The FreeBSD Foundation
2013-03-18 15:18:55 +00:00
ian
2a3e1335af Eliminate an intermediate buffer and some memcpy() operations, and do
DMA directly to/from the buffers passed in from higher layer drivers.

Reviewed by:	gonzo
2013-03-17 16:31:09 +00:00
ian
b2acea1ddc Add a macro that gets the physical address of a memory mapped device
register from a bus space resource.

Note that this macro is just for ARM, and is intended to have a short
lifespan.  The DMA engines in some SoCs need the physical address of a
memory-mapped device register as one of the arguments for the transfer.
Several scattered ad-hoc solutions have been converted to use this macro,
which now also serves to mark the places where a more complete fix needs
to be applied (after that fix has been designed).
2013-03-17 03:04:43 +00:00