1747 Commits

Author SHA1 Message Date
loos
b76f0f0c1f Replace spaces with tabs, this will easier future changes on softc
structure.

No functional changes.
2015-01-31 12:43:30 +00:00
loos
a2924f5fee Clean up and fix the device detach routine and the failure path on GPIO
drivers.

This paves the way for upcoming work.
2015-01-31 12:17:07 +00:00
kib
b8f7b5ec8d Remove Giant from /dev/mem and /dev/kmem. It is definitely not needed
for i386, and from the code inspection, nothing in the
arm/mips/sparc64 implementations depends on it.

Discussed with:	imp, nwhitehorn
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2015-01-24 12:51:15 +00:00
br
5a896dc0ff Add 128-byte cache flushing routines.
Leave CNMIPS untouched as these functions depends on config2
register.
2015-01-20 11:10:25 +00:00
bz
d20f0a2401 Move MALTA_COMMON to std.MALTA (as we have for XLP and SWARM).
This avoids universe trying to build MALTA_COMMON and fail due to
the problem addressed in r276773.
Include std.MALTA from the MALTA mipsel and MALTA64 mips64el config files,
where the machine lines exist.
2015-01-07 12:12:36 +00:00
bz
2fbe376a24 Remove the machine directive from the common MALTA* configuration file
to avoid conflicting machine lines for the MALTA64 kernel configuration
making config(8) go barf and builds to fail.

Pointed out by:	adrian
2015-01-07 01:41:45 +00:00
markj
7e7e145818 Factor out duplicated code from dumpsys() on each architecture into generic
code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly
identical and simply redefine a number of constants and helper subroutines;
a generic implementation will make it easier to implement features around
kernel core dumps. This change does not alter any minidump code and should
have no functional impact.

PR:		193873
Differential Revision:	https://reviews.freebsd.org/D904
Submitted by:	Conrad Meyer <conrad.meyer@isilon.com>
Reviewed by:	jhibbits (earlier version)
Sponsored by:	EMC / Isilon Storage Division
2015-01-07 01:01:39 +00:00
jhb
c3d1954342 Remove "New" label from NFSCL/NFSD now that they are the only NFS
client/server.  While here, remove duplicate NFSCL from sys/conf/NOTES.

Approved by:	rmacklem
2015-01-06 16:15:57 +00:00
rwatson
60909669f0 In order to reduce use of M_EXT outside of the mbuf allocator and
socket-buffer implementations, introduce a return value for MCLGET()
(and m_cljget() that underlies it) to allow the caller to avoid testing
M_EXT itself.  Update all callers to use the return value.

With this change, very few network device drivers remain aware of
M_EXT; the primary exceptions lie in mbuf-chain pretty printers for
debugging, and in a few cases, custom mbuf and cluster allocation
implementations.

NB: This is a difficult-to-test change as it touches many drivers for
which I don't have physical devices.  Instead we've gone for intensive
review, but further post-commit review would definitely be appreciated
to spot errors where changes could not easily be made mechanically,
but were largely mechanical in nature.

Differential Revision:	https://reviews.freebsd.org/D1440
Reviewed by:	adrian, bz, gnn
Sponsored by:	EMC / Isilon Storage Division
2015-01-06 12:59:37 +00:00
adrian
be883ba4fe Make the apb.c code optional behind ar71xx_apb rather than standard.
The QCA955x has more mux interrupts going on - and the AR934x actually does,
but I cheated and assigned wlan and pcie to the same interrupt line.
They are, there's just a status register mux that I should've been using.

Luckily this isn't too bad a change in itself - almost all of the
Atheros MIPS configurations use a _BASE file to inherit from.
Except PB92, which I should really fix up at some point.

The AR934x will use the legacy apb for now until I write its replacement.

The QCA955x SoC I'm doing bring-up on will have a separate qca955x_apb.c
implementation that includes hooking into IP2/IP3 and doing further
interrupt demuxing as appropriate.
2015-01-06 07:43:07 +00:00
adrian
e8134b8e7d Add an APB base/size for the QCA955X for an upcoming QCA955x specific
APB mux.

It's larger than the AR71xx because it needs to replace the nexus
for some devices (notably wifi) and the wifi driver (if_ath_ahb.c)
reads the SPI data directly at early boot whilst it's memory mapped
in.

I'm eventually going to rip it out and replace it with a firmware
interface similar to what exists for the if_ath_pci.c path -
something early on (likely something new that I'll write) will
suck in the calibration data into a firmware API blob and that'll
be accessed from if_ath_ahb.c.

But, one thing at a time.

Tested:

* QCA955x SoC, AP135 development board
2015-01-06 07:37:33 +00:00
adrian
eeb397aba0 The QCA955x USB init path doesn't require any of this, so delete it.
Obtained from:	Linux/OpenWRT
2015-01-06 07:35:05 +00:00
rodrigc
eeb56aacdf Add some GEOM options. 2015-01-06 05:28:22 +00:00
rodrigc
de4fd944bb Refactor common options from MALTA and MALTA64 kernel
configs into MALTA_COMMON file.
2015-01-06 05:26:13 +00:00
hselasky
63ec340209 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
adrian
72a716f320 Remove the remnants of the OpenWRT/Linux bits that this was based off
of.

Obtained from:	Linux/OpenWRT
2015-01-05 05:30:07 +00:00
adrian
ad79abc364 Oops - missed refclk.
Tested:

* AP135, QCA955x SoC
2015-01-05 05:26:57 +00:00
adrian
d119230495 Add initial Qualcomm Atheros QCA955x SoC support.
This adds the initial frequency poking and configures up enough
for it to boot and spit out data over the console.

There's still a whole bunch of work to do in the reset path
and devices to support this thing, but hey, it's alive!

ath> go 0x80050100
## Starting application at 0x80050100 ...
CPU platform: Atheros AR9558 rev 0
CPU Frequency=720 MHz
CPU DDR Frequency=600 MHz
CPU AHB Frequency=200 MHz
platform frequency: 720 MHz
CPU reference clock: 0 MHz
CPU MDIO clock: 40 MHz

Done at:	hackathon
Obtained from:	Linux OpenWRT, Qualcomm Atheros
2015-01-05 02:06:26 +00:00
adrian
fca8e06eab ACK interrupts on the new SoCs. 2015-01-05 02:00:41 +00:00
adrian
d2d1da27e3 add QCA955x SoC types. 2015-01-05 01:59:44 +00:00
adrian
8a2fc581eb Add QCA955x series register definitions.
There's likely a bunch of register offsets that I have to add the
register window base to before I use them.

Done at:	Hackathon
Obtained from:	Linux OpenWRT
2015-01-05 01:44:23 +00:00
adrian
92005e6093 Add a GPIO output mux configuration method.
The AR934x and later (which will turn up eventually) have a new GPIO
output configuration option - a real MUX rather than a "GPIO or this
function."

For now I'm squirreling it away in the CPU code just so it's done -
I may move this to the GPIO layer later.

Specifically, this is required for setting up some boards that have
external receive side LNA (low noise amplifier) that gets switched on/off
by the on-chip wireless MAC.  If we don't add this support for those
boards then we'll end up with really poor performance.

(I don't yet have one of those APs, but it'll likely show up in a week.)

Obtained from:	Linux OpenWRT
2015-01-03 06:55:58 +00:00
adrian
a505f86799 Add AR934x specific GPIO functions and output MUX configuration.
Obtained from:	Linux OpenWRT
2015-01-03 06:35:53 +00:00
adrian
1bc6b102d6 Add AR934x GPIO function configuration.
Obtained from:	Linux OpenWRT
2015-01-03 06:30:30 +00:00
adrian
3662c835fe For now build random into the kernel - there seems to be issues kldload'ing
it at early boot.
2015-01-03 02:39:28 +00:00
adrian
8ddd21d3e3 The kernel has gotten too big; trim out MSDOSFS for the DIR825B1. 2015-01-03 02:34:23 +00:00
emaste
5506fd85be Update ELF headers to include additional defines
The elftoolchain project includes these additional defines for various
userland programs. Given that arch-specific defines are still interesting
in the context of userland programs reading or writing ELF metadata, they
should be included in top-level ELF headers.

Remove duplicate defines from ARM and MIPS elf headers.

Submitted by:	will (initial version)
Reviewed by:	imp, will
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D844
2015-01-02 15:36:29 +00:00
alc
369e66acd7 The physical memory allocator supports the use of distinct free lists for
managing pages from different address ranges.  Generally speaking, this
feature is used to increase the likelihood that physical pages are
available that can meet special DMA requirements or can be accessed through
a limited-coverage direct mapping (e.g., MIPS).  However, prior to this
change, the configuration of the free lists was static, i.e., it was
determined at compile time.  Consequentally, free lists could be created
for address ranges that held no actual pages, for example, on 32-bit MIPS-
based systems with 512 MB or less of physical memory.  This change makes
the creation of the free lists dynamic, i.e., it is based on the available
physical memory at boot time.

On 64-bit x86-based systems with 64 GB or more of physical memory, create
free lists for managing pages with physical addresses below 4 GB.  This
change is to address reported problems with initializing devices that
require the allocation of physical pages below 4 GB on some systems with
128 GB or more of physical memory.

PR:		185727
Differential Revision:	https://reviews.freebsd.org/D1274
Reviewed by:	jhb, kib
MFC after:	3 weeks
Sponsored by:	EMC / Isilon Storage Division
2014-12-31 00:54:38 +00:00
markj
7ea63e4fb4 Restore the trap type argument to the DTrace trap hook, removed in r268600.
It's redundant at the moment since it can be obtained from the trapframe
on the architectures where DTrace is supported, but this won't be the case
with ARM.
2014-12-23 15:38:19 +00:00
br
936d6a03d2 Correct the end address of the memory regions.
Pointed out by:	ian
2014-12-19 12:09:29 +00:00
br
2df3680ba6 Add configuration files for BERI soft-core synthesized on
Terasic SoCKit board (Altera FPGA).

Use virtio block as root filesystem device.

Sponsored by:	DARPA, AFRL
2014-12-17 11:36:31 +00:00
br
ed522fedd4 Use memory regions information provided in FDT.
Reviewed by:	brooks
Sponsored by:	DARPA, AFRL
2014-12-17 09:34:54 +00:00
jmg
c3ff54cc39 Add some new modes to OpenCrypto. These modes are AES-ICM (can be used
for counter mode), and AES-GCM.  Both of these modes have been added to
the aesni module.

Included is a set of tests to validate that the software and aesni
module calculate the correct values.  These use the NIST KAT test
vectors.  To run the test, you will need to install a soon to be
committed port, nist-kat that will install the vectors.  Using a port
is necessary as the test vectors are around 25MB.

All the man pages were updated.  I have added a new man page, crypto.7,
which includes a description of how to use each mode.  All the new modes
and some other AES modes are present.  It would be good for someone
else to go through and document the other modes.

A new ioctl was added to support AEAD modes which AES-GCM is one of them.
Without this ioctl, it is not possible to test AEAD modes from userland.

Add a timing safe bcmp for use to compare MACs.  Previously we were using
bcmp which could leak timing info and result in the ability to forge
messages.

Add a minor optimization to the aesni module so that single segment
mbufs don't get copied and instead are updated in place.  The aesni
module needs to be updated to support blocked IO so segmented mbufs
don't have to be copied.

We require that the IV be specified for all calls for both GCM and ICM.
This is to ensure proper use of these functions.

Obtained from:	p4: //depot/projects/opencrypto
Relnotes:	yes
Sponsored by:	FreeBSD Foundation
Sponsored by:	NetGate
2014-12-12 19:56:36 +00:00
sbruno
7005ed18cb Switch is an 8316, so make the comments say that.
Delete extraneous comment line that manifested itself from cut-n-pasting.

Sponsored by:	Nicholas Esborn <nick@desert.net>
2014-12-03 23:37:23 +00:00
sbruno
97a9dc2e41 There is only one argemdio device on this board.
Sponsored by:	Nicholas Esborn <nick@desert.net>
2014-12-03 19:41:49 +00:00
sbruno
b82cdb45d3 Assign argemdio0 to the correct base address and assign argemdio1 to its
proper place *after* argemdio0

Correctly place arge0 and arge1 on their respective bus positions.

Sponsored by:	Nicholas Esborn <nick@desert.net>
2014-12-03 18:08:39 +00:00
sbruno
e19a351f25 Add support for Buffalo WZR-HP-AG300H atheros MIPS router.
Special thanks to Nicholas Esborn for the loaner router to get this
target bootstrapped.

Review:  D777
Reviewed by:    adrian
Sponsored by:   Nicholas Esborn <nick@desert.net>
2014-11-25 17:33:22 +00:00
br
c3dfb4badd Correct the functions declaration. 2014-11-23 22:09:05 +00:00
brooks
932fb6dd65 Merge from CheriBSD:
commit 6d3c4c09226ad6bdd662e3e52489ef294a6ce298
    Add terasic_mtl vt(4) framebuffer driver

    terasic_mtl can be built with syscons(4) and vt(4) attachments, selected
    at compile time.

commit 33240259b47a7c990a5a88a19f133a5600432a4c
    Clear terasic_mtl text buffer on attach

commit d188c2d2412953f949624aa35cd07082830943c9
    Update terasic vt(4) driver for FreeBSD r269783

commit d1cc54eee852fa4fc9d359d5bb2171d24ec73369
    Safety belt to ensure vt(4) fb parameters are correct

commit 76e6d468ef45711d7952786095fc4791289ebb4b
    Improve terasic_mtl_vt fdt parsing

    - Use OF_getencprop to avoid need for explicit endian handling
      (submitted by ray@freebsd.org)
    - Check for expected length and correct pointer type

commit 3e2524b8995ab66e8a9295e4c87cbc7126eeddf4
    Correct device_printf usage

commit 9e53e3c8e0766414e25662c95b09cc51c92443b0
    Switch framebuffer to match host endianness

    Xorg and xf86-video-scfb work much better with a native-endian
    framebuffer.

commit 0f49259d596321ed85288ac0e1fb4ee1c966df48
    Switch DE4 to vt(4) and enable kbdmux

commit 5bc96ebc89db7d134ad478335090c8477c1677c7
    Add missing \n in device_printf calls

Submitted by:	emaste
Sponsored by:	DARPA, AFRL
2014-11-21 21:34:19 +00:00
brooks
b532057d45 Add FPU support for MIPS setjmp(3)/longjmp(3).
This change saves/restores the callee-saved MIPS floating point
registers as documented by the o32/n32/n64 spec ("MIPSpro N32
ABI Handbook", Table 2-1) for the _setjmp(3), _longjmp(3),
setjmp(3) and longjmp(3) C library functions.  This is only
included when the C library is built with hardware floating point
support (or when "SOFTFLOAT" is not defined).

Submitted by:	sson
MFC after:	1 month
Sponsored by:	DARPA, AFRL
2014-11-21 20:02:06 +00:00
bz
6099803083 Fix build for certain MIPS kernels hiding an unused variable under #ifndef. 2014-11-21 10:47:29 +00:00
br
c37b91681b Add L2-cache writeback/flush operations. Supported 32,128-byte line-size,
else ignored. Cavium Networks also ignored as it has non-standard config
registers.

Obtained from:	NetBSD
Sponsored by:	DARPA, AFRL
2014-11-20 17:06:41 +00:00
adrian
0309e4e4bb * Add a random device
* Use the same rootdev path as MALTA, so the same emulator setups
  can be used with minimal fuss.
2014-11-20 05:54:29 +00:00
adrian
d175585ccd Include a random device. 2014-11-20 05:52:48 +00:00
loos
9ad347c496 Moves all the duplicate code to a single function.
Verify for invalid modes and unwanted flags before pass the new flags to
driver.
2014-11-18 17:22:08 +00:00
imp
e1fec13f7c opt_global.h is included automatically in the build. No need to
explicitly include it in these places.

Sponsored by: Netflix
2014-11-18 17:06:56 +00:00
melifaro
b5d711d3a6 Renove faith(4) and faithd(8) from base. It looks like industry
have chosen different (and more traditional) stateless/statuful
NAT64 as translation mechanism. Last non-trivial commits to both
faith(4) and faithd(8) happened more than 12 years ago, so I assume
it is time to drop RFC3142 in FreeBSD.

No objections from:	net@
2014-11-09 21:33:01 +00:00
hiren
4aa8d359ae Use search method instead of fixed offsets for finding rootfs. This unbreaks
recent images for picostation by allowing to find rootfs at correct location.

Suggested by: loos
MFC after:	1 month
2014-10-30 23:47:28 +00:00
loos
7dd1b73c38 Make the GPIO children attach to the first unit available and not only to
unit 0.

It seems that this 'simplification' was copied to all GPIO drivers in tree.

This fix a bug where a GPIO controller could fail to attach its children
(gpioc and gpiobus) if another GPIO driver attach first.
2014-10-28 18:33:59 +00:00
kib
29a659ef8e Add fueword(9) and casueword(9) functions. They are like fuword(9)
and casuword(9), but do not mix value read and indication of fault.

I know (or remember) enough assembly to handle x86 and powerpc.  For
arm, mips and sparc64, implement fueword() and casueword() as wrappers
around fuword() and casuword(), which means that the functions cannot
distinguish between -1 and fault.

On architectures where fueword() and casueword() are native, implement
fuword() and casuword() using fueword() and casuword(), to reduce
assembly code duplication.

Sponsored by:	The FreeBSD Foundation
Tested by:	pho
MFC after:	2 weeks (ia64 needs treating)
2014-10-28 15:22:13 +00:00