Commit Graph

1839 Commits

Author SHA1 Message Date
adrian
d9f9a5ed9b Enable hardfloat for assembly generation.
gcc versions later than 4.2 started erroring out on seeing hardware
floating point references when soft-float was enabled.

Reviewed by:	imp
2015-08-24 19:09:56 +00:00
royger
5b319fbe38 preload_search_info: make sure mod is set
Add a check to preload_search_info to make sure mod is set. Most of the
callers of preload_search_info don't check that the mod parameter is
set, which can cause page faults. While at it, remove some now unnecessary
checks before calling preload_search_info.

Sponsored by:		Citrix Systems R&D
Reviewed by:		kib
Differential Revision:	https://reviews.freebsd.org/D3440
2015-08-21 15:57:57 +00:00
emaste
002d9943c1 Rationalize BSD license on sys/*/include/in_cksum.h
Remove the advertising clause from the Regents of the University of
California's license, per the letter dated July 22, 1999.

Update clause numbering.
2015-08-05 19:05:12 +00:00
emaste
50ae188f8f Rationalize BSD license on sys/*/include/float.h
Remove the advertising clause from the Regents of the University of
California's license, per the letter dated July 22, 1999.

Update clause numbering.
2015-08-05 17:05:35 +00:00
jah
b8c4d76738 Add two new pmap functions:
vm_offset_t pmap_quick_enter_page(vm_page_t m)
void pmap_quick_remove_page(vm_offset_t kva)

These will create and destroy a temporary, CPU-local KVA mapping of a specified page.

Guarantees:
--Will not sleep and will not fail.
--Safe to call under a non-sleepable lock or from an ithread

Restrictions:
--Not guaranteed to be safe to call from an interrupt filter or under a spin mutex on all platforms
--Current implementation does not guarantee more than one page of mapping space across all platforms. MI code should not make nested calls to pmap_quick_enter_page.
--MI code should not perform locking while holding onto a mapping created by pmap_quick_enter_page

The idea is to use this in busdma, for bounce buffer copies as well as virtually-indexed cache maintenance on mips and arm.

NOTE: the non-i386, non-amd64 implementations of these functions still need review and testing.

Reviewed by:	kib
Approved by:	kib (mentor)
Differential Revision:	http://reviews.freebsd.org/D3013
2015-08-04 19:46:13 +00:00
sbruno
1ab01f00f8 Remove dead functions pmap_pvdump and pads.
Differential Revision:	D3206
Submitted by:	kevin.bowling@kev009.com
Reviewed by:	alc
2015-07-29 20:47:27 +00:00
sbruno
4c585d4a87 Make Broadcom XLR use shared ds1374 RTC driver.
Remove its identical and redundant ds1374u version.

Differential Revision:	D3225
Submitted by:	kevin.bowling@kev009.com
2015-07-29 15:32:59 +00:00
adrian
af6717c229 Populate hw.model with the CPU model information.
Now you see something like:

# sysctl hw.model
hw.model: Atheros AR9330 rev 1

Tested:

* Carambola 2, AR9331 SoC
2015-07-14 05:14:10 +00:00
kib
c17f8bfdd5 Add the atomic_thread_fence() family of functions with intent to
provide a semantic defined by the C11 fences with corresponding
memory_order.

atomic_thread_fence_acq() gives r | r, w, where r and w are read and
write accesses, and | denotes the fence itself.

atomic_thread_fence_rel() is r, w | w.

atomic_thread_fence_acq_rel() is the combination of the acquire and
release in single operation.  Note that reads after the acq+rel fence
could be made visible before writes preceeding the fence.

atomic_thread_fence_seq_cst() orders all accesses before/after the
fence, and the fence itself is globally ordered against other
sequentially consistent atomic operations.

Reviewed by:	alc
Discussed with:	bde
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2015-07-08 18:12:24 +00:00
adrian
e44e1c10f7 Reshuffle all of the DDR flush operations into a single switch/mux,
and start teaching subsystems about it.

The Atheros MIPS platforms don't guarantee any kind of FIFO consistency
with interrupts in hardware.  So software needs to do a flush when it
receives an interrupt and before it calls the interrupt handler.

There are new ones for the QCA934x and QCA955x, so do a few things:

* Get rid of the individual ones (for ethernet and IP2);
* Create a mux and enum listing all the variations on DDR flushes;
* replace the uses of IP2 with the relevant one (which will typically
  be "PCI" here);
* call the USB DDR flush before calling the real USB interrupt handlers;
* call the ethernet one upon receiving an interrupt that's for us,
  rather than never calling it during operation.

Tested:

* QCA9558 (TP-Link archer c7 v2)
* AR9331 (Carambola 2)

TODO:

* PCI, USB, ethernet, etc need to do a double-check to see if the
  interrupt was truely for them before doing the DDR.  For now I
  prefer "correct" over "fast".
2015-07-04 03:05:57 +00:00
br
8cdae428f2 o Add a description for virtio block device implemented
in PISM (Bluespec C-interface device)
o Add a kernel config

Sponsored by:	HEIF5
2015-07-03 14:46:57 +00:00
adrian
bf0aa35100 Oops - fix typo. 2015-07-03 07:00:24 +00:00
adrian
0db3cf1b6e Add initial support for the TP-Link Archer C7 v2.
The SoC, the flash, the ethernet ports and ethernet switch all work.
The USB works.

The 11ac PCIe NIC internally is at least seen by the PCIE RC, but
I haven't tried using it yet.  There's no driver and I haven't
yet swapped it out for a non-11ac chip.

The on-chip 2GHz wifi works, but there are some data errors that
get thrown up in STA mode when scanning.  I have a feeling I have
to finish the DDR flush code out and have it run correctly on the
shared interrupts; that'll take a bit of time to get right.

But if you're after an updated piece of hardware, the Archer C7 v2
is certainly there, and you can replace the 11ac NIC with a 3x3
Atheros PCIe device (eg AR9380, AR9390, AR9580, etc) and it'll
"just work".

Tested:

* TP-Link archer c7v2.
2015-07-03 06:09:56 +00:00
adrian
8c2676b7e0 Add pcb1 to the QCA955x.
The Tp-link Archer-C7v2 unit has a QCA9558 internally but hangs the
QCA988x 11ac PCIe NIC off of PCI RC #1, not #0.

So I actually finally /do/ have a board to verify whether PCIe is working.
Grr.

Tested:

* TP-Link Archer-C7v2.
2015-07-03 06:06:44 +00:00
adrian
3c153beb7c Enable setting the QCA955x GPIO output mux configuration.
It's not used by any boards yet, but it's going to creep up soon
as more boards show up.
2015-07-03 03:34:21 +00:00
adrian
d584d71770 Add register defines for the QCA955x DDR flush and GPIO control. 2015-07-03 03:32:54 +00:00
markm
d586165577 Huge cleanup of random(4) code.
* GENERAL
- Update copyright.
- Make kernel options for RANDOM_YARROW and RANDOM_DUMMY. Set
  neither to ON, which means we want Fortuna
- If there is no 'device random' in the kernel, there will be NO
  random(4) device in the kernel, and the KERN_ARND sysctl will
  return nothing. With RANDOM_DUMMY there will be a random(4) that
  always blocks.
- Repair kern.arandom (KERN_ARND sysctl). The old version went
  through arc4random(9) and was a bit weird.
- Adjust arc4random stirring a bit - the existing code looks a little
  suspect.
- Fix the nasty pre- and post-read overloading by providing explictit
  functions to do these tasks.
- Redo read_random(9) so as to duplicate random(4)'s read internals.
  This makes it a first-class citizen rather than a hack.
- Move stuff out of locked regions when it does not need to be
  there.
- Trim RANDOM_DEBUG printfs. Some are excess to requirement, some
  behind boot verbose.
- Use SYSINIT to sequence the startup.
- Fix init/deinit sysctl stuff.
- Make relevant sysctls also tunables.
- Add different harvesting "styles" to allow for different requirements
  (direct, queue, fast).
- Add harvesting of FFS atime events. This needs to be checked for
  weighing down the FS code.
- Add harvesting of slab allocator events. This needs to be checked for
  weighing down the allocator code.
- Fix the random(9) manpage.
- Loadable modules are not present for now. These will be re-engineered
  when the dust settles.
- Use macros for locks.
- Fix comments.

* src/share/man/...
- Update the man pages.

* src/etc/...
- The startup/shutdown work is done in D2924.

* src/UPDATING
- Add UPDATING announcement.

* src/sys/dev/random/build.sh
- Add copyright.
- Add libz for unit tests.

* src/sys/dev/random/dummy.c
- Remove; no longer needed. Functionality incorporated into randomdev.*.

* live_entropy_sources.c live_entropy_sources.h
- Remove; content moved.
- move content to randomdev.[ch] and optimise.

* src/sys/dev/random/random_adaptors.c src/sys/dev/random/random_adaptors.h
- Remove; plugability is no longer used. Compile-time algorithm
  selection is the way to go.

* src/sys/dev/random/random_harvestq.c src/sys/dev/random/random_harvestq.h
- Add early (re)boot-time randomness caching.

* src/sys/dev/random/randomdev_soft.c src/sys/dev/random/randomdev_soft.h
- Remove; no longer needed.

* src/sys/dev/random/uint128.h
- Provide a fake uint128_t; if a real one ever arrived, we can use
  that instead. All that is needed here is N=0, N++, N==0, and some
  localised trickery is used to manufacture a 128-bit 0ULLL.

* src/sys/dev/random/unit_test.c src/sys/dev/random/unit_test.h
- Improve unit tests; previously the testing human needed clairvoyance;
  now the test will do a basic check of compressibility. Clairvoyant
  talent is still a good idea.
- This is still a long way off a proper unit test.

* src/sys/dev/random/fortuna.c src/sys/dev/random/fortuna.h
- Improve messy union to just uint128_t.
- Remove unneeded 'static struct fortuna_start_cache'.
- Tighten up up arithmetic.
- Provide a method to allow eternal junk to be introduced; harden
  it against blatant by compress/hashing.
- Assert that locks are held correctly.
- Fix the nasty pre- and post-read overloading by providing explictit
  functions to do these tasks.
- Turn into self-sufficient module (no longer requires randomdev_soft.[ch])

* src/sys/dev/random/yarrow.c src/sys/dev/random/yarrow.h
- Improve messy union to just uint128_t.
- Remove unneeded 'staic struct start_cache'.
- Tighten up up arithmetic.
- Provide a method to allow eternal junk to be introduced; harden
  it against blatant by compress/hashing.
- Assert that locks are held correctly.
- Fix the nasty pre- and post-read overloading by providing explictit
  functions to do these tasks.
- Turn into self-sufficient module (no longer requires randomdev_soft.[ch])
- Fix some magic numbers elsewhere used as FAST and SLOW.

Differential Revision: https://reviews.freebsd.org/D2025
Reviewed by: vsevolod,delphij,rwatson,trasz,jmg
Approved by: so (delphij)
2015-06-30 17:00:45 +00:00
allanjude
77a3f16a97 Add if_vlan, ipfw{,_nat}.ko, and libalias to the AR934X kernel config
This makes the TP-Link WDR3600 routers more useful

Differential Revision:	https://reviews.freebsd.org/D2780
Approved by:	adrian
Sponsored by:	ScaleEngine Inc.
2015-06-13 06:09:00 +00:00
alc
263927b83e Retire VM_FREEPOOL_CACHE as the next step in eliminating PG_CACHE pages.
Differential Revision:	https://reviews.freebsd.org/D2712
Reviewed by:	kib
Sponsored by:	EMC / Isilon Storage Division
2015-06-08 04:59:32 +00:00
adrian
1698c446dc Cope with .. less memory. 2015-06-08 03:01:19 +00:00
bz
e79c62ff68 Similarly to other architecture, add the include for cpufunc.h which is
needed for pte.h by vmstat to resolve MIPS_CCA_UNCACHED.
2015-05-28 12:33:21 +00:00
dchagin
0969667a9e The kernel sends signals to the processes via ABI specific sv_sendsig method.
Native ABI do not need signal conversion, only emulators may want this. Usually
emulators implements its own sv_sendsig method. For now only ibcs2 emulator does
not have own sv_sendsig implementation and depends on native sendsig() method.
So, remove any extra attempts to convert signal numbers from native sendsig()
methods except from i386 where ibsc2 is living.
2015-05-24 17:56:02 +00:00
dchagin
ca0fda4077 In preparation for switching linuxulator to the use the native 1:1
threads add a hook for cleaning thread resources before the thread die.

Differential Revision:	https://reviews.freebsd.org/D1038
2015-05-24 14:51:29 +00:00
alc
7ec6cd48d0 Simplify the allocation of page table pages for mips64. Specifically,
when allocation fails, it suffices to perform VM_WAIT.  The direct map
covers the entirely of physical memory, so unlike 32-bit mips any
physical page can be used as a page table page.
2015-05-23 16:54:46 +00:00
jkim
318c4f97e6 CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten
years for head.  However, it is continuously misused as the mpsafe argument
for callout_init(9).  Deprecate the flag and clean up callout_init() calls
to make them more consistent.

Differential Revision:	https://reviews.freebsd.org/D2613
Reviewed by:	jhb
MFC after:	2 weeks
2015-05-22 17:05:21 +00:00
pfg
b0d837707d ddb: finish converting boolean values.
The replacement started at r283088 was necessarily incomplete without
replacing boolean_t with bool.  This also involved cleaning some type
mismatches and ansifying old C function declarations.

Pointed out by:	bde
Discussed with:	bde, ian, jhb
2015-05-21 15:16:18 +00:00
adrian
e23b91be3d Convert routerstation to use geom_uncompress. 2015-05-19 06:45:56 +00:00
adrian
6d394a2fa8 Migrate RSPRO to use the uncompress module, not uzip.
(This is hand-in-hand with what I'm about to do with freebsd-wifi-build.)
2015-05-19 06:45:06 +00:00
adrian
ff4271fbcf QCA955x / AP135 platform tidyups.
* Change mips24k -> mips74k for hwpmc, but leave it disabled for now.
* don't build pci by default.
* build pci and qca955x_pci for AP135, as theres a PCIe NIC.
* don't build a hwpmc module, it doesn't really work out well
  for the mips boards at the moment.
* add ipfw and DEFAULT_TO_ACCEPT.
2015-05-19 05:41:00 +00:00
adrian
831d31e595 The AP135 PCIe NIC isn't an ath device, it's an 11ac part (linux ath10k.)
So, don't try to attach hints to it here.
2015-05-19 05:33:07 +00:00
adrian
a267e1e605 Add initial support for the QCA955x PCIe host controller.
The QCA955x looks a lot like the AR724x PCIe controller, except it
supports two root complexes.  Unfortunately I only have one, so
although this code has started down the path of supporting more than
one, it's definitely not yet ready.

Tested:

* AP135 board (QCA9558 SoC), with the 11ac NIC swapped for an AR9380
  PCIe NIC.

Notes:

* Yes, this driver isn't very pretty.  I decided to commit what I have
  versus holding onto something that isn't yet finished.  It is enough
  to bring up the above NIC and interrupt routing works, so it's a good
  start.

* However, yes, the DDR flush routine hooks need to be fixed up.
  I don't think I'm firing the right one at the moment.
2015-05-19 05:31:58 +00:00
adrian
57daeeb7b4 Increment the vm stats "v_intr" counter so the global system interrupt
statistics work again.

I'm not sure why/when this broke, only that it used to work fine.

This commit is brought to you by Maker Faire Bay Area 2015.
2015-05-16 23:51:24 +00:00
br
deecdc3d61 Provide the number of interrupt resources added to the list
by using extra argument, so caller will know that.
2015-05-15 13:55:18 +00:00
hselasky
fb48ac4acc The add_bounce_page() function can be called when loading physical
pages which pass a NULL virtual address. If the BUS_DMA_KEEP_PG_OFFSET
flag is set, use the physical address to compute the page offset
instead. The physical address should always be valid when adding
bounce pages and should contain the same page offset like the virtual
address.

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
MFC after:	1 week
Reviewed by:	jhb@
2015-04-28 06:12:37 +00:00
adrian
9f1456194d Start enabling the available GPIO pins on the Carambola 2.
The carambola2 exposes all the gpio pins, but some are reserved for
core functions (eg usb, ethernet, etc.) Others are configured by default
to be available as normal GPIO pins to do interesting things with.

GPIO 18->23 is the I2S, SLIC and SPDIF device pins, but none of those
are currently used.  So, just allow those to show up.

Tested:

* AR9344, Carambola 2
* (.. bitbang SPI to an Adafruit LCD via libgpio, because FreeBSD could
  do with more shiny output devices that aren't network interfaces.)

TODO:

There are some other pins aren't currently included here, but should be.
The LED pins are for the internal switch inside the AR9344.

* GPIO 0+1 are "LED0 + LED1", but they're tied to high for bootstrapping.
* GPIO 13-17 are "LED2..7", but they're tied (H, L, L, L, H) for bootstrapping.
* GPIO 11 and 12 are UART RTS/CTS or I2S; but GPIO 12 is tied L for bootstrap.
2015-04-12 00:02:32 +00:00
andrew
e2a65d5cfa Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.

This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.

MFC after:	1 week
2015-04-11 17:16:23 +00:00
jhb
148355cbb6 Move the 32-bit compatible procfs types from freebsd32.h to <sys/procfs.h>
and export them to userland.
- Define __HAVE_REG32 on platforms that define a reg32 structure and check
  for this in <sys/procfs.h> to control when to export prstatus32, etc.
- Add prstatus32_t and prpsinfo32_t typedefs for the 32-bit structures.
  libbfd looks for these types, and having them fixes 'gcore' in gdb of a
  32-bit process on a 64-bit platform.
- Use the structure definitions from <sys/procfs.h> in gcore's elf32 core
  dump code instead of duplicating the definitions.

Differential Revision:	https://reviews.freebsd.org/D2142
Reviewed by:	kib, nathanw (powerpc bits)
MFC after:	1 week
2015-04-08 16:30:45 +00:00
adrian
a0a73d3d2d Convert the DIR-825C1 to use the new map based MAC address configuration.
Tested:

* DIR-825C1
2015-04-05 22:00:44 +00:00
adrian
61ea198b48 Update the board MAC address configuration for the DIR-655A1.
The MAC addresses were totally wrong. They're like the DIR-625C1 - at
0x1ffe0004 and 0x1ffe0018. They're however stored as text strings.
The ath0 MAC address is also not set, even though the calibration
partition is valid.

So, pick the board address / first MAC as the ath0 MAC, and derive
arge0/arge1 from that.  That way they're hopefully unique enough
for people with multiple devices.

Tested:

* DIR-655A1

TODO:

* Do the same for the DIR-625A1 and DIR-625C1.
2015-04-05 20:56:51 +00:00
rstone
57feb6fb43 Fix integer truncation bug in malloc(9)
A couple of internal functions used by malloc(9) and uma truncated
a size_t down to an int.  This could cause any number of issues
(e.g. indefinite sleeps, memory corruption) if any kernel
subsystem tried to allocate 2GB or more through malloc.  zfs would
attempt such an allocation when run on a system with 2TB or more
of RAM.

Note to self: When this is MFCed, sparc64 needs the same fix.

Differential revision:	https://reviews.freebsd.org/D2106
Reviewed by:	kib
Reported by:	Michael Fuckner <michael@fuckner.net>
Tested by:	Michael Fuckner <michael@fuckner.net>
MFC after:	2 weeks
2015-04-01 12:42:26 +00:00
adrian
d3d56db7e8 Migrate the TL-WR1043nd v2 to use the new map based MAC hints mechanism.
This programs separate, correct mac addresses for the ethernet and
wlan interfaces.
2015-04-01 06:44:39 +00:00
adrian
072137beb0 Add hints to set the board MAC address and derived values for each interface.
This allows the TL-WDR3600 to use the correct MAC address for ath0, ath1
and arge0.  arge1 isn't used; until I disable it entirely it'll just
show up with a randomly generated MAC.
2015-03-28 23:42:59 +00:00
adrian
11776dfc59 Begin moving support for board MAC addresses over to being explicitly defined.
A lot of these dinky atheros based MIPS boards don't have a nice, well,
anything consistent defining their MAC addresses for things.

The Atheros reference design boards will happily put MAC addresses
into the wifi module calibration data like they should, and individual
ethernet MAC addresses into the calibration area in flash.
That makes my life easy - "hint.arge.X.eeprommac=<addr>" reads from
that flash address to extract a MAC, and everything works fine.

However, aside from some very well behaved vendors (eg the Carambola 2
board), everyone else does something odd.

eg:

* a MAC address in the environment (eg ubiquiti routerstation/RSPRO)
   that you derive arge0/arge1 MAC addresses from.
* a MAC address in flash that you derive arge0/arge1 MAC addresses from.
* The wifi devices having their own MAC addresses in calibration data,
  like normal.
* The wifi devices having a fixed, default or garbage value for a MAC
  address in calibration data, and it has to be derived from the
  system MAC.

So to support this complete nonsense of a situation, there needs to be
a few hacks:

* The "board" MAC address needs to be derived from somewhere and squirreled
  away.  For now it's either redboot or a MAC address stored in calibration
  flash.

* Then, a "map" set of hints to populate kenv with some MAC addresses
  that are derived/local, based on the board address.  Each board has
  a totally different idea of what you do to derive things, so each
  map entry has an "offset" (+ve or -ve) that's added to the board
  MAC address.

* Then if_arge (and later, if_ath) should check kenv for said hint and
  if it's found, use that rather than the EEPROM MAC address - which may
  be totally garbage and not actually work right.

In order to do this, I've undone some of the custom redboot expecting
hacks in if_arge and the stuff that magically adds one to the MAC
address supplied by the board - instead, as I continue to test this
out on more hardware, I'll update the hints file with a map explaining
(a) where the board MAC should come from, and (b) what offsets to use
for each device.

The aim is to have all of the tplink, dlink and other random hardware
we run on have valid MAC addresses at boot, so (a) people don't get
random B:S:Dx:x ethernet MACs, and (b) the wifi MAC is valid
so it works rather than trying to use an invalid address that
actually upsets systems (think: multicast bit set in BSSID.)

Tested:

* TP-Link TL_WDR3600 - subsequent commits will add the hints map
  and the if_ath support.

TODO:

* Since this is -HEAD, and I'm all for debugging, there's a lot of
  printf()s in here.  They'll eventually go under bootverbose.
* I'd like to turn the macaddr routines into something available
  to all drivers - too many places hand-roll random MAC addresses
  and parser stuff.  I'd rather it just be shared code.
  However, that'll require more formal review.
* More boards.
2015-03-28 23:40:29 +00:00
adrian
94a018aa4c Remove the second MODULES_OVERRIDE; add if_vlan to the list. 2015-03-28 23:01:59 +00:00
adrian
78cf47094f Add the MAC address hints for arge0/arge1 on the CARAMBOLA2.
Obtained from:	Linux OpenWRT
2015-03-28 19:59:33 +00:00
adrian
d0827d31e3 Set VM_KMEM_SIZE_SCALE=1 for the AR91xx SoCs.
Without this the autotuning fails for small amounts of RAM (32mb),
which all the AR91xx shipping products seemed to have.

Thanks to gjb for reminding me to re-test this stuff.

Tested:

* AR91xx, TP-Link TL-WR1043nd v1
2015-03-28 06:54:18 +00:00
br
f2d066e3f7 Add 64 byte linesize cache flushing routines for L1 instruction, L1 data
and L2 data caches.

Sponsored by:	HEIF5
2015-03-26 14:51:24 +00:00
gjb
ac3bc9f4da Remove duplicate AH_DEBUG_ALQ option.
Sponsored by:	The FreeBSD Foundation
2015-03-26 12:58:30 +00:00
adrian
4f01a4a8e3 Add initial D-Link DIR-655 (A1) support.
This is based on the AP135 design - QCA9558 SoC, 3x3 2GHz wifi, but no
5GHz (11n or 11ac) chip is available.

It however still has 128MiB of RAM, 16MiB of NOR flash and the AR8327N
gigabit switch - so it's quite a beefy router device.

Tested:

* Well, a unit, naturally

Obtained from:	Completely messing up an amazon.com order and getting this instead, and asking "hey, wonder if I could.."
2015-03-22 02:15:09 +00:00
adrian
45887064ac re-enable building modules for the AR933x
* add ipfw
* delete ath / ath_ahb for now, until I can have Warner beat me
  with the clue stick about putting in conditional build things into
  the ath Makefile so the module builds can just have the HAL bits
  that are relevant for a particular target.
2015-03-21 23:39:34 +00:00