Commit Graph

702 Commits

Author SHA1 Message Date
Alan Cox
ed48a217f6 Add partial pmap locking.
Eliminate the unused allpmaps list.

Tested by: cognet@
2006-06-06 04:32:20 +00:00
Olivier Houchard
f14c3a8aac Make VERBOSE_INIT_ARM compile by fixing various printf formats, and add it
as an option.

Submitted by:   Max N. Boyarov <m.boyarov at bsd dot by>
2006-06-06 01:14:12 +00:00
Olivier Houchard
ceff114886 vm_page_alloc_contig() can sleep, so don't even think about using it
in the M_NOWAIT case.
2006-06-05 23:42:47 +00:00
Alan Cox
ce142d9ec0 Introduce the function pmap_enter_object(). It maps a sequence of resident
pages from the same object.  Use it in vm_map_pmap_enter() to reduce the
locking overhead of premapping objects.

Reviewed by: tegge@
2006-06-05 20:35:27 +00:00
Olivier Houchard
b2adc703fd Don't #error if no CPU is defined but we're not compiling the kernel. 2006-06-02 09:39:06 +00:00
Olivier Houchard
27b45ae819 Don't enable the FIQ in enable_interrupts() if F32_bit is not specified.
This has been committed by mistake.

Reported by:	ssouhlal
2006-06-01 16:17:44 +00:00
Alan Cox
d49e4d3f55 Introduce pmap_enter_locked() and use it to reimplement pmap_enter_quick().
Tested by: cognet@
2006-06-01 01:31:07 +00:00
Olivier Houchard
c7f17eb45c Avoid a LOR by unlocking the vm_page_queue_mtx before calling uma_zalloc,
and freeing the allocated memory if another thread already did the same.
2006-05-31 15:52:11 +00:00
Olivier Houchard
4cd3385ee3 If our buffer is not aligned on the cache line size, write back/invalidate
the first and last cache line in PREREAD, and just invalidate the cache
lines in POSTREAD, instead of write-back/invalidating in POSTREAD, which
could lead to stale data overriding what has been transfered by DMA.
2006-05-31 15:50:33 +00:00
Olivier Houchard
c712f1ef5b Ooops arm10 is armv5, not armv4.
Submitted by:	kevlo
2006-05-31 13:06:08 +00:00
Olivier Houchard
87adbb81cc Include machine/cpuconf.h in pmap.h in order to get ARM_NMMUS defined,
to appease -Wundef.
2006-05-31 11:57:37 +00:00
Olivier Houchard
1dbb640331 Protect the mapping used for pmap_copy_page/pmap_zero_page with a
mutex.
2006-05-30 23:50:45 +00:00
Olivier Houchard
b64b87c8bd To avoid problems, invalidate the data cache and disable the MMU once
we're done uncompressing the kernel.
2006-05-30 21:13:47 +00:00
Olivier Houchard
51036d9b71 In pmap_is_prefaultable(), assert that the pte isn't NULL if
pmap_get_pde_pte() returns TRUE.

Suggested by:   ssouhlal
2006-05-30 16:55:38 +00:00
Olivier Houchard
29d1651fc5 The Assabet has 32MB of RAM, not 16.
Submitted by:	kevlo
2006-05-30 15:47:55 +00:00
Benno Rice
1108c31908 In pmap_mapdev we correctly round the address off to the nearest page
boundary, but we must also add the offset back on to the va we return.
2006-05-30 14:21:09 +00:00
Olivier Houchard
ec4c4a14f5 Uncomment the call to cpu_idcache_wbinv_all() after the MMU has been
enabled. It has been commented out for a reason I forgot but I suspect
does not apply anymore.
Technically speaking it's not required to do it, has the data and the
instruction cache have been disabled in _start(). However, it may change
in the future, so I don't want to rely on this behavior.

Submitted by:	kevlo
2006-05-30 11:51:58 +00:00
Olivier Houchard
e1f01b09a6 Nuke sa11x0_attach_args. It's a NetBSDIsm, and we have no use for it.
Submitted by:	kevlo
2006-05-29 19:32:32 +00:00
Olivier Houchard
c212f0efe9 Remove any reference to enable_mmu(), it's been gone for a long time.
Submitted by:	kevlo
2006-05-26 01:41:47 +00:00
Olivier Houchard
fb350a0d6a Use pmap_devmap_bootstrap(), instead of mapping the SACOM1 registers
with pmap_map_entry.
More use of macros instead of hardcoding the addr.

Submitted by:	kevlo
2006-05-23 12:14:14 +00:00
Olivier Houchard
9c8c02e7a0 Use macros instead of hardcoding the address for SACOM1. Also don't
pretend we're working with SACOM3, as we're really mapping SACOM1.

Submitted by:   kevlo
2006-05-22 23:25:34 +00:00
Olivier Houchard
d3e6e0e6f6 We have an implementation of generic_bs_rr_1, so use it, as some drivers use
it.

Submitted by:	kevlo
2006-05-19 11:27:02 +00:00
Olivier Houchard
c166cceecc Comment out SYSCTL_OMIT_DESCR until it's committed. 2006-05-19 00:11:21 +00:00
Olivier Houchard
ac895519de Implement sa11x0_bs_unmap.
Submitted by:	kevlo
2006-05-18 22:03:47 +00:00
Olivier Houchard
b012edd4ed Make this compile (UART_IPEND_* => SER_INT_*). 2006-05-18 22:02:33 +00:00
Olivier Houchard
ec21307611 Add definitions for atomic_subtract_rel_32, atomic_add_rel_32 and
atomic_load_acq_32, needed for hwpmc.
2006-05-15 13:08:12 +00:00
Benno Rice
0b6d552a34 Display real/avail memory as per other platforms.
Approved by:	cognet
2006-05-15 10:40:37 +00:00
Olivier Houchard
ef4d5877dd Switch to a 64bit time_t, while it's not a big problem to do so.
Suggested by:	imp
2006-05-15 00:17:27 +00:00
Olivier Houchard
d5d776c16b Resurrect Skyeye support :
Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds
workarounds for things skyeye doesn't simulate. Specifically :
- Use USART0 instead of DBGU as the console, make it not use DMA, and           manually provoke an interrupt when we're done in the transmit function.
- Skyeye maintains an internal counter for clock, but apparently there's
no way to access it, so hack the timecounter code to return a value which
is increased at every clock interrupts. This is gross, but I didn't find a
better way to implement timecounters without hacking Skyeye to get the
counter value.
- Force the write-back of PTEs once we're done writing them, even if they
are supposed to be write-through. I don't know why I have to do that.
2006-05-13 23:41:16 +00:00
Warner Losh
9c5b312952 Tidy up a bit... 2006-05-13 02:47:39 +00:00
Poul-Henning Kamp
5405ab4889 Clean out sysctl machdep.* related defines.
The cmos clock related stuff should really be in MI code.
2006-05-11 17:29:25 +00:00
Olivier Houchard
053105371f Get this to compile :
- The prototype of uart_bus_probe() hasn't been changed in cvs yet, so use the
old one.
- Add at91_pdcreg.h, needed by uart_dev_at91usart.c.
2006-05-11 14:30:28 +00:00
Olivier Houchard
04091343f6 Move the call to cpu_setup() before the call to vm_ksubmap_init().
vm_ksubmap_init() calls pmap_copy_page(), which uses the mini data cache
to do the copy, but we're running uncaching before cpu_setup().
For some reason it hasn't been a problem so far, but it is for the
PXA255.

Spotted out by: benno
2006-05-10 13:39:10 +00:00
Olivier Houchard
4687ab54e3 Setting the rid of the resource is a good idea, but we still need to return
the resource after.
2006-05-05 19:14:57 +00:00
Olivier Houchard
477d836c4d MFother arches :
date: 2006/04/12 04:22:50;  author: alc;  state: Exp;  lines: +14 -41
Retire pmap_track_modified().  We no longer need it because we do not
create managed mappings within the clean submap.  To prevent regressions,
add assertions blocking the creation of managed mappings within the clean
submap.

Reviewed by: tegge
2006-04-22 22:51:32 +00:00
Warner Losh
018dc558f6 When returning a resource that we've allocated with rman_reserve_resource,
go ahead and set the rid for that resource.
2006-04-20 04:12:02 +00:00
Olivier Houchard
eb66942114 We need to adjust the bus handle if the resource is SYS_RES_MEMORY, NOT
SYS_RES_IOPORT.
2006-04-13 15:07:59 +00:00
Olivier Houchard
b8986f5675 Disable/enable fiqs as well as irqs. 2006-04-13 14:25:28 +00:00
Olivier Houchard
123a5345c1 MFp4: Use CPU_CONTROL_ROUNDROBIN for arm9, it seems to give marginally
better performances.
2006-04-09 23:07:31 +00:00
Olivier Houchard
43293c6937 Not only disable/enable interrupts, do it for FIQs as well, when needed. 2006-04-09 20:16:47 +00:00
Olivier Houchard
174329aff2 MFp4: Don't write-back the PTEs if they are mapped write-through, this was
apparently only needed because skyeye has bugs in its cache emulation.
2006-04-09 20:03:03 +00:00
Olivier Houchard
602c85541e MFp4: Catchup with recent UART changes. 2006-04-06 20:47:54 +00:00
Olivier Houchard
1ac232117c Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as a
timecounter (because gxemul doesn't emule it yet).
2006-04-06 17:11:08 +00:00
Warner Losh
5ec7256cb1 Add debug writes in error cases that, in theory, should never happen 2006-04-06 04:32:29 +00:00
Warner Losh
723c740a55 Connect twi to the FreeBSD iicbus infrastructure. 2006-04-06 04:31:19 +00:00
Warner Losh
222c969f16 Pull in numerous fixes from myself and cognet. With these fixes the
KB9202 eval board is finally stable with a nfs root.
2006-04-06 04:30:23 +00:00
Warner Losh
f535b19502 Remove unused bit definitions.
Minor style cleanup while I'm here.
2006-04-06 04:29:24 +00:00
Warner Losh
b2e16e9338 Optimize the TX side of the part by using the PDC to move bytes out to
the wire.  This increases the speed considerably.  Start to put
infrastructure in place to do RX side, but that requires more study
before it can be done.
2006-04-06 04:27:19 +00:00
Peter Wemm
b9eee07e36 Remove the unused sva and eva arguments from pmap_remove_pages(). 2006-04-03 21:16:10 +00:00
Olivier Houchard
ac2bfec884 Implement pmap_object_init_pt() the way it is on sparc64/alpha, by doing
nothing except asserting the vm object is locked, and a device object,
instead of a useless printf.
2006-03-26 22:03:43 +00:00
Warner Losh
e40dc9a60d Skeleton support for the SSC device, which implements I2S interfaces,
amoung others.
2006-03-24 07:42:33 +00:00
Warner Losh
60a5289836 Skeleton PIO support. 2006-03-24 07:39:29 +00:00
Warner Losh
c44fe487c2 Add the sekelton of support for the Power Management Controller. 2006-03-24 07:37:56 +00:00
Warner Losh
72ec44a573 Add rtc to files.at91 2006-03-24 07:36:23 +00:00
Warner Losh
74e4c374f2 Add RTC support. This may be of dubious value since the RTC is reset
to 1998 every reboot.
2006-03-24 07:35:30 +00:00
Olivier Houchard
5207a211b3 MFp4: Don't force single-user now we can go multi-user.
Call cninit() only after the pagetable has been set, as locore.S won't
map the system device for us anymore.
2006-03-22 22:31:31 +00:00
Olivier Houchard
e9f654ba90 MFp4: More special casing of when vector_page == 0x00000000 :
catch attempts to write to vector_page earlier in pmap_fault_fixup(),
and deny it.
2006-03-22 22:11:10 +00:00
Olivier Houchard
6f4640d092 MFp4: If we're mapping the vector page (this will happen if we didn't
relocate it), do not attempt to call pmap_vac_me_harder() on the page.
At this point m will be NULL, and we know we won't have any cache
issues with this page.
2006-03-22 21:23:27 +00:00
Olivier Houchard
a1de0396bd MFp4: teach the KB920x bits how to know where the ELF trampoline puts the
strtab and the symtab.
2006-03-22 21:16:51 +00:00
Olivier Houchard
eea877f42d MFp4: Handle break interrupts (it seems to only work for USART, not DBGU). 2006-03-22 21:16:09 +00:00
Warner Losh
36dd3fdf9e MFp4:
Add bus attachment for the ohci device on this chip.  The bus and hub
are detected correctly, but the children devices aren't detected
correctly for reasons unknown.
2006-03-18 01:45:29 +00:00
Warner Losh
1b0561a15d Add ohci controller mapping. 2006-03-18 01:43:54 +00:00
Warner Losh
2dc738a640 MFp4:
o update TODO list
o Better use of busdma
o mark RX dtors as COHERENT.  This helps performance a lot by not requiring
  so many EXPENSIVE cache flushes.  The cost of accessing it non-cached
  is much smaller.
o Copy data from Rx buffers to make IP header 4 byte aligned.
o CRC length included in reported length, so cope
o Don't free TX buffer twice
o Manage TX buffers better.
o Enable just the interrupts we want.
o Manage OACTIVE better

# Some of these done by cognet
# These changes let us get to # via NFS root.
2006-03-18 01:43:25 +00:00
Warner Losh
a9e7d93f31 MFP4:
Gratuitously sort alphabetically.
2006-03-18 01:39:23 +00:00
Warner Losh
f54a134552 MFP4:
GC and fix definitions.

# some of this may have been done by cognet
2006-03-18 01:38:25 +00:00
Warner Losh
f3de38a73d MFp4:
o Add memory barrier to bus space
o Allow for up to 3 IRQs per device
o Move to table driven population of children devices.
o Add support for usb ohci memory mapped controller resource allocation.
o Clean up a bunch of extra writes to disable interrupts that are now
  done elsewhere.
o Force all system interrupt handlers be fast.  We get deadlock if they
  aren't.
2006-03-18 01:35:49 +00:00
Warner Losh
5bcedfaa73 MFp4:
o Disable all interrupts that the ST can generate until we have an ISR
  to service them.
o Correct clock calculation to make DELAY the right length...

Submitted by: cognet (#2)
2006-03-18 01:30:31 +00:00
Olivier Houchard
c0e239dead MFp4: Forget the asm inlined version of in_cksum_hdr(). It doesn't work if
the pointer is unaligned, and it just doesn't worth it.
2006-03-09 23:33:59 +00:00
Olivier Houchard
5adfa73930 Use BUS_DMA_COHERENT. 2006-03-02 14:06:38 +00:00
Olivier Houchard
db45b073f7 Use 8 * sizeof(int) instead of hardcoding 32, for the unlikely case this
code ever get used on a plateform where sizeof(int) != 4.

Suggested by:	jmg
2006-03-02 00:37:40 +00:00
Olivier Houchard
2456c0ea88 Try to honor BUS_DMA_COHERENT : if the flag is set, normally allocate memory
with malloc() or contigmalloc() as usual, but try to re-map the allocated
memory into a VA outside the KVA, non-cached, thus making the calls to
bus_dmamap_sync() for these buffers useless.
2006-03-01 23:04:25 +00:00
Olivier Houchard
4cb8778630 Use a better panic message than lol. 2006-03-01 20:43:51 +00:00
Olivier Houchard
12ce8511ba Make sure we decrement p_lock before leaving prefetch_abort_handler() 2006-03-01 20:42:47 +00:00
Olivier Houchard
c2d5c96b29 userret() now only takes 2 parameters. 2006-03-01 18:33:45 +00:00
Olivier Houchard
493be2ca17 Get this to compile with the recent UART changes. 2006-02-27 23:19:13 +00:00
John Baldwin
06ad42b2f7 Close some races between procfs/ptrace and exit(2):
- Reorder the events in exit(2) slightly so that we trigger the S_EXIT
  stop event earlier.  After we have signalled that, we set P_WEXIT and
  then wait for any processes with a hold on the vmspace via PHOLD to
  release it.  PHOLD now KASSERT()'s that P_WEXIT is clear when it is
  invoked, and PRELE now does a wakeup if P_WEXIT is set and p_lock drops
  to zero.
- Change proc_rwmem() to require that the processing read from has its
  vmspace held via PHOLD by the caller and get rid of all the junk to
  screw around with the vmspace reference count as we no longer need it.
- In ptrace() and pseudofs(), treat a process with P_WEXIT set as if it
  doesn't exist.
- Only do one PHOLD in kern_ptrace() now, and do it earlier so it covers
  FIX_SSTEP() (since on alpha at least this can end up calling proc_rwmem()
  to clear an earlier single-step simualted via a breakpoint).  We only
  do one to avoid races.  Also, by making the EINVAL error for unknown
  requests be part of the default: case in the switch, the various
  switch cases can now just break out to return which removes a _lot_ of
  duplicated PRELE and proc unlocks, etc.  Also, it fixes at least one bug
  where a LWP ptrace command could return EINVAL with the proc lock still
  held.
- Changed the locking for ptrace_single_step(), ptrace_set_pc(), and
  ptrace_clear_single_step() to always be called with the proc lock
  held (it was a mixed bag previously).  Alpha and arm have to drop
  the lock while the mess around with breakpoints, but other archs
  avoid extra lock release/acquires in ptrace().  I did have to fix a
  couple of other consumers in kern_kse and a few other places to
  hold the proc lock and PHOLD.

Tested by:	ps (1 mostly, but some bits of 2-4 as well)
MFC after:	1 week
2006-02-22 18:57:50 +00:00
Warner Losh
2f415ac34d These files apply to all the atmel parts that freebsd is going to run on,
so name them more generically.  If we do support the MMU-less ARM7 parts,
then we'll need to, at that time, expand the files we have.
2006-02-17 22:33:13 +00:00
Warner Losh
77017e63bb This file was obsolete when committed. Catchup and delete it. 2006-02-17 22:23:36 +00:00
Warner Losh
e1fa2d9556 Use the correct address for the ohci device. 2006-02-11 03:58:07 +00:00
Poul-Henning Kamp
eb2da9a51f Simplify system time accounting for profiling.
Rename struct thread's td_sticks to td_pticks, we will need the
other name for more appropriately named use shortly.  Reduce it
from uint64_t to u_int.

Clear td_pticks whenever we enter the kernel instead of recording
its value as reference for userret().  Use the absolute value of
td->pticks in userret() and eliminate third argument.
2006-02-08 08:09:17 +00:00
Olivier Houchard
e56b7f20a0 Set the MAC address after we just read it at attach time, as it seems needed. 2006-02-07 21:31:13 +00:00
Olivier Houchard
9bfe35c80d Set m_pkthdr.len and m_pkthdr.rcvif. 2006-02-07 20:48:52 +00:00
Warner Losh
37a395c110 This file isn't GENERIC, so change the header 2006-02-07 18:45:54 +00:00
Warner Losh
e51680a229 Rather than pull in all the phy, just pull in the lxt phy that we need
for this board (although our lxtphy driver isn't claiming it, but that's
a different problem).

This saves 57k in this kernel.
2006-02-07 18:43:46 +00:00
Olivier Houchard
ea9f99ddcd - Call mii_phy_probe() after we allocated an ifp. mii has this evil
hack where it assumes the first field of the driver softc is the struct
ifnet, and it copies its value in mii_phy_probe().
- In the interrupt handler, set the mbuf m_len field on packet receive.
2006-02-06 22:17:42 +00:00
Olivier Houchard
123f34932c Use memory clobbers, to be on the safe side.
Suggested by:	jhb
2006-02-06 18:29:05 +00:00
Olivier Houchard
697e7cb715 Backout rev 1.12. It would have been a good thing, if gcc was smart enough
not to generate bad code.
2006-02-05 22:06:12 +00:00
Warner Losh
1248f2322b Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC
is a ARM920T based CPU with a bunch of built-in peripherals.  The
inital import supports the SPI bus, the TWI bus (although iicbus
integration is not complete), the uarts, the system timer and the
onboard ethernet.  Support for the Kwikbyte KB9202
(http://www.kwikbyte.com) board is also included, although there's no
reason why the 9200 and the 9201 wouldn't also work.  Primitive
support for running under the skyeye emulator is also provided
(although skyeye's support for the AT91RM9200 is a little weak).

The code has been structured so that other members of Atmel's arm family can
be supported in the future.  The AT91SAM9260 is not presently supported
due to lack of hardware.  The arm7tdmi families are also not supported
becasue they lack an MMU.

Many thanks to cognet@ for his help and assistance in bringing up this
board.  He did much of the vm work and wrote parts of the uart and
system timer code as well as the bus space implementation.

The system boots to single user w/o problem, although the serial
console is a little slow and the ethernet driver is still in flux.

This work was sponsored by Timing Solutions, Corporation.  I am
grateful to their support of the FreeBSD project in this manner.
2006-02-04 23:32:13 +00:00
Olivier Houchard
0cc56a19e1 Don't forget to set the address of the next descriptor to 0 when we're
zeroing a physical page, or we could end up re-zeroing portions of
memory we have zeroed before, which is clearly not wanted.
2006-02-04 18:01:15 +00:00
Olivier Houchard
19d5d0da40 MFi386:
revision 1.288
date: 2006/02/04 14:11:33;  author: wsalamon;  state: Exp;  lines: +4 -1
Hook up the audit system to system call entry and exit. System calls will
now be audited.

Obtained from:  TrustedBSD Project
Approved by: rwatson (mentor)
2006-02-04 17:01:19 +00:00
Warner Losh
d0e50224e8 MFp4: Small cleanup of cpu messages at boot. 2006-02-03 06:39:57 +00:00
Warner Losh
f037afb7ea Merge from p4: minor formatting nits. 2006-02-03 06:27:51 +00:00
Olivier Houchard
eeac0e83b3 Try harder not to recurse. 2006-01-27 21:07:04 +00:00
Olivier Houchard
2eff8c6814 Donc recompute the io port address if it's already the good one. 2006-01-23 14:03:14 +00:00
Olivier Houchard
0e187240e1 Build a minimal pagetables, with only section mappings, mapped write through,
to speed up the decompression.
2006-01-20 00:46:44 +00:00
Warner Losh
d5e61c97a6 By popular demand, move __HAVE_ACPI and __PCI_REROUTE_INTERRUPT into
param.h.  Per request, I've placed these just after the
_NO_NAMESPACE_POLLUTION ifndef.  I've not renamed anything yet, but
may since we don't need the __.

Submitted by: bde, jhb, scottl, many others.
2006-01-09 06:05:57 +00:00
John Baldwin
360c3c2d1a Fix various places that were testing td_critnest to see if interrupts
should remain disabled during a trap or not to check
td_md.md_spinlock_count instead.
2006-01-06 18:02:12 +00:00
Warner Losh
501755f4f6 Define __HAVE_ACPI and/or __PCI_REROUTE_INTERRUPT, as appropriate for
each platform.  These will be used in the pci code in preference to
the complicated #ifdefs we have there now.
2006-01-01 20:59:28 +00:00
Alexander Leidinger
ef39c05baa MI changes:
- provide an interface (macros) to the page coloring part of the VM system,
   this allows to try different coloring algorithms without the need to
   touch every file [1]
 - make the page queue tuning values readable: sysctl vm.stats.pagequeue
 - autotuning of the page coloring values based upon the cache size instead
   of options in the kernel config (disabling of the page coloring as a
   kernel option is still possible)

MD changes:
 - detection of the cache size: only IA32 and AMD64 (untested) contains
   cache size detection code, every other arch just comes with a dummy
   function (this results in the use of default values like it was the
   case without the autotuning of the page coloring)
 - print some more info on Intel CPU's (like we do on AMD and Transmeta
   CPU's)

Note to AMD owners (IA32 and AMD64): please run "sysctl vm.stats.pagequeue"
and report if the cache* values are zero (= bug in the cache detection code)
or not.

Based upon work by:	Chad David <davidc@acns.ab.ca> [1]
Reviewed by:		alc, arch (in 2004)
Discussed with:		alc, Chad David, arch (in 2004)
2005-12-31 14:39:20 +00:00
Maxim Sobolev
900b28f9f6 Remove kern.elf32.can_exec_dyn sysctl. Instead extend Brandinfo structure
with flags bitfield and set BI_CAN_EXEC_DYN flag for all brands that usually
allow executing elf dynamic binaries (aka shared libraries). When it is
requested to execute ET_DYN elf image check if this flag is on after we
know the elf brand allowing execution if so.

PR:		kern/87615
Submitted by:	Marcin Koziej <creep@desk.pl>
2005-12-26 21:23:57 +00:00
John Baldwin
b439e431bf Tweak how the MD code calls the fooclock() methods some. Instead of
passing a pointer to an opaque clockframe structure and requiring the
MD code to supply CLKF_FOO() macros to extract needed values out of the
opaque structure, just pass the needed values directly.  In practice this
means passing the pair (usermode, pc) to hardclock() and profclock() and
passing the boolean (usermode) to hardclock_cpu() and hardclock_process().
Other details:
- Axe clockframe and CLKF_FOO() macros on all architectures.  Basically,
  all the archs were taking a trapframe and converting it into a clockframe
  one way or another.  Now they can just extract the PC and usermode values
  directly out of the trapframe and pass it to fooclock().
- Renamed hardclock_process() to hardclock_cpu() as the latter is more
  accurate.
- On Alpha, we now run profclock() at hz (profhz == hz) rather than at
  the slower stathz.
- On Alpha, for the TurboLaser machines that don't have an 8254
  timecounter, call hardclock() directly.  This removes an extra
  conditional check from every clock interrupt on Alpha on the BSP.
  There is probably room for even further pruning here by changing Alpha
  to use the simplified timecounter we use on x86 with the lapic timer
  since we don't get interrupts from the 8254 on Alpha anyway.
- On x86, clkintr() shouldn't ever be called now unless using_lapic_timer
  is false, so add a KASSERT() to that affect and remove a condition
  to slightly optimize the non-lapic case.
- Change prototypeof  arm_handler_execute() so that it's first arg is a
  trapframe pointer rather than a void pointer for clarity.
- Use KCOUNT macro in profclock() to lookup the kernel profiling bucket.

Tested on:	alpha, amd64, arm, i386, ia64, sparc64
Reviewed by:	bde (mostly)
2005-12-22 22:16:09 +00:00
Olivier Houchard
3ff539810b Ooops, I removed the wrong bits.
This unbreak boot from a VA which is different from the PA.
2005-12-21 15:02:31 +00:00
Olivier Houchard
e279681cb5 Remove #undef DDB I shouldn't have committed. 2005-12-21 15:01:49 +00:00
Olivier Houchard
796baad9e6 - Disable the instruction cache very early, until it's time to enable it again.
- Revamp the code that jumps from physical to virtual address.
2005-12-20 01:29:17 +00:00
Olivier Houchard
fe516e3c17 Make the elf trampoline disable the MMU, and link it at physical address,
to avoid bad surprises.
2005-12-20 01:28:17 +00:00
Olivier Houchard
ac28e95795 - Better use of the busdma API.
- Use spin locks instead of sleep locks.
2005-12-09 23:55:41 +00:00
Olivier Houchard
e89ab9292f Fix a harmless bug in the way we allocate the early PTEs. 2005-12-09 23:54:50 +00:00
Olivier Houchard
527962c8c7 The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel option
to override the frequency
2005-12-09 23:52:51 +00:00
Olivier Houchard
b34658e8a9 A #define is not enough, we need to cast from u_long * to uint32_t *. 2005-12-09 22:58:07 +00:00
Olivier Houchard
858b811f34 Define atomic_whatever_long 2005-12-09 22:33:20 +00:00
Olivier Houchard
3e1e996645 In copyout(), quad-align the source buffer, and use ldrd if possible. 2005-12-09 15:31:02 +00:00
Ruslan Ermilov
224d140293 Drop _MACHINE_ARCH and _MACHINE defines (not to be confused with
MACHINE_ARCH and MACHINE).  Their purpose was to be able to test
in cpp(1), but cpp(1) only understands integer type expressions.
Using such unsupported expressions introduced a number of subtle
bugs, which were discovered by compiling with -Wundef.
2005-12-06 13:27:21 +00:00
Olivier Houchard
5b6aaee426 Try to use contigmalloc() even if M_NOWAIT has been specified. 2005-12-05 12:58:44 +00:00
Olivier Houchard
d0cd9702ef Teach the elf trampoline how to deal with gzipped kernels. 2005-12-05 12:55:46 +00:00
Ruslan Ermilov
1a581012df Add missing "struct" in i386/i386/machdep.c,v 1.497 by deischen@. 2005-11-24 08:16:18 +00:00
Olivier Houchard
ce4210d673 Use a magic number to know we were started from the elf wrapper.
Add a dummy _start function to make the non-elf version of the wrapper work.
2005-11-24 02:27:55 +00:00
Olivier Houchard
2ec9d05328 MFP4: Bring in arm9 cache-related functions
Obtained from:	NetBSD
2005-11-23 18:02:40 +00:00
Olivier Houchard
94d8cf9916 Force pmap to write-back the pte cacheline after each pte modification,
even if the pte is supposed to be cached in write through mode (might be a
skyeye bug, I'll have to check).
2005-11-21 19:10:44 +00:00
Olivier Houchard
f9126cfb8f Add an alternate ID for the arm920t (the real solution is to have
per-cpu class masks, but oh well).
2005-11-21 19:06:25 +00:00
Alan Cox
97a0c226d6 Eliminate pmap_init2(). It's no longer used. 2005-11-20 06:09:49 +00:00
Olivier Houchard
9e581686a3 There's no need to include <machine/asmacros.h> here. 2005-11-08 13:01:29 +00:00
Olivier Houchard
812779897c MFi386 rev 1.536 (sort of)
Move what can be moved (UMA zones creation, pv_entry_* initialization) from
pmap_init2() to pmap_init().
Create a new function, pmap_postinit(), called from cpu_startup(), to do the
L1 tables allocation.
pmap_init2() is now empty for arm as well.
2005-11-06 16:10:28 +00:00
Robert Watson
5bb84bc84b Normalize a significant number of kernel malloc type names:
- Prefer '_' to ' ', as it results in more easily parsed results in
  memory monitoring tools such as vmstat.

- Remove punctuation that is incompatible with using memory type names
  as file names, such as '/' characters.

- Disambiguate some collisions by adding subsystem prefixes to some
  memory types.

- Generally prefer lower case to upper case.

- If the same type is defined in multiple architecture directories,
  attempt to use the same name in additional cases.

Not all instances were caught in this change, so more work is required to
finish this conversion.  Similar changes are required for UMA zone names.
2005-10-31 15:41:29 +00:00
John Baldwin
e0f66ef861 Reorganize the interrupt handling code a bit to make a few things cleaner
and increase flexibility to allow various different approaches to be tried
in the future.
- Split struct ithd up into two pieces.  struct intr_event holds the list
  of interrupt handlers associated with interrupt sources.
  struct intr_thread contains the data relative to an interrupt thread.
  Currently we still provide a 1:1 relationship of events to threads
  with the exception that events only have an associated thread if there
  is at least one threaded interrupt handler attached to the event.  This
  means that on x86 we no longer have 4 bazillion interrupt threads with
  no handlers.  It also means that interrupt events with only INTR_FAST
  handlers no longer have an associated thread either.
- Renamed struct intrhand to struct intr_handler to follow the struct
  intr_foo naming convention.  This did require renaming the powerpc
  MD struct intr_handler to struct ppc_intr_handler.
- INTR_FAST no longer implies INTR_EXCL on all architectures except for
  powerpc.  This means that multiple INTR_FAST handlers can attach to the
  same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
  to the same interrupt.  Sharing INTR_FAST handlers may not always be
  desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
  either.  Drivers can always still use INTR_EXCL to ask for an interrupt
  exclusively.  The way this sharing works is that when an interrupt
  comes in, all the INTR_FAST handlers are executed first, and if any
  threaded handlers exist, the interrupt thread is scheduled afterwards.
  This type of layout also makes it possible to investigate using interrupt
  filters ala OS X where the filter determines whether or not its companion
  threaded handler should run.
- Aside from the INTR_FAST changes above, the impact on MD interrupt code
  is mostly just 's/ithread/intr_event/'.
- A new MI ddb command 'show intrs' walks the list of interrupt events
  dumping their state.  It also has a '/v' verbose switch which dumps
  info about all of the handlers attached to each event.
- We currently don't destroy an interrupt thread when the last threaded
  handler is removed because it would suck for things like ppbus(8)'s
  braindead behavior.  The code is present, though, it is just under
  #if 0 for now.
- Move the code to actually execute the threaded handlers for an interrrupt
  event into a separate function so that ithread_loop() becomes more
  readable.  Previously this code was all in the middle of ithread_loop()
  and indented halfway across the screen.
- Made struct intr_thread private to kern_intr.c and replaced td_ithd
  with a thread private flag TDP_ITHREAD.
- In statclock, check curthread against idlethread directly rather than
  curthread's proc against idlethread's proc. (Not really related to intr
  changes)

Tested on:	alpha, amd64, i386, sparc64
Tested on:	arm, ia64 (older version of patch by cognet and marcel)
2005-10-25 19:48:48 +00:00
Olivier Houchard
4bc6c6dc6c Unbreak for !__XSCALE__. 2005-10-23 23:09:14 +00:00
Olivier Houchard
b1e157f0e6 Cleanup. 2005-10-20 20:30:51 +00:00
Olivier Houchard
3de553a473 Use the clock count register as a timecounter, as it's more accurate. 2005-10-17 14:51:01 +00:00
John Baldwin
21aa010bb5 Whitespace. 2005-10-14 18:36:49 +00:00
John Baldwin
43e2ef2bb6 Change the userland atomic operations on arm to use memory operands for
the modified memory rather than using register operands that held a pointer
to the memory.  The biggest effect is that we now correctly tell the
compiler that these functions change the memory that these functions
modify.

Reviewed by:	cognet
2005-10-14 18:07:45 +00:00
David Xu
9104847f21 1. Change prototype of trapsignal and sendsig to use ksiginfo_t *, most
changes in MD code are trivial, before this change, trapsignal and
   sendsig use discrete parameters, now they uses member fields of
   ksiginfo_t structure. For sendsig, this change allows us to pass
   POSIX realtime signal value to user code.

2. Remove cpu_thread_siginfo, it is no longer needed because we now always
   generate ksiginfo_t data and feed it to libpthread.

3. Add p_sigqueue to proc structure to hold shared signals which were
   blocked by all threads in the proc.

4. Add td_sigqueue to thread structure to hold all signals delivered to
   thread.

5. i386 and amd64 now return POSIX standard si_code, other arches will
   be fixed.

6. In this sigqueue implementation, pending signal set is kept as before,
   an extra siginfo list holds additional siginfo_t data for signals.
   kernel code uses psignal() still behavior as before, it won't be failed
   even under memory pressure, only exception is when deleting a signal,
   we should call sigqueue_delete to remove signal from sigqueue but
   not SIGDELSET. Current there is no kernel code will deliver a signal
   with additional data, so kernel should be as stable as before,
   a ksiginfo can carry more information, for example, allow signal to
   be delivered but throw away siginfo data if memory is not enough.
   SIGKILL and SIGSTOP have fast path in sigqueue_add, because they can
   not be caught or masked.
   The sigqueue() syscall allows user code to queue a signal to target
   process, if resource is unavailable, EAGAIN will be returned as
   specification said.
   Just before thread exits, signal queue memory will be freed by
   sigqueue_flush.
   Current, all signals are allowed to be queued, not only realtime signals.

Earlier patch reviewed by: jhb, deischen
Tested on: i386, amd64
2005-10-14 12:43:47 +00:00
Olivier Houchard
2dfc7d008b Export PAGE_SIZE from genassym.c, and include assym.s in bcopy_page.S,
instead of <machine/param.h>.
2005-10-06 11:26:37 +00:00
Olivier Houchard
4d71248bc3 Remove a never reached RET. 2005-10-04 20:47:27 +00:00
Olivier Houchard
7bfacf3dc6 strd needs the destination to be double-word aligned, but the pointer passed
to savectx isn't always, so always use stmia, savectx isn't called enough
to need that kind of optimization.
2005-10-04 20:42:42 +00:00
Olivier Houchard
db7db23dd8 dump_avail has nothing to do with ARM_USE_SMALL_ALLOC, so move its
declaration out of the #ifdef.
2005-10-04 16:29:31 +00:00
Olivier Houchard
6270a55ec3 Remove duplicate entry for DDB. 2005-10-04 14:39:33 +00:00
Olivier Houchard
7c616799dc Fix build when DDB isn't defined. 2005-10-04 14:37:03 +00:00
Olivier Houchard
70359cf526 Bring in the good version of this file. 2005-10-03 22:44:54 +00:00
Olivier Houchard
31fbb5019f Add dma and aau. 2005-10-03 14:20:44 +00:00
Olivier Houchard
50f31d87f2 Import dummy drivers for the i80321 DMA controller and AAU.
The DMA controller driver only knows how to do memory to memory copies, and
the AAU driver how to zero a chunk of memory.
Use them to process big (>=1KB) copying/zeroing.
2005-10-03 14:19:55 +00:00
Olivier Houchard
9ea7c8bb52 Make mem.c know about the pages allocated with ARM_USE_SMALL_ALLOC. 2005-10-03 14:18:21 +00:00
Olivier Houchard
735a72bbee Export the variables needed for the copy/zero API. 2005-10-03 14:17:45 +00:00
Olivier Houchard
edcbfd05d1 Make sure the interrupt is masked before processing it, or bad things
can happen.
2005-10-03 14:17:16 +00:00
Olivier Houchard
1f59105ee7 If a thread already tries to allocate a new memory range, wait for it
instead of trying to do the same.
2005-10-03 14:16:41 +00:00
Olivier Houchard
b834efd591 Provide a dump_avail[] variable, which contains the page ranges to be
dumped.

For iq31244_machdep.c, attempt to recognize hints provided by the elf
trampoline.
2005-10-03 14:15:50 +00:00
Olivier Houchard
92399cb788 - Provide the kernel l1pt physical address, for userland.
- Use the new API for pmap_copy_page() and pmap_zero_page().
- Just write-back the pages in pmap_qenter(), and invalidate it in
pmap_qremove().
- Nuke the cache flushing in pmap_enter_quick(), it's not needed anymore.
2005-10-03 14:13:50 +00:00
Olivier Houchard
0122bd1470 Add a new API to let platform-specific ports provide functions for big
copy/zeroing.
2005-10-03 14:12:10 +00:00
Olivier Houchard
87351d5fd2 Export the virtual and physical address in which the kernel was loaded,
needed for userland when reading kernel dumps.
2005-10-03 14:10:55 +00:00
Olivier Houchard
b91c6ffecb Import a small ELF trampoline, in which the kernel is embedded, and that
is able to load the kernel into memory, symbol table included. This is
needed to be able to access the symbol table from DDB without a boot
loader.
2005-10-03 14:09:36 +00:00
Olivier Houchard
ffbce9965f *blush*
Don't try to dereference map if it's NULL.
While I'm there, increase the minimum value to write-back/invalidate the
whole dcache in bus_dmamap_sync().
2005-10-03 14:07:57 +00:00
Olivier Houchard
31c197a753 Only save the registers that are used. 2005-10-03 14:07:09 +00:00
Olivier Houchard
93d18f4760 asm versions of in_cksum_hdr() and in_pseudo(). 2005-10-03 14:06:44 +00:00
Olivier Houchard
6d918e02d0 Implement savectx().
Obtained from:	NetBSD
2005-10-03 14:05:38 +00:00
Olivier Houchard
f7a1a1e2e5 Kernel dump for arm, ripped from the ia64/amd64 version. 2005-10-03 14:05:03 +00:00
John Baldwin
3c2bc2bf26 Add a new atomic_fetchadd() primitive that atomically adds a value to a
variable and returns the previous value of the variable.

Tested on:	i386, alpha, sparc64, arm (cognet)
Reviewed by:	arch@
Submitted by:	cognet (arm)
MFC after:	1 week
2005-09-27 17:39:11 +00:00
Olivier Houchard
0cc67e3dd6 Fix multiple abuses of __RMAN_RESOURCE_VISIBLE in the arm code.
Spotted out by:	phk
2005-09-25 21:06:50 +00:00
Marcel Moolenaar
216e80c2ba Move the prototypes of db_md_set_watchpoint(), db_md_clr_watchpoint()
and db_md_list_watchpoints() to ddb/ddb.h.
2005-09-10 03:01:25 +00:00
Alan Cox
ba8bca610c Pass a value of type vm_prot_t to pmap_enter_quick() so that it determine
whether the mapping should permit execute access.
2005-09-03 18:20:20 +00:00
Stefan Farfeleder
a1f85d7f83 Move MINSIGSTKSZ from <machine/signal.h> to <machine/_limits.h> and rename
it to __MINSIGSTKSZ.  Define MINSIGSTKSZ in <sys/signal.h>.

This is done in order to use MINSIGSTKSZ for the macro PTHREAD_STACK_MIN
in <pthread.h> (soon <limits.h>) without having to include the whole
<sys/signal.h> header.

Discussed with:		bde
2005-08-20 16:44:41 +00:00
Jeff Roberson
8d511e2a05 - Add support for saving stack traces and displaying them via printf(9)
and KTR.

Contributed by:		Antoine Brodin <antoine.brodin@laposte.net>
Concept code from:	Neal Fachan <neal@isilon.com>
2005-08-03 04:27:40 +00:00
Warner Losh
95e4208ebf msdosfs_conv.c references cmos_wall_clock and adjkerntz. Since these
are 0 for arm, define them as such to make msdosfs_conv.c compile
again on arm.
2005-07-27 21:19:28 +00:00
John Baldwin
d9610574a2 Add extra constraints to tell the compiler that the memory be modified
in the arm __swp() and sparc64 casa() and casax() functions is actually
being used as an input and output and not just the value of the register
that points to the memory location.  This was the underlying source of
the mbuf refcount problems on sparc64 a while back.  For arm this should be
a nop because __swp() has a constraint to clobber all memory which can
probably be removed now.

Reviewed by:	alc, cognet
MFC after:	1 week
2005-07-27 20:01:45 +00:00
John Baldwin
e11fe02dfb Use a + constraint modifier for a register arg in __bswap16_var().
Reviewed by:	cognet
2005-07-27 19:59:21 +00:00
John Baldwin
122eceef61 Convert the atomic_ptr() operations over to operating on uintptr_t
variables rather than void * variables.  This makes it easier and simpler
to get asm constraints and volatile keywords correct.

MFC after:	3 days
Tested on:	i386, alpha, sparc64
Compiled on:	ia64, powerpc, amd64
Kernel toolchain busted on:	arm
2005-07-15 18:17:59 +00:00
David Xu
740fd64d65 Validate if the value written into {FS,GS}.base is a canonical
address, writting non-canonical address can cause kernel a panic,
by restricting base values to 0..VM_MAXUSER_ADDRESS, ensuring
only canonical values get written to the registers.

Reviewed by: peter, Josepha Koshy < joseph.koshy at gmail dot com >
Approved by: re (scottl)
2005-07-10 23:31:11 +00:00
Olivier Houchard
758c41b8cc - Use a TAILQ instead of parsing the array to find a free dmamap.
- Inline busdma_alloc_dmamap, busdma_free_dmamap and bus_dmamap_sync_buf.

Approved by:	re (blanket)
2005-06-24 23:57:27 +00:00
John Baldwin
dc802c0628 Fix a typo.
Approved by:	re (scottl)
2005-06-23 21:54:17 +00:00
Olivier Houchard
3ed670fe01 Remove the va == pa mapping.
Approved by:	re (blanket)
2005-06-23 11:40:45 +00:00
Olivier Houchard
00b931ab2f Call kdb_trap() on fatal abort.
Approved by:	re (blanket)
2005-06-23 11:39:18 +00:00
Olivier Houchard
31897fe80e Implement db_frame() and use it to obtain the registers value.
Approved by:	re (blanket)
2005-06-23 11:38:47 +00:00
Olivier Houchard
a95e819956 Don't abuse UMA_SLAB_KMEM.
Approved by:	re (blanket)
2005-06-23 11:37:41 +00:00
David E. O'Brien
c3e0dfa1f8 Add .cvsignore files just like in sys/<arch>/compiled, this keeps CVS from
questing kernel config files not in CVS.

Approved by:	re(kensmith)
2005-06-20 16:52:59 +00:00
Olivier Houchard
acc48b2a89 Try harder to detect if the allocated memory for L2 PTP comes from a 1MB
section or not.

Approved by:	re (blanket)
2005-06-16 13:23:39 +00:00
Olivier Houchard
a56da6d0d2 Don't pass the kernel_pmap to pmap_fault_fixup() if the fault comes from
kernel mode, always use the curthread pmap instead. There are valid cases
were we can fault on a user address from the kernel without pcb_onfault
being set.

Approved by:	re (blanket)
2005-06-16 13:21:52 +00:00
Olivier Houchard
8f47151b3b Remove the last use of pmap_initialized. 2005-06-10 13:31:30 +00:00
Alan Cox
1c245ae7d1 Introduce a procedure, pmap_page_init(), that initializes the
vm_page's machine-dependent fields.  Use this function in
vm_pageq_add_new_page() so that the vm_page's machine-dependent and
machine-independent fields are initialized at the same time.

Remove code from pmap_init() for initializing the vm_page's
machine-dependent fields.

Remove stale comments from pmap_init().

Eliminate the Boolean variable pmap_initialized from the alpha, amd64,
i386, and ia64 pmap implementations.  Its use is no longer required
because of the above changes and earlier changes that result in physical
memory that is being mapped at initialization time being mapped without
pv entries.

Tested by: cognet, kensmith, marcel
2005-06-10 03:33:36 +00:00
Joseph Koshy
f263522a45 MFP4:
- Implement sampling modes and logging support in hwpmc(4).

- Separate MI and MD parts of hwpmc(4) and allow sharing of
  PMC implementations across different architectures.
  Add support for P4 (EMT64) style PMCs to the amd64 code.

- New pmcstat(8) options: -E (exit time counts) -W (counts
  every context switch), -R (print log file).

- pmc(3) API changes, improve our ability to keep ABI compatibility
  in the future.  Add more 'alias' names for commonly used events.

- bug fixes & documentation.
2005-06-09 19:45:09 +00:00
Olivier Houchard
7fde88ae25 Use tabs, not spaces.
Reported by:	ru
2005-06-09 15:05:09 +00:00
Olivier Houchard
d9948bbcbf Add ata stuff. 2005-06-09 12:32:15 +00:00
Olivier Houchard
f60e923b23 - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32
interrupts.
- Implement teardown methods where appropriate.
2005-06-09 12:26:20 +00:00
Olivier Houchard
56e472e2b5 Add a new arm-specific option, ARM_USE_SMALL_ALLOC. If defined, it provides
an implementation of uma_small_alloc() which tries to preallocate memory
1MB per 1MB, and maps it into a section mapping.
2005-06-07 23:04:24 +00:00
Olivier Houchard
094df9739b Bring in bits I forgot while importing write back support for arm9. 2005-06-03 19:49:53 +00:00
Olivier Houchard
c8a2d8f19c Remove a useless printf. 2005-06-03 15:15:26 +00:00
Marcel Moolenaar
470cd51ee6 Create nexus in configure_first() instead of in configure(). This
makes sure that sysinit tasks that run after configure_first(),
but before configure() have a nexus to hang devices off.
2005-05-29 23:44:22 +00:00
Marcel Moolenaar
e085487fe8 Call cninit_finish() and set cold to 0 in configure_final() instead
of in configure(). Call cninit_finish() before setting cold to 0.
This is how it's done for other platforms. Be alike to avoid problems.
2005-05-29 22:45:36 +00:00
Yoshihiro Takahashi
d4fcf3cba5 Remove bus_{mem,p}io.h and related code for a micro-optimization on i386
and amd64.  The optimization is a trivial on recent machines.

Reviewed by:	-arch (imp, marcel, dfr)
2005-05-29 04:42:30 +00:00
Olivier Houchard
2e2955f6f6 Remove pmap_deactivate(), we do not use it. 2005-05-27 00:45:39 +00:00
Olivier Houchard
e59bc6b04e s/_KLD_MODULE/KLD_MODULE/ 2005-05-26 16:05:22 +00:00
Olivier Houchard
c6ec1ba390 Don't enable interrupts in the dispatcher, there's no need to do so. 2005-05-26 15:02:47 +00:00
Olivier Houchard
9aeb6688ad Don't call vm_page_dirty() in pmap_nuke_pv(), it's not the place to do so, and
it leads to funny things, such as pmap_remove_all() marking the page as dirty.
2005-05-26 15:01:13 +00:00
Olivier Houchard
08a94fbcf9 Remove bits specific to CPUs we won't support (< armv4). 2005-05-25 13:46:32 +00:00
Olivier Houchard
a0e94dd924 Increase the refresh rate. 2005-05-25 13:44:55 +00:00
Olivier Houchard
5b45c9f2a1 MFp4: Setup arm9 to write back by default.
Obtained from:	NetBSD
2005-05-24 23:57:22 +00:00
Olivier Houchard
ef6f667f2e Remove kcopy(), we don't use it. 2005-05-24 23:55:09 +00:00
Olivier Houchard
ad0557149f We need to decrease p->p_lock after vm_fault() has been called. 2005-05-24 23:06:02 +00:00
Olivier Houchard
47b3d09bb0 Correctly setup the UND stack in cpu_set_upcall(), and the trapframe in
cpu_thread_setup(), as done in cpu_fork().
2005-05-24 23:05:26 +00:00
Olivier Houchard
15ba408fd7 - Try to avoid calling malloc() in bus_dmamap_create() and bus_dmamem_alloc()
for the dmamap by using static dmamaps.
- Don't do anything for BUS_DMASYNC_PREREAD and BUS_DMASYNC_POSTWRITE in
bus_dmamap_sync(), it's not needed anymore.
2005-05-24 22:10:35 +00:00
Olivier Houchard
f1f49518d4 Write back affected pages in pmap_qremove() as well. This removes the need
to change the DACR when switching to a kernel thread, thus making
userland thread => kernel thread => same userland thread switch cheaper by
totally avoiding data cache and TLB invalidation.
2005-05-24 21:47:10 +00:00
Olivier Houchard
04e48248ca Use a more sane value for HZ. 2005-05-24 21:45:26 +00:00
Olivier Houchard
0f18d3256d Use asm versions of in_cksum() and friends. 2005-05-24 21:44:34 +00:00
Olivier Houchard
fdc05f7913 Asm version of bswap16().
Obtained from: 	NetBSD
2005-05-24 21:43:16 +00:00
Olivier Houchard
fa7e20fdd4 Make sure we clean the RAS start address once we're done.
This fixes the random segfaults which occurs at high interrupts rate.
2005-05-24 21:42:31 +00:00
Olivier Houchard
e85d3fc3c8 Don't forget to copy the TP when forking, or bad things will happen to the
child process if it tries to use threads.
2005-05-11 21:20:42 +00:00
Olivier Houchard
a74efe926c Allocating the memory for the kernel stack one time is enough. 2005-04-27 13:29:54 +00:00
Olivier Houchard
42722183bf Don't use fusufault in casuptr(), as it assumes the current PCB will be
stored in r2, which can't be easily done with casuptr(). Introduce
casuptrfault instead.
2005-04-23 16:45:04 +00:00
David Xu
21fc316430 Change cpu_set_kse_upcall to more generic style, so we can reuse it
in other codes. Add cpu_set_user_tls, use it to tweak user register
and setup user TLS. I ever wanted to merge it into cpu_set_kse_upcall,
but since cpu_set_kse_upcall is also used by M:N threads which may
not need this feature, so I wrote a separated cpu_set_user_tls.
2005-04-23 02:32:32 +00:00
Marcel Moolenaar
ff7125a623 Add empty header (except of the multiple-inclusion protection) to
get hwpmc(4) to compile on this platform.
2005-04-20 18:44:53 +00:00
Warner Losh
06db52b609 Break out the definition of bus_space_{tag,handle}_t and a few other types
into _bus.h to help with name space polution from including all of bus.h.
In a few days, I'll commit changes to the MI code to take advantage of thse
sepration (after I've made sure that these changes don't break anything in
the main tree, I've tested in my trees, but you never know...).

Suggested by: bde (in 2002 or 2003 I think)
Reviewed in principle by: jhb
2005-04-18 21:45:34 +00:00
Olivier Houchard
758e4f6878 Unbreak the vector_page == 0x00000000 case. Map the vector page L1PT into the
kernel domain for each pmap, as we don't update the page table when we're
switching to a kernel thread, but we do however update the DACR.
2005-04-14 14:32:32 +00:00
Olivier Houchard
f5c4c316eb pmap_update() is gone. 2005-04-13 16:02:03 +00:00
John Baldwin
aa9aa68d2f Use PCPU_LAZY_INC() for cnt.v_{intr,trap,syscalls} rather than atomic
operations in some places and simple non-per CPU math in others.
2005-04-12 23:18:54 +00:00
Olivier Houchard
ec2b39b483 We have an asm version of bcmp(), so we could use it as well. 2005-04-12 22:46:09 +00:00
Olivier Houchard
ebc58b7dbc Don't announce the range SDRAM_START-freemempos until I figure out what's
going on, it produces random memory corruption.
2005-04-07 22:04:18 +00:00
Olivier Houchard
d4d0079826 pmap_update() is gone. 2005-04-07 22:03:34 +00:00
Olivier Houchard
2d93998b00 Import a basic implementation of the restartable atomic sequences to provide
atomic operations to userland (this is OK for UP only, but SMP is still so
far away).
2005-04-07 22:03:04 +00:00
Olivier Houchard
139e3f7c33 - Try harder to report dirty page.
- Garbage-collect pmap_update(), it became quite useless.
2005-04-07 22:01:53 +00:00
John Baldwin
c6a37e8413 Divorce critical sections from spinlocks. Critical sections as denoted by
critical_enter() and critical_exit() are now solely a mechanism for
deferring kernel preemptions.  They no longer have any affect on
interrupts.  This means that standalone critical sections are now very
cheap as they are simply unlocked integer increments and decrements for the
common case.

Spin mutexes now use a separate KPI implemented in MD code: spinlock_enter()
and spinlock_exit().  This KPI is responsible for providing whatever MD
guarantees are needed to ensure that a thread holding a spin lock won't
be preempted by any other code that will try to lock the same lock.  For
now all archs continue to block interrupts in a "spinlock section" as they
did formerly in all critical sections.  Note that I've also taken this
opportunity to push a few things into MD code rather than MI.  For example,
critical_fork_exit() no longer exists.  Instead, MD code ensures that new
threads have the correct state when they are created.  Also, we no longer
try to fixup the idlethreads for APs in MI code.  Instead, each arch sets
the initial curthread and adjusts the state of the idle thread it borrows
in order to perform the initial context switch.

This change is largely a big NOP, but the cleaner separation it provides
will allow for more efficient alternative locking schemes in other parts
of the kernel (bare critical sections rather than per-CPU spin mutexes
for per-CPU data for example).

Reviewed by:	grehan, cognet, arch@, others
Tested on:	i386, alpha, sparc64, powerpc, arm, possibly more
2005-04-04 21:53:56 +00:00
Olivier Houchard
7fc53c7b12 Bring in a version of float.h more correct for softfloat. 2005-03-20 00:34:24 +00:00
Olivier Houchard
3ea9d07445 Bring back some of the cleanups and fixes jmg did in the TS7200 port. 2005-03-17 23:01:15 +00:00
Olivier Houchard
4290208c24 Use PCIR_BARS instead of PCIR_MAPS. 2005-03-17 00:43:57 +00:00
Olivier Houchard
2eeafe13a6 Introduce a new function, pmap_wb_page(), which check all userland mappings for
a given page and, if the pmap is the current pmap, write back the associated
cache line.
Use pmap_wb_page in pmap_qenter() instead of inconditionally
write back/invalidating the data cache.
2005-03-16 23:56:29 +00:00
John-Mark Gurney
98c8f18cf0 MFp4: add in making fiq's work by coping to the correct page incase we have
the vectors relocated high..
2005-03-16 07:56:21 +00:00
John-Mark Gurney
c28a40615d fix up white space, I had a simple comment fix, but I might as well do the
rest while I'm here...
2005-03-16 07:53:02 +00:00
John-Mark Gurney
de71467ca7 make bus_dmamem_alloc always allocate a new map like we are suppose to..
This was found when I tried to run the usb code on my arm board...

Approved by:	cognet
2005-03-16 00:35:59 +00:00
John-Mark Gurney
19015c15ed fix arm wrt to busdma...
also wrap the two macros that have bare if's w/ do {} while(0) so that
my epe driver doesn't get a warning about braces around confused else...
2005-03-15 14:57:30 +00:00
Scott Long
5974e5c71c Refactor the bus_dma header files so that the interface is described in
sys/bus_dma.h instead of being copied in every single arch.  This slightly
reorders a flag that was specific to AXP and thus changes the ABI there.
The interface still relies on bus_space definitions found in <machine/bus.h>
so it cannot be included on its own yet, but that will be fixed at a later
date.  Add an MD <machine/bus_dma.h> for ever arch for consistency and to
allow for future MD augmentation of the API.  sparc64 makes heavy use of
this right now due to its different bus_dma implemenation.
2005-03-14 16:46:28 +00:00
Maxime Henrion
68d9d1e64e Fixup KTR traces. 2005-03-08 14:49:05 +00:00
Maxime Henrion
5d18cf7825 Use __func__ in the KTR_BUSDMA traces. This avoids copy and paste
errors like in the bus_dmamap_load_mbuf_sg() case where we were wrongly
displaying the function name as bus_dmamap_load_mbuf.
2005-03-08 11:18:14 +00:00
Maxime Henrion
cebf474d0d Fix typo. 2005-03-07 00:24:52 +00:00
Olivier Houchard
7a7e7cf91e Use [ldr|str]t instead of [ldr|str] when accessing ARM_TP_ADDRESS. 2005-03-06 21:12:03 +00:00
Olivier Houchard
da53588551 Make sure ARM_TP_ADDRESS is accessible right now by calling pmap_fault_fixup,
as we can't rely on a trap happening, as it is done normally.
While I'm there, uncomment the call to cpu_dcache_wbinv_range() in
pmap_kenter_internal, as we don't call cpu_dcache_wbinv_all() there anymore.
2005-03-06 21:10:31 +00:00
Olivier Houchard
2ba823e954 Unlike NetBSD's bcopy(), our bcopy allows the two strings to overlap, even in
kernel. So bring in the userland version, instead of just calling memcpy.
2005-03-06 13:11:32 +00:00
Olivier Houchard
f18b179cc9 Handle endianness correctly.
Spotted out by:	jmg
2005-03-03 23:27:09 +00:00
Joerg Wunsch
a5f50ef9e4 netchild's mega-patch to isolate compiler dependencies into a central
place.

This moves the dependency on GCC's and other compiler's features into
the central sys/cdefs.h file, while the individual source files can
then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to
refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42.

By now, GCC and ICC (the Intel compiler) have been actively tested on
IA32 platforms by netchild.  Extension to other compilers is supposed
to be possible, of course.

Submitted by:	netchild
Reviewed by:	various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
Olivier Houchard
35e75c686f In cpu_throw(), correctly calculate td->td_md.md_tp.
In cpu_switch(), set the DACR even if we're switching to a kernel thread.
2005-03-01 20:51:37 +00:00
Olivier Houchard
c598a8a25c Introduce realmem. 2005-03-01 20:12:52 +00:00
Olivier Houchard
f4c01f1508 Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.

Suggested by:   davidxu
2005-02-26 18:59:01 +00:00
Olivier Houchard
b6e4194946 Add the field in the md part of the struct thread required by ARM_[GET|SET]_TP. 2005-02-26 00:02:14 +00:00
Olivier Houchard
a74985cdd4 Implement two new sysarch for arm, ARM_GET_TP and ARM_SET_TP, to work around
the lack of tls on arm.
2005-02-25 22:56:16 +00:00
Olivier Houchard
38e285f83a Make sure casuptr() reset pcb->pcb_onfault when returning. 2005-02-25 22:54:56 +00:00
Olivier Houchard
6d4b3b4cb5 MFp4: get the code that set the pc correctly to work, remove a few IQ31244
specific mappings from locore.S, re-organize iq31244_machdep.c to work with
the new locore.S

Spotted out by:	jmg
2005-02-20 21:34:59 +00:00
Olivier Houchard
2f5f750d3c Removing the #endif as well sounds like a good idea. 2005-02-20 01:26:01 +00:00
Olivier Houchard
8c06401dab In cpufunc_control, uncomment the code responsible for returning the old
state of the control register.
2005-02-20 01:24:46 +00:00
Ruslan Ermilov
3971d2cf5e Use a common multi-inclusion protection, and add such a
protection to alpha/include/exec.h.
2005-02-19 21:16:48 +00:00
Olivier Houchard
1a34245881 Support high vectors for arm9.
Obtained from:	NetBSD
2005-02-18 17:29:12 +00:00
Olivier Houchard
31d0686d2d Define NIRQ to 64 for CPU_ARM9, because Cirrus Logic EP93XX cores provides
64 irqs.
This should be re-thought later.
2005-02-13 18:26:31 +00:00
Olivier Houchard
014ef5788e Remove unused prototype. 2005-02-13 18:20:39 +00:00
Olivier Houchard
b4274227d1 Remove redondant includes. 2005-02-13 18:05:36 +00:00
Olivier Houchard
52bd27f431 Don't prototype pmap_kenter(). 2005-02-13 17:18:20 +00:00
John-Mark Gurney
9c21341304 move pmap.h after vm.h include... some of the headers from pmap.h depend
upon vm.h
2005-02-09 00:10:17 +00:00
Nate Lawson
3888a87205 Finish the job of sorting all includes and fix the build by including
malloc.h before proc.h on sparc64.  Noticed by das@

Compiled on:	alpha, amd64, i386, pc98, sparc64
2005-02-06 01:55:08 +00:00