Commit Graph

20610 Commits

Author SHA1 Message Date
Alan Cox
28a50a192f Push down the acquisition of the page queues lock into vm_page_unwire(). 2010-05-05 07:40:54 +00:00
Alan Cox
e3ef0d2fcf Push down the acquisition of the page queues lock into vm_page_unwire().
Update the comment describing which lock should be held on entry to
vm_page_wire().

Reviewed by:	kib
2010-05-05 03:45:46 +00:00
Navdeep Parhar
d6da836201 Add support for hardware filters to cxgb(4). The T3 chip can inspect
L2/3/4 headers and can drop or steer packets as instructed.  Filtering
based on src ip, dst ip, src port, dst port, 802.1q, udp/tcp, and mac
addr is possible.  Add support in cxgbtool to program these filters.
Some simple examples:

Drop all tcp/80 traffic coming from the subnet specified.
# cxgbtool cxgb2 filter 0 sip 192.168.1.0/24 dport 80 type tcp action drop

Steer all incoming UDP traffic to qset 0.
# cxgbtool cxgb2 filter 1 type udp queue 0 action pass

Steer all tcp traffic from 192.168.1.1 to qset 1.
# cxgbtool cxgb2 filter 2 sip 192.168.1.1 type tcp queue 1 action pass

Drop fragments.
# cxgbtool cxgb2 filter 3 type frag action drop

List all filters.
# cxgbtool cxgb2 filter list
index         SIP                DIP     sport dport VLAN PRI P/MAC type Q
    0     192.168.1.0/24         0.0.0.0     *    80    0 0/1 */*    tcp -
    1         0.0.0.0/0          0.0.0.0     *     *    0 0/1 */*    udp 0
    2     192.168.1.1/32         0.0.0.0     *     *    0 0/1 */*    tcp 1
    3         0.0.0.0/0          0.0.0.0     *     *    0 0/1 */*   frag -
16367         0.0.0.0/0          0.0.0.0     *     *    0 0/1 */*      * *

MFC after:	2 weeks
2010-05-05 00:41:40 +00:00
Navdeep Parhar
2caefebb07 Add IFCAP_LINKSTATE to cxgb's capabilities.
MFC after:	3 days
2010-05-04 23:55:08 +00:00
Pyun YongHyeon
3edfecaa37 When VLAN hardware tagging is disabled, make sure to disable VLAN
checksum offloading as well as TSO over VLAN.

Reported by:	jhb
2010-05-04 22:24:19 +00:00
Pyun YongHyeon
f648f6bb0c Free entire mbuf chain instead of the first mbuf. 2010-05-04 21:23:59 +00:00
Pyun YongHyeon
55c978ba9d Enable multi-descriptor transmisstion for fragmented mbufs. There
is no more need to defragment mbufs. After transmitting the
multi-fragmented frame, the controller updates only the first
descriptor of multi-descriptor transmission so it's driver's
responsibility to clear OWN bits of remaining descriptor of
multi-descriptor transmission. It seems the controller behaves much
like jme(4) controllers in descriptor handling.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-05-04 19:04:51 +00:00
Pyun YongHyeon
7135e11ef9 Remove clearing RxHashTable2 register. The register is reprogrammed
in sge_rxfilter().
2010-05-04 17:34:00 +00:00
Pyun YongHyeon
31fefd0d5d Make sure to check whether driver is running before processing
received frames. Also check driver has valid ifp pointer before
calling msk_stop() in device_shutdown handler. While I'm here
remove unnecessary accesses to interrupt mask registers in
device_shutdown handler because driver puts the controller into
reset state.
With these changes, msk(4) now survive from heavy RX traffic(1byte
UDP frame) while reboot is in progress.

Reported by:	Mark Atkinson < atkin901 <> gmail dot com >
2010-05-04 17:12:36 +00:00
Pyun YongHyeon
3d763c3133 Drop driver lock before exiting from interrupt handler.
Submitted by:	jhb
MFC after:	3 days
2010-05-04 17:02:34 +00:00
Jung-uk Kim
c909aebcbb - Remove more dead code[1]. Since r207330, we only need to check division
by zero of the second argument 'from'.
- Prefer u_int32_t over unsigned int to make its intention more clearer.
- Move the function to a header file and make it a static inline function.

Pointed out by:	Andrew Reilly (areilly at bigpond dot net dot au)[1]
MFC after:	3 days
2010-05-04 16:56:59 +00:00
Alan Cox
a7283d3213 Add page locking to the vm_page_cow* functions.
Push down the acquisition and release of the page queues lock into
vm_page_wire().

Reviewed by:	kib
2010-05-04 15:55:41 +00:00
Marius Strobl
917825acb9 - Don't set CAS_PCS_DATAPATH to anything except CAS_PCS_DATAPATH_SERDES
on Cassini using the external PCS SERDES otherwise unaligned access
  traps and other strange effects happen with some machines. Don't touch
  the MIF which is unused in that case either. These changes require the
  PHY type to use to be determined via the OFW device tree or from the
  VPD in machines without the former.
- Disable the SERDES pins of Saturn when not used in order to save power
  and ensure they are enabled otherwise.
- In cas_attach() use the correct register offset for CAS_PCS_CONF_EN.
- Add some bus space barriers missing in the PCS code path.

These changes make the Sun GigaSwift Ethernet 1.0 MMF cards as well as
the on-board interfaces found in Sun Fire B100s Blade Server work.

PR:	144867
2010-05-03 20:57:16 +00:00
Konstantin Belousov
fc0c3802f0 Lock the page around vm_page_activate() and vm_page_deactivate() calls
where it was missed. The wrapped fragments now protect wire_count with
page lock.

Reviewed by:	alc
2010-05-03 20:31:13 +00:00
Marius Strobl
17bc427d0b On sparc64 obtain the initiator ID from the Open Firmware device tree
in order to match what the PROM built-in driver uses.

Approved by:	mjacob
2010-05-03 18:39:40 +00:00
Alan Cox
5fdd0a335f Acquire the page lock around vm_page_unwire(). For consistency, extend the
scope of the object lock in agp_i810.c.  (In this specific case, the scope
of the object lock shouldn't matter, but I don't want to create a bad
example that might be copied to a case where it did matter.)

Reviewed by:	kib
2010-05-03 16:55:50 +00:00
Alan Cox
492d01762f Neither the page lock nor the page queues lock is required to unwire and
free a VM_ALLOC_NOOBJ page.  (Such pages are unmanaged.)
2010-05-03 15:51:59 +00:00
Maxim Sobolev
e50d35e6c6 Add new tunable 'net.link.ifqmaxlen' to set default send interface
queue length. The default value for this parameter is 50, which is
quite low for many of today's uses and the only way to modify this
parameter right now is to edit if_var.h file. Also add read-only
sysctl with the same name, so that it's possible to retrieve the
current value.

MFC after:	1 month
2010-05-03 07:32:50 +00:00
Pyun YongHyeon
464aa6d5fb Fix wrong dma tag usage. Previously it used TX descriptor ring dma
tag which should be TX mbuf dma tag.

Reported by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-05-03 00:56:26 +00:00
Matt Jacob
5eb6cd0263 Print IR_RESYNC updates informatively.
Obtained from:	pluknet
MFC after:	1 week
2010-05-02 22:48:27 +00:00
Alexander Motin
dd48af360f Import mvs(4) - Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA controllers
driver for CAM ATA subsystem. This driver supports same hardware as
atamarvell, ataadaptec and atamvsata drivers from ata(4), but provides
many additional features, such as NCQ, PMP, etc.
2010-05-02 19:28:30 +00:00
Marius Strobl
f6ffc3c26b Remove redundant checking of sc_leaving (uart_intr() already handles this).
Approved by:	marcel
2010-05-02 19:07:19 +00:00
Marius Strobl
a9ef85b792 Remove a soft member which was never used.
Approved by:	marcel
2010-05-02 19:05:57 +00:00
Alexander Motin
205367f9bc Enable PCI busmastering explicitly to be sure. 2010-05-02 14:46:05 +00:00
Alexander Motin
da6808c111 Make SATA XPT negotiate and enable some additional SATA features, such as:
- device initiated power management (some devices support only this way);
 - Automatic Partial to Slumber Transition (more power saving);
 - DMA auto-activation (expected to slightly improve performance).
More features could be added later, when hardware supports.
2010-05-02 12:07:47 +00:00
Ryan Stone
04001891bb When configuring a system-wide couting PMC, hwpmc was incorrectly logging process mappings for that PMC. Nothing ever reads pmc logs out of a counting PMC, so the log buffers were leaked when the PMC was deconfigured. The process mappings are only useful for sampling PMCs anyway, so only log the mappings if the PMC is a sampling PMC.
This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs.

Approved by:	jkoshy (mentor)
MFC after:	2 weeks
2010-05-01 22:04:58 +00:00
Warner Losh
bc391cb2ce The Atheros AR71xx CPUs, when paired with the AR5212 parts, has a bug
that generates a fatal bus trap.  Normally, the chips are setup to do
128 byte DMA bursts, but when on this CPU, they can only safely due
4-byte DMA bursts due to this bug.  Details of the exact nature of the
bug are sketchy, but some can be found at
https://forum.openwrt.org/viewtopic.php?pid=70060 on pages 4, 5 and 6.
There's a small performance penalty associated with this workaround,
so it is only enabled when needed on the Atheros AR71xx platforms.

Unfortunately, this condition is impossible to detect at runtime
without MIPS specific ifdefs.  Rather than cast an overly-broad net
like Linux/OpenWRT dues (which enables this workaround all the time on
MIPS32 platforms), we put this option in the kernel for just the
affected machines.  Sam didn't like this aspect of the patch when he
reviewed it, and I'd love to hear sane proposals on how to fix it :)

Reviewed by:	sam@
2010-05-01 16:36:14 +00:00
Pyun YongHyeon
b9ddb8695d Add Marvell PHYG65G Gigabit PHY which is found on 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 19:01:55 +00:00
Pyun YongHyeon
e19bd6ee55 Add basic support for Marvell 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 18:58:55 +00:00
Pyun YongHyeon
7c8db6fd16 Disable non-ASF packet flushing on Yukon Extreme as vendor's driver
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.

Reported by:	jhb
Tested by:	jhb
MFC after:	5 days
2010-04-30 18:04:46 +00:00
Alexander Motin
5b228a7a86 Add Target/LUN ID checks. 2010-04-30 08:37:00 +00:00
Alexander Motin
81a75ae365 Add Target/LUN ID checks and deny access to targets 1-14 when PMP absent. 2010-04-30 08:22:47 +00:00
Alexander Motin
89f2835fc9 Add Target/LUN ID checks and deny access to targets 1-14 when PMP absent.
Enforce PMA bit clearing when PMP detached to avoid further scan timeouts.
2010-04-30 08:02:12 +00:00
David Christensen
7c409214bf - Enable flow control.
- Print device details only when verbose boot is enabled.
- Add debug output for shared memory access.
- Add debug statistics (checksum offload & VLAN frame counters).
- Modify TX path to update consumer index for each frame completed
  rather than updating the consumer index only once for a group of
  frames to improve small packet performance.
- Print driver/firmware pulse messages only when verbose boot
  is enabled.
- Add debug sysctl to clear statistics.
- Fix more style(9) violations.

MFC after:	2 weeks
2010-04-30 02:35:46 +00:00
Kip Macy
2965a45315 On Alan's advice, rather than do a wholesale conversion on a single
architecture from page queue lock to a hashed array of page locks
(based on a patch by Jeff Roberson), I've implemented page lock
support in the MI code and have only moved vm_page's hold_count
out from under page queue mutex to page lock. This changes
pmap_extract_and_hold on all pmaps.

Supported by: Bitgravity Inc.

Discussed with: alc, jeffr, and kib
2010-04-30 00:46:43 +00:00
Pyun YongHyeon
106b2e2ff2 Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. If
it is 8bits register then RX FIFO size can't exceed 2KB which is
not true for almost all Yukon II controller.
2010-04-30 00:34:00 +00:00
David Christensen
ae575eab2c - Pass flow control settings back to bce(4).
MFC after:	Two weeks
2010-04-29 22:00:57 +00:00
Pyun YongHyeon
c186cf13eb Enable VLAN hardware tag insertion/stripping. Due to lack of SiS190
controller, I'm not sure whether this is also applicable to SiS190
so this feature is only activated on SiS191 controller.
In theory, controller reinitialization is not needed when VLAN tag
configuration is changed, but xclin said controller was not stable
whenever toggling VLAN tag bit. To address that, sge(4)
reinitialize controller for VLAN configuration which seems to work
as expected. VLAN tag information for TX/RX descriptor and
configure bit of RxMacControl register was found by xclin.

Submitted by:	xclin <xclin <> cs dot nctu dot edu dot tw > (initial version)
Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:14:14 +00:00
Pyun YongHyeon
d1c5ee8030 Enable FCS stripping and padding 10 bytes bit of RX MAC control
register. Due to lack of SiS190 controller, I'm not sure whether
this is also applicable to SiS190 so this feature is only activated
on SiS191 controller.
The controller can pad 10 bytes before DMAing a received frame to
RX buffer and received bytes include the padded bytes. This padding
is very useful on strict-alignment architectures because driver
does not have to copy received frame to align IP header on 4 bytes
boundary. It also gives better RX performance on non-strict
alignment architectures. Special thanks to xclin to give me
valuable register information. Without his enthusiastic trial and
errors this wouldn't be even possible.

While I'm here tighten validity check of received frame. Controller
clears RDS_CRCOK bit when it received bad CRC frames. xclin found
that using loop back testing.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:00:42 +00:00
Pyun YongHyeon
7f20f021e1 Explicitly marks SiS190 to differentiate it from SiS191. 2010-04-29 17:34:01 +00:00
Pyun YongHyeon
60a1a1542e Remove wrong link state chage. 2010-04-29 17:30:21 +00:00
Pyun YongHyeon
9c2851d29a Preserve unknown bits of RX MAC control register when driver
programs RX filter configuration. It seems RX MAC control register
is one of key registers to get various offloading features as well
as performance. Blindly clearing unrelated bits can result in
unexpected results.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 17:28:07 +00:00
Maxim Sobolev
ff605594dd On certain chipsets AT keyboard controller isn't present and is
emulated by BIOS using SMI interrupt. On those chipsets reading
from the status port may be thousand times slower than usually.
Sometimes this emilation is not working properly resulting in
commands timing out and since we assume that inb() operation
takes very little time to complete we need to adjust number of
retries to keep waiting time within a designed limits (100ms).
Measure time it takes to make read_status() call and adjust
number of retries accordingly.

To keep it simple, use TSC to measure inb() performance and
keep it to amd64-only, since TSC may not available on older
CPUs.

Also enable detection of the AT controller absence on amd64.

Reviewed by:	jhb
MFC after:	1 month
2010-04-29 06:16:00 +00:00
Jung-uk Kim
3f5e024c14 Merge ACPICA 20100428. 2010-04-28 22:25:27 +00:00
Jack F Vogel
beef45ff88 Address the LOD that some are seeing, put the RX lock
back in rxeof (I could see little point in taking it out),
and now release it before the stack entry.

Also, make it so the 82574 does not configure for multiqueue
when its not used in the stack.
2010-04-28 19:22:52 +00:00
John Baldwin
aa1385cd7b Initialize the callout structure earlier in attach before calling any
routines that can fail since ciss_free() always tries to stop and drain
the callout.
2010-04-28 18:49:45 +00:00
Jack F Vogel
1655af0a72 Change default WOL back to MAGIC only, having
multicast enabled causes problems in man environments.
2010-04-28 17:37:30 +00:00
Jung-uk Kim
8c975e70af Remove dead code. Calculated greatest common divisor was not used at all.
On top of that, LLVM+Clang mis-compiles this code because of its register
allocator bug.

Analyzed by:	Andrew Reilly (areilly at bigpond dot net dot au)
Reviewed by:	ariff, rdivacky
MFC after:	3 days
2010-04-28 17:26:05 +00:00
Attilio Rao
d8b878873e - Extract the IODEV_PIO interface from ia64 and make it MI.
In the end, it does help fixing /dev/io usage from multithreaded
  processes.
- On i386 and amd64 the old behaviour is kept but multithreaded
  processes must use the new interface in order to work well.
- Support for the other architectures is greatly improved, where
  necessary, by the necessity to define very small things now.

Manpage update will happen shortly.

Sponsored by:	Sandvine Incorporated
PR:		threads/116181
Reviewed by:	emaste, marcel
MFC after:	3 weeks
2010-04-28 15:38:01 +00:00
Robert Noland
e7699af0af fx->lock is used as an index, correct test case.
MFC after:	1 week
2010-04-28 10:33:41 +00:00