355 Commits

Author SHA1 Message Date
hselasky
034fb0fbe6 Fix compilation issue with mlx5core and sparc64 (gcc48):
sys/dev/mlx5/mlx5_en/mlx5_en_tx.c:335: error: requested alignment is not a constant

MFC after:	1 week
Sponsored by:	Mellanox Technologies
2019-12-06 16:20:22 +00:00
hselasky
c3f12e5c78 Implement hardware TLS via send tags for mlx5en(4), which is supported by
ConnectX-6 DX.

Currently TLS v1.2 and v1.3 with AES 128/256 crypto over TCP/IP (v4
and v6) is supported.

A per PCI device UMA zone is used to manage the memory of the send
tags.  To optimize performance some crypto contexts may be cached by
the UMA zone, until the UMA zone finishes the memory of the given send
tag.

An asynchronous task is used manage setup of the send tags towards the
firmware. Most importantly setting the AES 128/256 bit pre-shared keys
for the crypto context.

Updating the state of the AES crypto engine and encrypting data, is
all done in the fast path. Each send tag tracks the TCP sequence
number in order to detect non-contiguous blocks of data, which may
require a dump of prior unencrypted data, to restore the crypto state
prior to wire transmission.

Statistics counters have been added to count the amount of TLS data
transmitted in total, and the amount of TLS data which has been dumped
prior to transmission. When non-contiguous TCP sequence numbers are
detected, the software needs to dump the beginning of the current TLS
record up until the point of retransmission. All TLS counters utilize
the counter(9) API.

In order to enable hardware TLS offload the following sysctls must be set:
kern.ipc.mb_use_ext_pgs=1
kern.ipc.tls.ifnet.permitted=1
kern.ipc.tls.enable=1

Sponsored by:	Mellanox Technologies
2019-12-06 15:36:32 +00:00
kib
72af986714 mlx5: Do not poke hardware for statistic after teardown is started.
Sponsored by:	Mellanox Technologies
MFC after:	1 week
2019-12-05 15:21:13 +00:00
hselasky
9159d4fe20 Add basic support for TCP/IP based hardware TLS offload to mlx5core.
The hardware offload is primarily targeted for TLS v1.2 and v1.3,
using AES 128/256 bit pre-shared keys. This patch adds all the needed
hardware structures, capabilites and firmware commands.

Sponsored by:	Mellanox Technologies
2019-12-05 15:16:19 +00:00
kib
ee51bed928 mlx5: Do not try to enable fwdumps if scan space did not responded.
Sponsored by:	Mellanox Technologies
MFC after:	1 week
2019-12-02 14:22:55 +00:00
kib
a850829d26 mlx5: Downgrade assert about misbehaving hardware to error message.
Sponsored by:	Mellanox Technologies
MFC after:	1 week
2019-12-02 14:21:40 +00:00
glebius
35db1c2a00 Convert to if_foreach_llmaddr() KPI.
Reviewed by:	hselasky
2019-10-14 20:23:16 +00:00
hselasky
a9b059643b Fix regression issue after r352989:
As noted by the commit message, callouts are now persistant
and should not be in the auto-zero section of the RQ's and SQ's.
This fixes an assert when using the TX completion event
factor feature with mlx5en(4).

Found by:	gallatin@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-08 19:49:25 +00:00
hselasky
6a26db6a68 Fix build failure for gcc after r352983, due to
not using static variable declared by net/sff8472.h .

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 12:45:39 +00:00
hselasky
6b6aa13ad9 Fix build failure for 32-bit platforms after r352991, due to
incorrect printf() formatter string.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 12:02:14 +00:00
hselasky
044654998a Bump driver version for mlx5core, mlx5en(4) and mlx5ib(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 11:15:35 +00:00
hselasky
8875aa05b8 Print numeric error_type and module_status in mlx5core
in case the strings are not available.

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 11:06:01 +00:00
hselasky
3984335992 Add print to show user a reason for rejecting buffer size change in mlx5en(4).
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 11:05:05 +00:00
hselasky
6fbbf1abad Only update lossy buffers config when manual PFC configuration was done
in mlx5en(4).

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 11:02:54 +00:00
hselasky
9b0d03698b Improve mlx5_fwdump_prep logging in mlx5core.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 11:01:05 +00:00
hselasky
47c2b8b757 Randomize the delay when waiting for VSC flag in mlx5core.
The PRM suggests random 0 - 10ms to prevent multiple waiters on the same
interval in order to avoid starvation.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:59:44 +00:00
hselasky
7869843218 Wait for FW readiness before initializing command interface in mlx5core.
Before attempting to initialize the command interface we must wait till
the fw_initializing bit is clear.

If we fail to meet this condition the hardware will drop our
configuration, specifically the descriptors page address.  This scenario
can happen when the firmware is still executing an FLR flow and did not
finish yet so the driver needs to wait for that to finish.

Linux commits:
6c780a0267b8
b8a92577f4be.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:53:28 +00:00
hselasky
979aaa35c6 Fix regression issue about bad refcounting of unlimited send tags
in mlx5en(4) after r348254.

The unlimited send tags are shared amount multiple connections and are
not allocated per send tag allocation request. Only increment the refcount.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:46:57 +00:00
hselasky
cd0bc32f20 Seal transmit path with regards to using destroyed mutex in mlx5en(4).
It may happen during link down that the running state may be observed
non-zero in the transmit routine, right before the running state is
cleared. This may end up using a destroyed mutex.

Make all channel mutexes and callouts persistant.

Preserve receive and send queue statistics during link toggle.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:43:49 +00:00
hselasky
ab9f3175d4 Remove unused cpu field from channel structure in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:26:26 +00:00
hselasky
2b930bc906 Remove mkey_be from channel structure in mlx5en(4).
Use value from priv structure instead.
This saves some space in the channel structure.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:25:47 +00:00
hselasky
78eba56572 Return an error from ioctl(MLX5_FW_RESET) if reset was rejected in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:24:13 +00:00
hselasky
7a5500af8b Add sysctl(8) to get and set forward error correction, FEC, configuration
in mlx5en(4).

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:22:15 +00:00
hselasky
74ef689370 Move EEPROM information query from a sysctl in mlx5en(4) to an ioctl
in mlx5core. The EEPROM information is not only a property of the
mlx5en(4) driver.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:14:55 +00:00
hselasky
e7193b2004 Add support for buffer parameter manipulations in mlx5en(4).
The following sysctls are added:
dev.mce.N.conf.qos.cable_length
dev.mce.N.conf.qos.buffers_size
dev.mce.N.conf.qos.buffers_prio

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:08:04 +00:00
hselasky
82af45a755 Import Linux code to query/set buffer state in mlx5en(4).
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:05:34 +00:00
hselasky
6e2bd349f6 Add mlx5e_dbg() compatibility macro.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:59:42 +00:00
hselasky
abc04d20f0 Update definitons for PPTB and PBMC registers layouts in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:58:00 +00:00
hselasky
56e46b595c Add definition for the Port Buffer Status Register in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:57:12 +00:00
hselasky
6fb43c1c15 Sort the ports registers definitions numerically in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:56:27 +00:00
hselasky
a1d0cdd5db Unify prints in mlx5en(4).
All prints in mlx5en(4) should use on of the macros:
mlx5_en_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:49:44 +00:00
hselasky
a4ea37d694 Unify prints in mlx5core.
All prints in mlx5core should use on of the macros:
mlx5_core_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:48:01 +00:00
hselasky
8646971bc1 Add proper print in case of 0x0 health syndrome in mlx5core.
In case of health counter fails to increment it indicates a bad device health.
In case when the syndrome indicated by firmware is 0x0, this indicates that
firmware is unable to respond to initialization segment reads.
Add proper print in this case.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:46:14 +00:00
hselasky
ef65cb579c Add missing blank line at the end of the print in mlx5core.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:45:07 +00:00
hselasky
98f486724d Remove no longer needed fwdump register tables from mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:43:48 +00:00
hselasky
cfd379137e Read rege map from crdump scan space in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:40:23 +00:00
hselasky
0b7cc31be3 Define MLX5_VSC_DOMAIN_SCAN_CRSPACE.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:34:34 +00:00
hselasky
bc8cd0bdaf Use the MLX5_VSC_DOMAIN_SEMAPHORES constant instead of hand-rolled symbol
in mlx5core.

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:33:38 +00:00
hselasky
1524de61fb Move mlx5_ifc_vsc_space_bits and mlx5_ifc_vsc_addr_bits to mlx5_ifc.h.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:32:41 +00:00
hselasky
d02d577963 Make the mlx5_vsc_wait_on_flag(9) function global.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:31:36 +00:00
hselasky
d6e923c7f0 Add port module event software counters in mlx5core.
While at it, fixup PME based on latest PRM defines.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:29:55 +00:00
hselasky
980e2c987e Correct and update some counter names in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:56 +00:00
hselasky
3a8e1da3e2 Export channel IRQ number as part of the "hw_ctx_debug" sysctl(8) in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:08 +00:00
hselasky
5111d166ce Cleanup naming of IRQ vectors in mlx5en.
Remove unused IRQ naming functions and arrays.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:23:33 +00:00
hselasky
bf8cde114e Add support for Multi-Physical Function Switch, MPFS, in mlx5en.
MPFS is a logical switch in the Mellanox device which forward packets
based on a hardware driven L2 address table, to one or more physical-
or virtual- functions. The physical- or virtual- function is required
to tell the MPFS by using the MPFS firmware commands, which unicast
MAC addresses it is requesting from the physical port's traffic.
Broadcast and multicast traffic however, is copied to all listening
physical- and virtual- functions and does not need a rule in the MPFS
switching table.

Linux commit:	eeb66cdb682678bfd1f02a4547e3649b38ffea7e
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:22:22 +00:00
hselasky
375a0becda Implement macro for asserting priv lock in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:16:17 +00:00
hselasky
c0c4cb59bd Fix for missing cleanup code in error case in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:15:07 +00:00
hselasky
0632579b28 Check return value of mlx5_vector2eqn() function in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:14:01 +00:00
hselasky
eed9b8fd7f Make sure the number of IRQ vectors doesn't exceed 256 in mlx5core.
The "intr" field in "struct mlx5_ifc_eqc_bits" is only 8 bits wide.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:12:53 +00:00
hselasky
3318a21063 Update warning and error print formats in mlx5ib.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:11:01 +00:00