6 Commits

Author SHA1 Message Date
jchandra
707f63ee61 Whitespace fixes for files in sys/mips/nlm
Clean up whitespace issues under sys/mips/nlm (except dev). No
functional change in this commit.
2015-02-28 00:17:29 +00:00
jchandra
1f4069c7a5 Improve additional interrupt ACK for Broadcom XLP
Handling some interrupts in XLP (like PCIe and SATA) involves writing to
vendor specific registers as part of interrupt acknowledgement.

This was earlier done with xlp_establish_intr(), but a better solution
is to provide a function xlp_set_bus_ack() that can be used with
cpu_establish_hardintr(). This will allow platform initialization code to
setup these ACKs without changing the standrard drivers.
2015-02-27 00:57:09 +00:00
jchandra
4d42a57ca7 Remove run-time allocation of XLP IRQs
Follow the same static IRQ to Interrupt Table Entry mapping as the other
OS supported on XLP.
2015-02-26 02:22:47 +00:00
jchandra
05a9f93ae4 Fix up interrupt definitions for Broadcom XLP
Gather all the IRQ definitions to interrupt.h. Earlier these were in xlp.h
and pic.h.  Update the definition of XLP_IRQ_IS_PICINTR to check for last
irq as well.
2015-02-26 01:53:24 +00:00
jchandra
566ec163bd MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring
  them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
  PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
  which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
  >32 cpus.

Approved by:	re(kib), jmallett
2011-09-05 10:45:29 +00:00
jchandra
e798ada01f Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 19:35:44 +00:00