33 Commits

Author SHA1 Message Date
imp
f65f3ca610 Remove dead code (comma is either 0 or 1 for sure, no need to test).
Close /dev/pci when we're done with it.

CID: 1007450, 1007449, 1008615, 1008614
2018-01-05 07:29:02 +00:00
pfg
872b698bd4 General further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.
2017-11-20 19:49:47 +00:00
vangyzen
8478efdf71 Fix some logic in PCIe HotPlug; display EI status
The interpretation of the Electromechanical Interlock Status was
inverted, so we disengaged the EI if a card was inserted.
Fix it to engage the EI if a card is inserted.

When displaying the slot capabilites/status with pciconf:

- We inverted the sense of the Power Controller Control bit,
  saying the power was off when it was really on (according to
  this bit).  Fix that.

- Display the status of the Electromechanical Interlock:
        EI(engaged)
        EI(disengaged)

Reviewed by:	jhb
MFC after:	3 days
Sponsored by:	Dell Inc.
Differential Revision:	https://reviews.freebsd.org/D7426
2016-08-05 23:23:48 +00:00
jhb
5fdd1034fa Output information about PCI-e devices with slots.
In particular this includes additional information on HotPlug capable
slots.
2016-04-02 01:59:53 +00:00
jhb
803903b35d Various updates to the PCI-express capability output.
- Group the output so that it follows the capability register set more
  closely.  The first line now contains device information and the
  second line contains link information.  As a result, ARI status is now
  output on the first line, and the link width is moved down to the second
  line of link information.
- Only read the DEVICE_CAP2 register to check for ARI if the capability
  version is >= 2.
- Don't output any link information if the link capability and status
  registers are zero.
- Label the MSI interrupt index value as "MSI" instead of "IRQ".
2016-04-02 01:55:43 +00:00
pfg
05d67f0149 pciconf: Silence a GCC warning.
Fix the build on sparc64 and powerpc.

Taken from:	wma
2016-02-26 23:12:59 +00:00
wma
15f8acc5ed Change format string in pciconf EA to jx
Fix compilation error introduced by r296081
2016-02-26 10:24:24 +00:00
wma
c652e74751 Add support for Enhanced Allocation in pciconf
* Modified pciconf to print EA capability structure
 * Added register description to pcireg.h

Obtained from:         Semihalf
Sponsored by:          Cavium
Approved by:           cognet (mentor)
Reviewed by:           jhb
Differential revision: https://reviews.freebsd.org/D5440
2016-02-26 08:35:04 +00:00
se
4afdb85262 Use __unused instead of casting to void to silence the unused parameter
warning.

Fix the indentation of 2 lines to conform with the style of this file.

Submitted by:	jhb
2016-02-18 20:20:36 +00:00
se
94a9d119b9 Make WARNS=6 safe.
Tested with Clang 3.7.1, GCC 4.2.1 and GCC 4.8.5 on amd64.
2016-02-18 15:23:25 +00:00
jhb
42d9b66898 Note if relaxed ordering or no snoop is enabled for each PCI-express device.
MFC after:	1 week
2015-11-05 20:24:56 +00:00
rstone
b7fc2d31bd Teach pciconf how to dump out SR-IOV capability
Differential Revision:	https://reviews.freebsd.org/D1639
Reviewed by:		jhb
MFC after:		1 month
Sponsored by:		Sandvine Inc.
2015-03-01 00:59:35 +00:00
rstone
3c8f124628 Print status of ARI capability in pciconf -c
Teach pciconf how to print out the status (enabled/disabled) of the ARI
capability on PCI Root Complexes and Downstream Ports.

MFC after:	2 months
Sponsored by:	Sandvine Inc.
2014-04-01 16:03:52 +00:00
jkim
040e350119 Decode PCIe ASPM capability and status. 2013-07-18 20:59:58 +00:00
kib
b7a5435147 Decode new HT 3.00 and 3.10 capabilities.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2013-05-17 14:05:31 +00:00
neel
be7ba5de0e Display MSI-X table and PBA offsets when displaying information about MSI-X
capability.

Reviewed by:	jhb, jimharris (initial version)
2013-02-01 19:24:16 +00:00
jimharris
e85387fbf1 For PCI Express capability, if max link width is greater than zero, print
the current and max link speed.

Sponsored by:	Intel
Discussed with:	jhb
MFC after:	1 week
2012-10-25 17:22:37 +00:00
imp
3903889bbd Indent ecaps the same way we indent caps.
MFC after:	3 days
2012-10-19 22:48:22 +00:00
gavin
5005c75c5d Align the PCI Express #defines with the style used for the PCI-X
#defines.  This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
  s/PCIR_EXPRESS_/PCIER_/g
  s/PCIM_EXP_/PCIEM_/g
  s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with:	jhb
MFC after:	1 week
2012-09-18 22:04:59 +00:00
jhb
5bb226a48f - Denote PCI-e endpoints that support FLR.
- Make parsing of PCI-e extended capabilities assume that future version
  numbers are backwards compatible.
- Add new AER error descriptions.
- Add descriptions for more PCI-e extended capabilities.

MFC after:	1 week
2012-09-13 19:08:31 +00:00
gavin
77e9cd7f1e - If the PCIe "SLOT" flag is set, include this in the capability output
- Fix printing of PCIe interrupt number, the shift was incorrect.

MFC after:	1 week
2012-09-05 18:27:45 +00:00
jhb
c0cab82568 Add a new -e flag to pciconf(8)'s list mode to display PCI error details.
Currently this dumps the status of any error bits in the PCI status register
and PCI-express device status register.  It also lists any errors indicated
by version 1 of PCI-express Advanced Error Reporting (AER).

MFC after:	1 week
2012-06-01 18:33:40 +00:00
jhb
39642e5530 Only attempt to list extended capabilities for devices that have a
PCI-express capabilities.  Non-PCI-express PCI devices may simply ignore
the upper bits in a config register address effectively aliasing the
device ID register to 0x100 rather than returning 0xFFFFFFFF.  Previously
the code relied on these reads returning 0xFFFFFFFF.

MFC after:	3 days
2010-09-16 16:03:12 +00:00
jhb
a7b4070f1f - Use 'sta' to hold the PCIR_STATUS register value instead of 'cmd' when
walking the capability list.
- Use constants for PCI header types instead of magic numbers.

MFC after:	1 week
2010-09-09 18:29:48 +00:00
jhb
1ced550055 - Add register definitions related to extended capability IDs in
PCI-express.  I used PCIZ_* for ID constants (plain capability IDs use
  PCIY_*).
- Add register definitions for the Advanced Error Reporting, Virtual
  Channels, and Device Serial Number extended capabilities.
- Teach pciconf -c to list extended as well as plain capabilities.   Adds
  more detailed parsing for AER, VC, and device serial numbers.

MFC after:	2 weeks
2010-09-08 17:53:34 +00:00
jhb
a48e119d84 - Add a few more register defintions for the PCI express capability
registers.
- Cleanup PCI-X capability printf to not leave a dangling "supports" for
  some PCI-X bridges.
- Display additional PCI express details including the negotiated and max
  link width and the actual and maximum supported max payload.

MFC after:	1 month
2009-04-17 19:07:44 +00:00
mav
6783972900 Tune output to remove trailing space.
Submitted by:	Christoph Mallon
2009-02-15 10:41:42 +00:00
mav
c77b4d9c80 Add SATA and PCI Advanced Features capabilities reporting. 2009-02-15 09:56:47 +00:00
jb
09fead072e Include agpreg.h from it's new location. 2007-11-13 01:30:40 +00:00
jhb
56dbd98cc8 Update copyright attribution.
MFC after:	3 days
2007-10-31 16:14:30 +00:00
jhb
4d2cf9795f Missed in the previous commit to this file:
Actually support the new HT capability type from HT 2.00b.

MFC after:	3 days
2007-10-27 13:16:25 +00:00
jhb
17f3e61404 - HT 2.00b added a new flag to the MSI mapping HT capability to indicate
that the MSI mapping window is fixed at 0xfee00000 and the capability
  does not include two more dwords used to program the address.  Supporting
  this mostly results in quieting spurious warnings during boot about
  non-default MSI mapping windows.
- HT 2.00b also added a new HT capability type, so support that in pciconf.

MFC after:	3 days
Tested by:	jmg
2007-04-25 14:45:46 +00:00
jhb
04771e3c14 - Teach pciconf(8) to list the PCI capabilities supported by each device
via a new -c flag to be used with -l.  Some simple parsing code is
  present for the following capabilities: Power Management, AGP, VPD,
  MSI, PCI-X, HyperTransport, Vendor-specific, EHCI Debug Port, PCI-PCI
  bridge subvendor ID, PCI-express, and MSI-X.
- Fix a few warnings in pciconf.c.
- Update some cruft in pciconf(8):
  - PCI 2.1 is no longer a revolutionary standard, and subvendor ID's are
    fairly common at this point, so reflect that.
  - Header type 2 is used for PCI-CardBus bridges.
  - Describe the -v option for -l after completing the basic -l description
    instead of disrupting the flow in the middle.

Reviewed by:	imp (partially)
MFC after:	1 week
2007-02-02 19:54:17 +00:00