Commit Graph

18 Commits

Author SHA1 Message Date
marius
ccce802536 - Allow the front-end to specify that iommu(4) should disable
rerun of the streaming cache for silicon bug workarounds.
- Announce the presence of a streaming cache on attach for
  informational purposes.
- For performance reasons don't do unnecessary flushes of the
  streaming cache when coherent mappings are synced.
- Fix some minor style issues.
2008-11-16 19:53:49 +00:00
marius
57e87ccecb - Use the name returned by device_get_nameunit(9) for the name of the
counter-timer timecounter so the associated SYSCTL nodes don't clash on
  machines having multiple U2P and U2S bridges as well as establishing a
  clear mapping between these bridges and their timecounter device.
- Don't bother setting up a "nice" name for the IOMMU, just use the name
  returned by device_get_nameunit(9), too.
- Fix some minor style(9) bugs.
- Use __FBSDID in counter.c

MFC after:	1 week
2008-05-07 21:22:15 +00:00
marius
5a1a2bd9cf - Divorce the IOTSBs, which so far where handled via a global list
instead of per IOMMU, so we no longer need to program all of them
  identically in systems having multiple IOMMUs. This continues the
  rototilling of the nexus(4) done about 5 months ago, which amongst
  others changed nexus(4) and the drivers for host-to-foo bridges
  to provide bus_get_dma_tag methods, allowing to handle DMA tags in
  a hierarchical way and to link them with devices.
  This still doesn't move the silicon bug workarounds for Sabre (and
  in the uncommitted schizo(4) for Tomatillo) bridges into special
  bus_dma_tag_create() and bus_dmamap_sync() methods though, as w/o
  fully newbus'ified bus_dma_tag_create() and bus_dma_tag_destroy()
  this still requires too much hackery, i.e. per-child parent DMA
  tags in the parent driver.
- Let the host-to-foo drivers supply the maximum physical address
  of the IOMMU accompanying the bridges. Previously iommu(4) hard-
  coded an upper limit of 16GB, which actually only applies to the
  IOMMUs of the Hummingbird and Sabre bridges. The Psycho variants
  as well as the U2S in fact can can translate to up to 2TB, i.e.
  translate to 41-bit physical addresses. According to the recently
  available Tomatillo documentation these bridges even translate to
  43-bit physical addresses and hints at the Schizo bridges doing
  43 bits as well.
  This fixes the issue the FreeBSD 6.0 todo list item "Max RAM on
  sparc64" was refering to and pretty much obsoletes the lack of
  support for bounce buffers on sparc64.

Thanks to Nathan Whitehorn for pointing me at the Tomatillo manual.

Approved by:	re (kensmith)
2007-08-05 11:56:44 +00:00
imp
f0bf889d0d /* -> /*- for license, minor formatting changes 2005-01-07 02:29:27 +00:00
tmm
5b603201cc Lock down the IOMMU bus_dma implementation to make it safe to use
without Giant held.

A quick outline of the locking strategy:
Since all IOMMUs are synchronized, there is a single lock, iommu_mtx,
which protects the hardware registers (where needed) and the global and
per-IOMMU software states. As soon as the IOMMUs are divorced, each struct
iommu_state will have its own mutex (and the remaining global state
will be moved into the struct).
The dvma rman has its own internal mutex; the TSB slots may only be
accessed by the owner of the corresponding resource, so neither needs
extra protection.
Since there is a second access path to maps via LRU queues, the consumer-
provided locking is not sufficient; therefore, each map which is on a
queue is additionally protected by iommu_mtx (in part, there is one
member which only the map owner may access). Each map on a queue may
be accessed and removed from or repositioned in a queue in any context as
long as the lock is held; only the owner may insert a map.
To reduce lock contention, some bus_dma functions remove the map from
the queue temporarily (on behalf of the map owner) for some operations and
reinsert it when they are done. Shorter operations and operations which are
not done on behalf of the lock owner are completely covered by the lock.

To facilitate the locking, reorganize the streaming buffer handling;
while being there, fix an old oversight which would cause the streaming
buffer to always be flushed, regardless of whether streaming was enabled
in the TSB entry. The streaming buffer is still disabled for now, since
there are a number of drivers which lack critical bus_dmamp_sync() calls.

Additional testing by:	jake
2003-07-10 23:27:35 +00:00
tmm
ac5eed50ca Further cleanup of the sparc64 busdma implementation:
- Move prototypes for sparc64-specific helper functions from bus.h to
  bus_private.h
- Move the method pointers from struct bus_dma_tag into a separate
  structure; this saves some memory, and allows to use a single method
  table for each busdma backend, so that the bus drivers need no longer
  be changed if the methods tables need to be modified.
- Remove the hierarchical tag method lookup. It was never really useful,
  since the layering is fixed, and the current implementations do not
  need to call into parent implementations anyway. Each tag inherits
  its method table pointer and cookie from the parent (or the root tag)
  now, and the method wrapper macros directly use the method table
  of the tag.
- Add a method table to the non-IOMMU backend, remove unnecessary
  prototypes, remove the extra parent tag argument.
- Rename sparc64_dmamem_alloc_map() and sparc64_dmamem_free_map() to
  sparc64_dma_alloc_map() and sparc64_dma_free_map(), move them to a
  better place and use them for all map allocations and deallocations.
- Add a method table to the iommu backend, and staticize functions,
  remove the extra parent tag argument.
- Change the psycho and sbus drivers to just set cookie and method table
  in the root tag.
- Miscellaneous small fixes.
2003-06-18 16:41:36 +00:00
tmm
682044b335 Remove the psycho and sbus iommu function stubs, and put the pointer
to the iommu_state structure directly into dt_cookie. The stubs have
not been needed for a long time now.
2003-06-11 20:30:52 +00:00
scottl
5f2aec7948 De-orbit bus_dmamem_alloc_size(). It's a hack and was never used anyways.
No need for it to pollute the 5.x API any further.

Approved by:	re (bmah)
2003-05-26 04:00:52 +00:00
mux
37f577805d I deserve a big pointy hat for having missed all those references
to bus_dmasync_op_t in my last commit.
2003-04-10 23:50:06 +00:00
jake
e3ca27bdf0 Use vm_paddr_t for physical addresses. 2003-04-08 06:35:09 +00:00
scottl
27cbbd88a2 Implement bus_dmamem_alloc_size() and bus_dmamem_free_size() as
counterparts to bus_dmamem_alloc() and bus_dmamem_free().  This allows
the caller to specify the size of the allocation instead of it defaulting
to the max_size field of the busdma tag.

This is intended to aid in converting drivers to busdma.  Lots of
hardware cannot understand scatter/gather lists, which forces the
driver to copy the i/o buffers to a single contiguous region
before sending it to the hardware.  Without these new methods, this
would require a new busdma tag for each operation, or a complex
internal allocator/cache for each driver.

Allocations greater than PAGE_SIZE are rounded up to the next
PAGE_SIZE by contigmalloc(), so this is not suitable for multiple
static allocations that would be better served by a single
fixed-length subdivided allocation.

Reviewed by:	jake (sparc64)
2003-01-29 07:25:27 +00:00
tmm
64ef30fddd Change the iommu code to be able to handle more than one DVMA area per
map. Use this new feature to implement iommu_dvmamap_load_mbuf() and
iommu_dvmamap_load_uio() functions in terms of a new helper function,
iommu_dvmamap_load_buffer(). Reimplement the iommu_dvmamap_load()
to use it, too.
This requires some changes to the map format; in addition to that,
remove unused or redundant members.
Add SBus and Psycho wrappers for the new functions, and make them
available through the respective DMA tags.
2003-01-06 21:59:54 +00:00
tmm
339b19ff87 When multiple IOMMUs are present in a system, use a single TSB for all
of them, and couple them by always performing all operations on all
present IOMMUs. This is required because with the current API there
is no way to determine on which bus a busdma operation is performed.

While being there, clean up the iommu code a bit.

This should be a step in the direction of allow some of larger machines
to work; tests have shown that there still seem to be problems left.
2002-07-16 18:17:03 +00:00
tmm
6f021cf47c Revamp the busdma implementation a bit:
- change the IOMMU support code so that it supports overcommittting the
  available DVMA memory, while still allocating as lazily as possible.
  This is achieved by limiting the preallocation, and deferring the
  allocation to map load time when it fails. In the latter case, the
  DVMA memory reserved for unloaded maps can be stolen to free up enough
  memory for loading a map.
- allow NULL settings in the method tables, and search the parent tags
  until an appropriate implementation is found. This allows to remove some
  kluges in the old implementation.
2002-03-24 02:50:53 +00:00
tmm
b0d3f0a8e8 Add code to print the fault virtual address for uncorrectable DMA errors
caused by IOMMU misses to aid debugging. This will only work on
UltraSPARC-IIi and IIe.
2002-03-23 20:42:23 +00:00
alfred
e1ec4d77dc Remove __P.
profile.h and bus.h were excluded because there is currently WIP.

Reviewed by: tmm
2002-03-21 00:06:55 +00:00
tmm
833609e922 Merge r1.42 of iommu.c and r1.9 of iommuvar.h from NetBSD (this adds
support for managing both streaming caches on psycho pairs).
Use explicit bus space accesses instead of mapping the device memory into
kva.
Move DVMA allocation to the map creation/dma memory allocation functions.
2002-02-13 15:59:17 +00:00
tmm
904109a4f9 Support for the UltraSpac DVMA MMU (IOMMU), ported from NetBSD. 2001-11-09 20:14:41 +00:00