Commit Graph

672 Commits

Author SHA1 Message Date
andrew
ab7acde2c2 Remove physmap from the arm64 machdep.h. This was missed in r334162. 2018-05-24 16:07:47 +00:00
andrew
efd8540f2e Allow us to read the physmap data into our own array and use this to build
the DMAP region on arm64.

We already have the needed information to build these tables, we just need
to extract it. This significantly simplifies the code.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-24 15:32:49 +00:00
andrew
a9a76a3a09 Print the physmem tables under a verbose boot.
Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-24 15:07:53 +00:00
andrew
554647942a Exclude memory from the /reserved-memory mappings with the no-map property
set. This memory must not be mapped by the operating system other than
under control of the device driver.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-24 14:55:50 +00:00
manu
87cbf37146 arm64: rockchip: Add proper armclock support
The core clock (armclk) on RockChip SoC is special.
It can derive it's clock from many PLLs but RockChip recommand to do it
from "apll" on old SoC and "npll" on new SoC. The reason for choosing npll
is that it's have less jitter and is more close to the arm core on the SoC.
r333314 added the core clock as a composite clock but due to it's specials
property we need to deal with it differently.
A new rk_clk_armclk type is added for this and it supports only the "npll"
as we don't run on old RockChip SoC that only have the "apll".
It will always reparent to "npll" and set the frequency according to a rate
table that is known to be good.
For now we set the "npll" to the desired frequency and just set the core clk
divider to 1 as its parent it just used for the core clk.
2018-05-23 19:07:03 +00:00
markj
f4398fd133 Add GET_STACK_USAGE() for arm64.
Its absence meant that GEOM direct dispatch was disabled (the service
routines check the current thread's stack usage to determine whether
to hand off the request to a dedicated thread), and this change is
sufficient to enable direct dispatch by default.

Reviewed by:	allanjude
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D15527
2018-05-23 15:43:35 +00:00
andrew
ebf60a8eff Revert r334035 for now. It breaks the boot on some boards as er expect to
be able to read UEFI RuntimeData memory via the DMAP region.
2018-05-22 15:52:11 +00:00
andrew
3510d04150 On ThunderX2 we need to be careful to only map the memory the firmware
lists in the EFI memory map. As such we need to reduce the mappings to
restrict them to not be the full 1G block. For now reduce this to a 2M
block, however this may be further restricted to be 4k page aligned as
other SoCs may require.

This allows ThunderX2 to boot reliably to userspace without performing
any speculative memory accesses to invalid physical memory.

Sponsored by:	DARPA, AFRL
2018-05-22 11:26:41 +00:00
andrew
0aa60204cc Stop using the DMAP region to map ACPI memory.
On some arm64 boards we need to access memory in ACPI tables that is not
mapped in the DMAP region. To handle this create the needed mappings in
pmap_mapbios in the KVA space.

Submitted by:	Michal Stanek (mst@semihalf.com)
Sponsored by:	Cavium
Differential Revision:	https://reviews.freebsd.org/D15059
2018-05-22 11:16:45 +00:00
andrew
be2fcd48cd Switch arm64 to use the same physmem code as 32-bit arm.
The main advantage of this is to allow us to exclude memory from being
used by the kernel. This may be from the memreserve property, or ranges
marked as no-map under the reserved-memory node.

More work is still needed to remove the physmap array. This is still used
for creating the DMAP region, however other patches need to be committed
before we can remove this.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-22 11:07:04 +00:00
andrew
5d4a66a5af Restrict the faulting addresses we call pmap_fault from to just those that
may fault due to superpage mappings being changed.

Sponsored by:	DARPA, AFRL
2018-05-21 16:14:53 +00:00
markj
5594f37668 Enable kernel dump features in GENERIC for most platforms.
This turns on support for kernel dump encryption and compression, and
netdump. arm and mips platforms are omitted for now, since they are more
constrained and don't benefit as much from these features.

Reviewed by:	cem, manu, rgrimes
Tested by:	manu (arm64)
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D15465
2018-05-19 19:53:23 +00:00
cognet
a92d244906 Instead of ignoring the VFP registers, set the dumppcb's pcb_fpusaved
field, so that they are saved, as they may be used in the kernel, in the
EFI and the crypto code.

Reviewed by:	andrew
2018-05-18 13:28:02 +00:00
andrew
359ac3e429 Enable the Qualcomm MSM UART driver. This is needed for some Qualcomm
Snapdragon SoCs.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-18 11:32:48 +00:00
cognet
841df736ab In pmap_get_tables(), check that the L2 is indeed a table before attempting
to get the l3.
2018-05-17 22:40:22 +00:00
cognet
b2d2968d5f In vfp_save_state(), don't bother trying to save the VFP registers if the
provided PCB doesn't have a pcb_fpusaved. All PCBs associated to a thread
should have one, but the dumppcb used when panic'ing doesn't.
2018-05-17 22:38:16 +00:00
avg
440049bc68 followup to r332730/r332752: set kdb_why to "trap" for fatal traps
This change updates arm, arm64 and mips achitectures.  Additionally, it
removes redundant checks for kdb_active where it already results in
kdb_reenter() and adds kdb_reenter() calls where they were missing.

Some architectures check the return value of kdb_trap(), but some don't.
I haven't changed any of that.

Some trap handling routines have a return code.  I am not sure if I
provided correct ones for returns after kdb_reenter().  kdb_reenter
should never return unless kdb_jmpbufp is NULL for some reason.

Only compile tested for all affected architectures.  There can be bugs
resulting from my poor understanding of architecture specific details.

Reported by:	jhb
Reviewed by:	jhb, eadler
MFC after:	4 weeks
Differential Revision: https://reviews.freebsd.org/D15431
2018-05-16 06:52:08 +00:00
andrew
9d8b5dd26c Increase the number of pages we allocate in the arm64 early boot. We are
already close to the limit so increasing the kernel size may cause it to
fail to boot when it runs past the end of allocated memory.

Reported by:	manu
Sponsored by:	DARPA, AFRL
2018-05-15 16:44:35 +00:00
manu
6caecdadde arm64: Add ALT_BREAK_TO_DEBUGGER to GENERIC
It is useful to enter kdb with an escape sequence.
While here move the USB_DEBUG with the others debug options and define
nooptions USB_DEBUG for GENERIC-NODEBUG
2018-05-10 09:37:50 +00:00
manu
2f6fad05d8 arm64: rockchip: cru: Call clk_set_assigned
We need to call clk_set_assigned after all the clock have been registered
to set the parents/rates described in the dtb.
2018-05-07 07:31:25 +00:00
manu
371e788177 arm64: rockchip: clk: Add support to reparent to clk_composite
All clk_composite type have the possibility to reparent (choosing another
parent to find a better frequency), add the support for that.
2018-05-07 07:29:48 +00:00
manu
5cf7874c16 arm64: rk3328: Add pll rates tables
Add the known value to be safe for the rk3328 PLLs
2018-05-07 07:28:47 +00:00
manu
c2b91cdf4e arm64: rk: Add support for setting pll rate
Add support for setting pll rate. On RockChip SoC two kind of plls are
supported, integer mode and fractional mode.
The two modes are intended to support more frequencies for the core plls.
While here change the recalc method as it appears that the datasheet is
wrong on the calculation method.
2018-05-07 07:28:10 +00:00
manu
d14e211d4f arm64: rockchip: rk3328: Add armclk clock
Add the clock definition for the arm clock.
While here remove the indexes in the clock table as we will need clock
with a 0 index (non-exported clocks).
2018-05-07 07:26:48 +00:00
markj
65dc9f377b Print the dump progress indicator after calling dump_start().
Dumpers may wish to print messages from an initialization hook; this
change ensures that such messages aren't mixed with output from the
generic dump code.

MFC after:	1 week
2018-05-01 17:32:43 +00:00
manu
99aa447999 arm64: rockchip: rk_gpio fix rk_gpio_pin_config32
Pointy Hat to:	 me
2018-04-26 22:15:09 +00:00
manu
0b8ea57a55 arm64: rockchip: Add gpio controller driver
Add a driver that match on 'rockchip,gpio-bank', this compatible
string is found on almost all RockChip SoC so this driver is compatible
with almost all of the RockChip SoCs.

The only features missing for this driver are :
- Interrupts support
- Debouncing
2018-04-26 21:44:00 +00:00
manu
a06b782967 arm64: rockchip: RK3328 CRU Add gpio gates
Add the gates for the gpio controller in order to properly support them.
2018-04-26 21:40:05 +00:00
manu
42097f6556 arm64: rockchip: Rk3328 CRU Fix some offset for gates
Some offset of some clock gates where wrong, correct them so we can
use thoses clocks.

Pointy Hat to:	me
2018-04-26 21:38:59 +00:00
manu
5cd7e598a9 arm64: rockchip: Add pinctrl driver
Add pinctrl driver for RockChip SoCs. This device manage which function
to set on which pin and some other properties like pull up/down, drive
strength etc ...
For now the driver only support RK3328 but it is versatile enough to
add support for other RockChip SoC in the future.
2018-04-26 21:37:38 +00:00
manu
d2a2b25e7b arm64: rockchip: Add GRF driver
RockChip GRF (General Register Files) is present on almost all RockChip
SoC and is used to control some area of the system like iomuxing, gpio
or usb phy.
We need it to be probed and attached early in the boot process so
subclass syscon_generic and set the pass to BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE.
2018-04-26 21:35:04 +00:00
emaste
00bb4a5b36 arm64 linuxulator: add generated sysent files
From syscalls.master in r333027

Sponsored by:	Turing Robotic Industries Inc.
2018-04-26 18:46:38 +00:00
emaste
5912a23aef Add arm64 Linux syscall table
This is the first step (after the recent refactoring of some common
code) to supporting the Linuxulator on arm64.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries Inc.
Differential Revision:	https://reviews.freebsd.org/D15187
2018-04-26 18:38:59 +00:00
brooks
c35e9275fc Remove the unused fuwintr() and suiwintr() functions.
Half of implementations always failed (returned (-1)) and they were
previously used in only one place.

Reviewed by:	kib, andrew
Obtained from:	CheriBSD
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D15102
2018-04-17 18:04:28 +00:00
br
976dcf366c Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.
This is required for ARM Coresight operation on Dragonboard 410c.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14987
2018-04-10 12:53:48 +00:00
gonzo
38bf332628 Fix one more OF_getprop_alloc instance missed in r332310
X-MFC-With:	r332310
2018-04-08 23:17:51 +00:00
brooks
9d79658aab Move most of the contents of opt_compat.h to opt_global.h.
opt_compat.h is mentioned in nearly 180 files. In-progress network
driver compabibility improvements may add over 100 more so this is
closer to "just about everywhere" than "only some files" per the
guidance in sys/conf/options.

Keep COMPAT_LINUX32 in opt_compat.h as it is confined to a subset of
sys/compat/linux/*.c.  A fake _COMPAT_LINUX option ensure opt_compat.h
is created on all architectures.

Move COMPAT_LINUXKPI to opt_dontuse.h as it is only used to control the
set of compiled files.

Reviewed by:	kib, cem, jhb, jtl
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14941
2018-04-06 17:35:35 +00:00
br
7d671d9b44 Add support for the Coresight technology from ARM Ltd.
ARM Coresight is a solution for debug and trace of complex SoC designs.

This includes a collection of drivers for ARM Coresight interconnect
devices within a small Coresight framework.

Supported devices are:
o Embedded Trace Macrocell v4 (ETMv4)
o Funnel
o Dynamic Replicator
o Trace Memory Controller (TMC)
o CPU debug module

Devices are connected to each other internally in SoC and the
configuration of each device endpoints is described in FDT.

Typical trace flow (as found on Qualcomm Snapdragon 410e):
CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
CPU1 -> ETM1 -^
CPU2 -> ETM2 -^
CPU3 -> ETM3 -^

Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR)
are hardware configurations of TMC.

This is required for upcoming HWPMC tracing support.

This is tested on single-core system only.

Reviewed by:	andrew (partially)
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14618
2018-04-05 15:45:54 +00:00
gonzo
b45524a54b Fix arm64 buildkernel target with "nooptions KDB"
Make kdb_trap in breakpoint exception handler conditional. If "options KDB"
is not present just panic with message that debugger is not enabled.

PR:		224653
2018-04-04 01:13:28 +00:00
emaste
6fe54a5343 Rename assym.s to assym.inc
assym is only to be included by other .s files, and should never
actually be assembled by itself.

Reviewed by:	imp, bdrewery (earlier)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D14180
2018-03-20 17:58:51 +00:00
kevans
29870e52c0 EFIRT: SetVirtualAddressMap with 1:1 mapping after exiting boot services
This fixes a problem encountered on the Lenovo Thinkpad X220/Yoga 11e where
runtime services would try to inexplicably jump to other parts of memory
where it shouldn't be when attempting to enumerate EFI vars, causing a
panic.

The virtual mapping is enabled by default and can be disabled by setting
efi_disable_vmap in loader.conf(5).

Reviewed by:	kib (earlier version)
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D14677
2018-03-13 17:10:52 +00:00
andrew
39dd4716fd Use the correct address to write back to memory in the GICv3 ITS driver.
This seems to no be needed on supported hardware as they are cache-coherent,
however this may not be the case on all platforms.

Sponsored by:	DARPA, AFRL
2018-03-09 10:34:44 +00:00
andrew
d682824945 Bump MAXCPUS on arm64. We are starting to see hardware with more than 96
cores so increase it to the same as amd64.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 13:54:44 +00:00
andrew
ed08bbe6a2 Create macros for the ACPI interrupt cross references. This is considered a
band aid until a better solution to find the correct interrupt controller
can be found.

While here fix one place in the GICv3 ITS driver where the offset wasn't
correctly applied.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 13:16:03 +00:00
andrew
32b7f64a11 Restrict the arm64 DMAP region to the 1G blocks where we have at least
one physical page. This is in preparation for limiting it further as this
is needed on some hardware, however testing has shown issues with further
restricting the DMAP and ACPI.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 09:58:36 +00:00
andrew
8ea72b3894 Register each GICv3 ITS driver with a useful cross reference. We currently
only use the first driver, however this may change in the future and
hardware exists with multiple ITS devices.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-05 10:11:30 +00:00
andrew
82fd7d44b1 In the ACPI GICv3 attach function call device_get_children to get the list
of children. We expect this to be populated when configuring the secondary
cores.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-05 10:09:18 +00:00
kib
d27cb27779 Unify bulk free operations in several pmaps.
Submitted by:	Yoshihiro Ota
Reviewed by:	markj
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D13485
2018-03-04 20:53:20 +00:00
andrew
f59ac355de Move setting the IRQ base and length into the common GICv3 ITS attach
function. This is common across both ACPI and FDT.

Sponsored by:	ABT Systems Ltd
Sponsored by:	Cavium (Hardware)
2018-03-03 13:20:44 +00:00
andrew
50b4748453 Add the missing GICv3 dev info struct to the ACPI dev info.Previously we
would read from the resource list when querying from this.

Sponsored by:	ABT Systems Ltd
Sponsored by:	Cavium (Hardware)
2018-03-03 13:19:08 +00:00