MCLBYTES - ETHER_ALIGN. Previously it applied the alignment fixup code
for oversized frames which would result in reduced performance on
strict alignment archs.
o when turning off the socket for a 16-bit card, write 0 to INTR register
rather than just tying to just clear the rest bit. this seems to fix
card insert detection after an eject on TI bridges (ricoh bridges work
either way, apparently). This is a MFp4.
o Cope better with TOPIC95 bridges on powerup. According to NetBSD driver,
these bridges don't set POWER_STATE, so cope accordingly in our power
code. They also need a little extra time to settle, so do that as well.
o It appears that we need to turn on/off one of the clocks to the card
when we power up/down that socket on a TOPIC97, also from NetBSD.
o TOPIC97 bridges need to specifically enable LV card support. Unconditionally
do this in the hopes that all laptops that have these chips support LV
voltages (they should, since they are required for CardBus).
o TOPIC register name regularization. Registers specific to models of TOPIC
are now called out as such.
# I need a machine with a TOPIC95 for testing.
space that enables low voltage operation (and maybe other stuff).
Enable the bits in this register so low voltage 16-bit cards may work.
Existance noticed in NetBSD driver.
think the RealTek PHY needs driver to set RGEPHY_BMCR_AUTOEN bit of
RGEPHY_MII_BMCR register and proper ANAR register setting for manual
media type selection.
This fixes long standing manual media type selection bug in rgephy(4).
Reported by: Jelte Jansen <jelte AT NLnetLabs DOT nl>
Tested by: Jelte Jansen <jelte AT NLnetLabs DOT nl>
Use proper pointer dereference to inform modified mbuf chains to
caller.
While I'm here perform checksum offload setup after loading DMA
maps.
In collaboration with: glebius
Use proper pointer dereference to inform modified mbuf chains to
caller.
While I'm here perform checksum offload setup after loading DMA
maps as m_defrag(9) can return new mbuf chains.
In collaboration with: glebius
WB (write-back) on x86 via control bits in PTEs and PDEs (including making
use of the PAT MSR). Changes include:
- A new pmap_mapdev_attr() function for amd64 and i386 which takes an
additional parameter (relative to pmap_mapdev()) specifying the cache
mode for this mapping. Note that on amd64 only WB mappings are done with
the direct map, all other modes result in a private mapping.
- pmap_mapdev() on i386 and amd64 now defaults to using UC (uncached)
mappings rather than WB. Previously we relied on the BIOS setting up
MTRR's to enforce memio regions being treated as UC. This might make
hw.cbb_start_memory unnecessary in some cases now for example.
- A new pmap_mapbios()/pmap_unmapbios() API has been added to allow places
that used pmap_mapdev() to map non-device memory (such as ACPI tables)
to do so using WB as before.
- A new pmap_change_attr() function for amd64 and i386 that changes the
caching mode for a range of KVA.
Reviewed by: alc
82571EB quad port copper NIC and has few minor fixes.
Details:
- if_em.c. Merged manually, viewing diff between new vendor
driver and previous one.
- if_em_hw.c. Dropped in from vendor, and then restored
revision 1.15.
o include current tx rate in stats so athstats gets a consistent
snapshot and doesn't have to make an extra ioctl
o record tx rate for raw frames
MFC after: 3 weeks
of geometry. However, some platforms have a more complicated mapping
of the firmware values to the actual values. pc98 is the only
platform that currently does this. This mapping is necessary for
large disks connected to pc98 boxes, as the firmware labels require do
special hacks to the actual geometry for interoperability. We cannot
do this all in the geom layer because of initialization issues (geom
looks for an already initialized pc98 label, but we need the geometry
information prior to initialization, classic chicken and egg problem).
We pass the disk and the device_t to this function because the
geometry mapping depends on what kind of controller is used.
This hook allows platforms that want to override things to do so, and
has 0 overhead on all other platforms. These patches have been in use
locally for a long time, and received good feedback from the pc98
community and sos@ at various times during their development.
MFC After: 1 week
cards stopped working. Specifically the AVM B1 PCMCIA Card no longer
detected. Its CIS chain read back as all FF's. Putting the delay
back solves those problems. I've opted to put in a much shorter delay
because as far as I can tell, no delay is really needed here. We'll
see how well this works in practice.
function independently. This change is not only load-tested since I don't
have hardware that supports acpi_dock. Clean up comments and a name a
few constants.
is interaction between in-kernel sound buffer handling and hardware.
With small buffer, there are times when both harwdare reads and
kernel writes to the same buffer (it is only visible on slow machines, i
think). I'm digging in channel.c and buffer.c to find a solution that
allow use of large hardware buffers without sound lags - hardware can
handle buffers up to 32Mb."
Submitted by: Yuriy Tsibizov <Yuriy.Tsibizov@gfk.ru>
that aren't listed as valid in the link device's set of possible IRQs.
This allows the hints to be used to work around broken BIOSes that don't
specify the correct ste of possible IRQs. A warning is issued in the
dmesg in this case to be consistent with the $PIR handling code.
MFC after: 1 week
This enables the scanner function on these devices to be detected
and probed by uscanner(4), but only when ulpt is not loaded.
PR: usb/92462
Submitted by: Friedrich Volkmann
MFC after: 30 days
the notify structs. Fix messages in isp_got_msg_fc to print out the
loop id of the sender- not the wwpn which will be synthesized later,
if possible, in the outer layers. Put in debug printouts to pair
a notify ack to a notify so one can see the start/close of an
immediate notify event. Put in spsace for TASK MANAGEMENT response
flags (which we don't do yet).
80003 NICs and NICs found on ICH8 mobos, and improves support for
already known chips.
Details:
- if_em.c. Merged manually, viewing diff between new vendor
driver and previous one. This was an easy task, because
most changes between 5.1.5 and 6.0.5 are bugfixes taken
from FreeBSD.
- if_em_hw.h. Dropped in from vendor, and then restored
revisions 1.16, 1.17, 1.18.
- if_em_hw.c. Dropped in from vendor, and then restored
revision 1.15.
- if_em_osdep.h. Added new required macros from vendor file
and add a hack against define namespace mangling in
if_em_hw.h. Intel made another hack, but I prefer mine.
alloc'ing mbufs so that there is less error handling required.
- Go ahead and account for the data space in the first mbuf before entering
the loop to alloc more mbuf's. This simplifies the loop logic and avoids
confusing Coverity.
CID: 817
Reviewed by: sam
Tested by: pjd
Found by: Coverity Prevent (tm)
PowerPC-based Apple's machines and small utility to do it from
userland modelled after the similar utility in Darwin/OSX.
Only tested on 1.25GHz G4 Mac Mini.
MFC after: 1 month
- Change the workaround for the autopad/checksum offload bug so that
instead of lying about the map size, we actually create a properly
padded mbuf and map it as usual. The other trick works, but is ugly.
This approach also gives us a chance to zero the pad space to avoid
possibly leaking data.
- With the PCIe devices, it looks issuing a TX command while there's
already a transmission in progress doesn't have any effect. In other
words, if you send two packets in rapid succession, the second one may
end up sitting in the TX DMA ring until another transmit command is
issued later in the future. Basically, if re_txeof() sees that there
are still descriptors outstanding, it needs to manually resume the
TX DMA channel by issuing another TX command to make sure all
transmissions are flushed out. (The PCI devices seem to keep the
TX channel moving until all descriptors have been consumed. I'm not
sure why the PCIe devices behave differently.)
(You can see this issue if you do the following test: plug an re(4)
interface into another host via crossover cable, and from the other
host do 'ping -c 2 <host with re(4) NIC>' to prime the ARP cache,
then do 'ping -c 1 -s 1473 <host with re(4) NIC>'. You're supposed
to see two packets sent in response, but you may only see one. If
you do 'ping -c 1 -s 1473 <host with re(4) NIC>' again, you'll
see two packets, but one will be the missing fragment from the last
ping, followed by one of the fragments from this ping.)
- Add the PCI ID for the US Robotics 997902 NIC, which is based on
the RTL8169S.
- Add a tsleep() of 1 second in re_detach() after the interrupt handler
is disconnected. This should allow any tasks queued up by the ISR
to drain. Now, I know you're supposed to use taskqueue_drain() for
this, but something about the way taskqueue_drain() works with
taskqueue_fast queues doesn't seem quite right, and I refuse to be
tricked into fixing it.
- Correct the PCI ID for the 8169SC/8110SC in the device list (I added
the macro for it to if_rlreg.h before, but forgot to use it.)
- Remove the extra interrupt spinlock I added previously. After giving it
some more thought, it's not really needed.
- Work around a hardware bug in some versions of the 8169. When sending
very small IP datagrams with checksum offload enabled, a conflict can
occur between the TX autopadding feature and the hardware checksumming
that can corrupt the outbound packet. This is the reason that checksum
offload sometimes breaks NFS: if you're using NFS over UDP, and you're
very unlucky, you might find yourself doing a fragmented NFS write where
the last fragment is smaller than the minimum ethernet frame size (60
bytes). (It's rare, but if you keep NFS running long enough it'll
happen.) If checksum offload is enabled, the chip will have to both
autopad the fragment and calculate its checksum header. This confuses
some revs of the 8169, causing the packet that appears on the wire
to be corrupted. (The IP addresses and the checksum field are mangled.)
This will cause the NFS write to fail. Unfortunately, when NFS retries,
it sends the same write request over and over again, and it keeps
failing, so NFS stays wedged.
(A simple way to provoke the failure is to connect the failing system
to a network with a known good machine and do "ping -s 1473 <badhost>"
from the good system. The ping will fail.)
Someone had previously worked around this using the heavy-handed
approahch of just disabling checksum offload. The correct fix is to
manually pad short frames where the TCP/IP stack has requested
checksum offloading. This allows us to have checksum offload turned
on by default but still let NFS work right.
- Not a bug, but change the ID strings for devices with hardware rev
0x30000000 and 0x38000000 to both be 8168B/8111B. According to RealTek,
they're both the same device, but 0x30000000 is an earlier silicon spin.
perform the reboot action via the reset register instead of our legacy
method. Default is 0 (use legacy). This is needed because some systems
hang on reboot even though they claim to support the reset register.
MFC after: 2 days
- fix "No sound in KDE":
The problem is related to the implementation of Envy24(1712) hardware
mixer support in the driver. Envy24(1712) has very precise 36bit wide
hardware mixer, which is superior that vchans (software sound mixer in
the kernel). The driver supports Envy24(1712) hardware mixer, so up to
10 channels (5 stereo pairs) can be playback simultaneously.
However, there are problems with the implementation of Envy24(1712)
hardware mixer support in the driver, one of them is the problem with
"no sound in KDE":
When playing back several channels simultaneously and
stoping one of the channels, sound starts to stutter and
plays at very low speed.
Another problem is:
Playing back simultaneously more than one 24bit/32bit
sound file or 16bit sound file and 24bit/32bit sound
file doesn't work as expected.
Submitted by: "Konstantin Dimitrov" <kosio.dimitrov@gmail.com>
poll (i.e. call read_char() method) slave keyboards.
This workaround should fix problem with kbdmux(4) and
atkbd(4) not working in ddb(4) and mid-boot.
MFC after: 1 week
by remembering a map used in bus_dmamap_load_mbuf_sg(9). I have
no idea how it could ever worked before.
This fixes a warning generated by a diagnostic check in sun4v
iommu driver.
Reported by: jb
Tested by: jb(sun4v)
space range per channel, but rather the unshifted range. The
shifting depends on the bus. The hardcoded shift was specific
to the SBus on sparc64. The shifted range is now determined at
run-time. This fixes the mac-io attachment.
Prevent casual modification by requiring hw.acpi.thermal.user_override to
be set first. Fix printing of negative temperatures in the K->C conversion.
Document the remaining thermal sysctls.
MFC after: 3 days
desired role configuration instead of existing role. This gets
us out of the mess where we configured a role of NONE (or were
LAN only, for example), but didn't continue to attach the CAM
module (because we had neither initiator nor target role
set). Unfortunately, the code that rewrites NVRAM to match
actual to desired role only works if the CAM module attaches.
MFC after: 2 weeks
controller ported from NetBSD. It supports the following Gigabit
Ethernet adapters.
o Antares Microsystems Gigabit Ethernet
o ASUS NX1101 Gigabit Ethernet
o D-Link DL-4000 Gigabit Ethernet
o IC Plus IP1000A Gigabit Ethernet
o Sundance ST-2021 Gigabit Ethernet
o Sundance ST-2023 Gigabit Ethernet
o Sundance TC9021 Gigabit Ethernet
o Tamarack TC9021 Gigabit Ethernet
The IP1000A Gigabit Ethernet is also found on some motherboards
(LOM) from ABIT.
Unlike NetBSD stge(4) it does not require promiscuous mode operation
to revice packet and it supports all hardware features(TCP/UDP/IP
checksum offload, VLAN tag stripping/insertion features and JUMBO
frame) and polling(4).
Due to lack of hardware, hardwares that have TBI trantransceivers
were not tested at all.
Special thanks to wpaul who provided valauble datasheet for the
controller and helped to debug jumbo frame related issues. Whitout
his datasheet I would have spent many hours to debug this chip.
Tested on: i386, sparc64
mac-io bus, we cannot setup FAST interrupt handlers. This because we
use spinlocks to protect the hardware and all interrupt resources are
assigned the same interrupt handler. When the interrupt handler is
invoked for interrupt X, it could be preempted for interrupt Y while
it was holding the lock (where X and Y are the interrupt resources
corresponding a single instance of this driver). This is a deadlock.
By only using a MPSAFE handler in that case we prevent preemption.
The register layout has changed since the original NV4 - sigh.
Hotplug support has been fixed for all nVidia chipsets that supports it
(including the MCP51/55).
HW donated by: Kingsley College
locked.
- Move all the svr4 socket cache code into svr4_socket.c, specifically
move svr4_delete_socket() over from streams.c. Make the socket cache
entry structure and svr4_head private to svr4_socket.c as a result.
- Add a mutex to protect the svr4 socket cache.
- Change svr4_find_socket() to copy the sockaddr_un struct into a
caller-supplied sockaddr_un rather than giving the caller a pointer to
our internal one. This removes the one case where code outside of
svr4_socket.c could access data in the cache.
- Add an eventhandler for process_exit and process_exec to purge the cache
of any entries for the exiting or execing process.
- Add methods to init and destroy the socket cache and call them from the
svr4 ABI module's event handler.
- Conditionally grab Giant around socreate() in streamsopen().
- Use fdclose() instead of inlining it in streamsopen() when handling
socreate() failure.
- Only allocate a stream structure and attach it to a socket in
streamsopen(). Previously, if a svr4 program performed a stream
operation on an arbitrary socket not opened via the streams device,
we would attach streams state data to it and change f_ops of the
associated struct file while it was in use. The latter was especially
not safe, and if a program wants a stream object it should open it via
the streams device anyway.
- Don't bother locking so_emuldata in the streams code now that we only
touch it right after creating a socket (in streamsopen()) or when
tearing it down when the file is closed.
- Remove D_NEEDGIANT from the streams device as it is no longer needed.
renegotiation, we only initialize the hardware only when it is
absolutely required. Process SIOCGIFADDR ioctl in em(4) when we know
an IPv4 address is added. Handling SIOCGIFADDR in a driver is
layering violation but it seems that there is no easy way without
rewritting hardware initialization code to reduce settle time after
reset.
This should fix a long standing bug which didn't send ARP packet when
interface address is changed or an alias address is added. Another
effect of this fix is it doesn't need additional delays anymore when
adding an alias address to the interface.
While I'm here add a new if_flags into softc which remembers current
prgroammed interface flags and make use of it when we have to program
promiscuous mode.
Tested by: Atanas <atanas AT asd DOT aplus DOT net>
Analyzed by: rwatson
Discussed with: -stable
- Copy ethernet firmware down in small chunks so as to avoid bugs
in early versions of the bootstrap firmware.
- Attempt to "adopt" the running firmware if we cannot load a suitable
firmware image via firmware(9).
- Separate firmware validation into its own routine, and check the
major/minor driver/firmware ABI version.
instead of doing the first load with the BUS_DMA_NOWAIT flag. On 4.x with
PAE and > 4gb of RAM this proved disastrous if there weren't enough bounce
pages as amr_mapcmd() would return failure but the callback would later
fire once enough bounce pages were available and would then overwrite
another command's S/G list.
MFC after: 3 days
Submitted by: scottl (4.x version)
Reviewed by: scottl (port from 4.x to HEAD)
precedence uart. With my last change, it became a tie, and uart seems
to always win on my amd64. This was not my intention, so have sio be
just a tiny bit more preferred than uart.
Note: I'm not making any judgement on the merits of uart winning. I'm
just saying that if we want to change it, we do it on purpose.
FreeBSD repository and to clean up the license header so as to
not pollute the license with file function.
Zero all mailbox structures prior to use (just in case). Change
the outgoing mailbox count for INIT_FIRMWARE to be correct.
from a semantic point of view, but I notified the author of the driver
for confirmation. So far it at least fixes the build and should only
lead to not identifying or wrongly identifying a soundcard in the worst
case.
mark it as timed out. Don't try and free the config
request for read_cfg_header that times out because
it's still active. Put in code for the config reply
handler that will then free up timed out requests.
Fix the FC_PRIMITIVE_SEND completion to not try
and free a command twice. Dunno how this possibly
could have been working for awhile.
MFC after: 2 weeks
out ELS buffers but *don't* hang out commands,
we hang folks on the SAN because the LSI-Logic
f/w apparently sends back BUSY or QFULL or some
darn thing.
If we add command buffers, we have to respond to
them sensibly even if we don't have any upstream
listeners (scsi_targ or scsi_targ_bh), so put in
some local command reponse stuff.
MFC after: 2 weeks
sound cards with optional pseudo-multichannel playback.
It's based on snd_emu10k1 sound driver. Single channel version is available
from audio/emu10kx port since some time.
The two new ALSA header files (GPLed), which contain Audigy 2 ("p16v") and
Audigy 2 Value ("p17v") specific interfaces, are latest versions from ALSA
Mercurial repository.
This is not connected to the build yet.
Submitted by: Yuriy Tsibizov <Yuriy.Tsibizov@gfk.ru>
latest version from Mercurial repository. It brings definition of some
additional Audigy 2 / Audigy 2 Value registers.
- Use new #defines from ALSA emu10k1.h
- Remove unused include files:
+ emu10k1-ac97.h was imported from ALSA and never used,
+ emu10k1.h was imported from Creative Linux emu10k1 driver, but only
AUDIGY_CODEBASE was used from it.
Submitted by: Yuriy Tsibizov <Yuriy.Tsibizov@gfk.ru>
forcing all transfers to do the start read/write stop by hand. Some
smart bridges prefer this sort of operation, and this allows us to
support their features more easily. When bridges don't support it, we
fall back to using the old-style opertaions. Expand the ioctl
interface to expose this function. Unlike the old-style interface,
this interface is thread safe, even on old bridges.
Add MEMORY_BARRIER for the few scratch dma ops that were missing
them plus add a couple of hi 32 bit dma ops (we could probably
allow 64 bit scratch and request/response queue dma now).
install custom pager functions didn't actually happen in practice (they
all just used the simple pager and passed in a local quit pointer). So,
just hardcode the simple pager as the only pager and make it set a global
db_pager_quit flag that db commands can check when the user hits 'q' (or a
suitable variant) at the pager prompt. Also, now that it's easy to do so,
enable paging by default for all ddb commands. Any command that wishes to
honor the quit flag can do so by checking db_pager_quit. Note that the
pager can also be effectively disabled by setting $lines to 0.
Other fixes:
- 'show idt' on i386 and pc98 now actually checks the quit flag and
terminates early.
- 'show intr' now actually checks the quit flag and terminates early.
actually go write the config page. This fixes the long standing
problem about updating NVRAM on Fibre Channel cards and seems
so far to not break SPI config page writes.
Put back role setting into mpt. That is, you can set a desired role
for mpt as a hint. On the next reboot, it'll pick that up and redo
the NVRAM settings appropriately and warn you that this won't take
effect until the next reboot. This saves people the step of having
to find a BIOS utilities disk to set target and/or initiator role
for the MPT cards.
significantly reduces booting time when there is broken floppy disk drive,
controller, cable, BIOS, etc.
When the floppy controller interface is correctly implemented, disk change
signal (DSKCHG) is reflected in the Digital Input Register (DIR) at 0x3f7.
However, there are many cases that the signal is unusable. Moreover, some
BIOS does not reserve the port at all. In those cases, the register may not
function.
loading for the QLogic cards.
Because isp(4) exists before the root is mounted, it's not really
possible for us to use the kernel's linker to load modules directly
from disk- that's really too bad.
However, the this is still a net win in in that the firmware has
been split up on a per chip (and in some cases, functionality)
basis, so the amount of stuff loaded *can* be substantially less
than the 1.5MB of firmware images that ispfw now manages. That is,
each specific f/w set is now also built as a module. For example,
QLogic 2322 f/w is built as isp_2322.ko and Initiator/Target 1080
firmware is built as isp_1080_it.ko.
For compatibility purposes (i.e., to perturb folks the least), we
also still build all of the firmware as one ispfw.ko module.
This allows us to let 'ispfw_LOAD' keep on working in existing
loader.conf files. If you now want to strip this down to just
the firmware for your h/w, you can then change loader.conf to
load the f/w you specifically want.
We also still allow for ispfw to be statically built (e.g., for
PAE and sparc64).
Future changes will look at f/w unloading and also role switching
that then uses the kernel linker to load different ips f/w sets.
MFC after: 2 months
Use it to reset controller and to select data rate. According to Intel
80277AA datasheet, software reset behaves the same as DOR reset except
that it is self clearing. National Semiconductor PC8477B datasheet says
the same. As a side effect, we no longer use Configuration Control
Register (CCR) at 0x3f7 for these controllers, which is often missing
in modern hardware.
(and by extension, the 2422).
One peculiar thing I've found with the 2322 is that if you
don't force it to do Hard LoopID acquisition, the firmware
crashes. This took a while to figure out.
While we're at it, fix various bugs having to do with NVRAM
reading and option setting with respect to pieces of NVRAM.
is never taken since there aren't any 802.11a ural(4) sticks available
on the market.
PR: kern/99676
Submitted by: KIYOHARA Takashi
Reviewed by: damien
MFC after: 1 week
tree... John Baldwin noted that sio might pass values between probe
and attach via softc. It appears that sio does leave the hardware in
a known state after probing, so other drivers that try to probe might
leave it in a worse state. It doesn't seem to pass any data in softc,
however, that I could find... I think we should not be probing for
anything but nonPnP isa, but that's a change for another day.
Submitted by: Frank Behrens
PR: 87845
cards: the chips are all marked "RTL8111B", but they put stickers on the
back that say "RTL8168B/8111B". The manual says there's only one HWREV code
for both the 8111B and 8168B devices, which is 0x30000000, but the cards
they sent me actually report HWREV of 0x38000000. Deciding to trust the
hardware in front of me rather than a possibly incorrect manual (it wouldn't
be the first time the HWREVs were incorrectly documented), I changed the
8168 revision code. It turns out this was a mistake though: 0x30000000
really is a valid for the 8168.
There are two possible reasons for there to be two different HWREVs:
1) 0x30000000 is used only for the 8168B and 0x38000000 is only for
the 8111B.
2) There were 8111/8168 rev A devices which both used code 0x30000000,
and the 8111B/8168B both use 0x38000000.
The product list on the RealTek website doesn't mention the existence of
any 8168/8111 rev A chips being in production though, and I've never seen
one, so until I get clarification from RealTek, I'm going to assume that
0x30000000 is just for the 8168B and 0x38000000 is for the 8111B only.
So, the HWREV code for the 8168 has been put back to 0x30000000,
a new 8111 HWREV code has been added, and there are now separate
entries for recognizing both devices in the device list. This will
allow all devices to work, though if it turns out I'm wrong I may
need to change the ID strings
BCM5787 based NICs.
- Recognize BCM5703 B0 ASIC.
- Rewrite the jumbo capability matching macro, so that chips known
to work are listed there. [*]
[*] I'm still not sure about this. Probably more corrections
will be done to this macro after discussion with davidch@
and brad@OpenBSD.
Obtained from: OpenBSD (brad)
