Commit Graph

5360 Commits

Author SHA1 Message Date
Alexander Motin
1ecff35a6b Use value -1 instead of 0 for marking unused APIC vectors. This fixes
IRQ0 routing on LAPIC-enabled systems.

Add hint.apic.0.clock tunable. Setting it 0 disables using LAPIC timers
as hard-/stat-/profclock sources falling back to using i8254 and rtc timers.

On modern CPUs LAPIC is a part of CPU core which is shutting down when CPU
enters C3 or deeper power state. It makes no problems for interrupt
processing, as chipset wakes up CPU on interrupt triggering. But entering
C3 state kills LAPIC timer and freezes system time, making C3 and deeper
states practically unusable. Using i8254 timer allows to avoid this
problem.

By using i8254 timer my T7700 C2D CPU with UP kernel successfully enters
C3 state, saving more then a Watt of total idle power (>10%) in addition to
all other power-saving techniques.

This technique is not working for SMP yet, as only one CPU receives
timer interrupts. But I think that problem could be fixed by forwarding
interrupts to other CPUs with IPI.
2009-05-01 17:05:49 +00:00
Dmitry Chagin
79262bf1f0 Reimplement futexes.
Old implemention used Giant to protect the kernel data structures,
but at the same time called malloc(M_WAITOK), that could cause the
calling thread to sleep and lost Giant protection. User-visible
result was the missed wakeup.

New implementation uses one sx lock per futex. The sx protects
the futex structures and allows to sleep while copyin or copyout
are performed.

Unlike linux, we return EINVAL when FUTEX_CMP_REQUEUE operation
is requested and either caller specified futexes are equial or
second futex already exists. This is acceptable since the situation
can only occur from the application error, and glibc falls back to
old FUTEX_WAKE operation when FUTEX_CMP_REQUEUE returns an error.

Approved by:	kib (mentor)
MFC after:	1 month
2009-05-01 15:36:02 +00:00
Jung-uk Kim
788399cbd9 - Fix divide-by-zero panic when SMP kernel is used on UP system[1].
- Avoid possible divide-by-zero panic on SMP system when the CPUID is
disabled, unsupported, or buggy.

Submitted by:	pluknet (pluknet at gmail dot com)[1]
2009-04-30 22:10:04 +00:00
Jeff Roberson
82fcb0f192 - Add support for cpuid leaf 0xb. This allows us to determine the
topology of nehalem/corei7 based systems.
 - Remove the cpu_cores/cpu_logical detection from identcpu.
 - Describe the layout of the system in cpu_mp_announce().

Sponsored by:   Nokia
2009-04-29 06:54:40 +00:00
John Baldwin
10395e0714 Reduce the number of bounce zones (and thus the number of bounce pages
used in some cases):
- Ignore DMA tag boundaries when allocating bounce pages.  The boundaries
  don't determine whether or not parts of a DMA request bounce.  Instead,
  they are just used to carve up segments.
- Allow tags with sub-page alignment to share bounce pages since bounce
  pages are always page aligned.

Reviewed by:	scottl (amd64)
MFC after:	1 month
2009-04-23 20:24:19 +00:00
John Baldwin
125f11d360 Adjust the way we number CPUs on x86 so that we attempt to "group" all
logical CPUs in a package.  We do this by numbering the non-boot CPUs
by starting with the first CPU whose APIC ID is after the boot CPU and
wrapping back around to APIC ID 0 if needed rather than always starting
at APIC ID 0.  While here, adjust the cpu_mp_announce() routine to list
CPUs based on the mapping established by assign_cpu_ids() rather than
making assumptions about the algorithm assign_cpu_ids() uses.

MFC after:	1 month
2009-04-22 21:40:37 +00:00
Robert Watson
9725389e1e Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing
a fair number of static data structures, making this an unlikely
option to try to change without also changing source code. [1]

Change default cache line size on ia64, sparc64, and sun4v to 128
bytes, as this was what rtld-elf was already using on those
platforms. [2]

Suggested by:	bde [1], jhb [2]
MFC after:	2 weeks
2009-04-20 12:59:23 +00:00
Robert Watson
22037b2d2c Add description and cautionary note regarding CACHE_LINE_SIZE.
MFC after:	2 weeks
Suggested by:	alc
2009-04-19 21:26:36 +00:00
Robert Watson
a93fa8f2bb For each architecture, define CACHE_LINE_SHIFT and a derived
CACHE_LINE_SIZE constant.  These constants are intended to
over-estimate the cache line size, and be used at compile-time
when a run-time tuning alternative isn't appropriate or
available.

Defaults for all architectures are 64 bytes, except powerpc
where it is 128 bytes (used on G5 systems).

MFC after:	2 weeks
Discussed on:   arch@
2009-04-19 20:19:13 +00:00
Kip Macy
34b07340ff - Import infrastructure for caching flows as a means of accelerating L3 and L2 lookups
as well as providing stateful load balancing when used with RADIX_MPATH.
- Currently compiled in to i386 and amd64 but disabled by default, it can be enabled at
  runtime with 'sysctl net.inet.flowtable.enable=1'.

- Embedded users can remove it entirely from the kernel by adding 'nooption FLOWTABLE' to
  their kernel config files.

- A minimal hookup will be added to ip_output in a subsequent commit. I would like to see
  more review before bringing in changes that require more churn.

Supported by: Bitgravity Inc.
2009-04-19 00:16:04 +00:00
John Baldwin
842f11bef6 Restore bus DMA bounce pages to an offset of 0 when they are released by
a tag that has BUS_DMA_KEEP_PG_OFFSET set.  Otherwise the page could be
reused with a non-zero offset by a tag that doesn't have
BUS_DMA_KEEP_PG_OFFSET leading to data corruption.

Sleuthing by:	avg
Reviewed by:	scottl
2009-04-17 13:22:18 +00:00
Marcel Moolenaar
6ad9a99f21 Add a compat option to the EBR scheme that controls the
naming of the partitions (GEOM_PART_EBR_COMPAT).  When
compatibility is enabled, changes to the partitioning are
disallowed.

Remove the device name aliasing added previously to provide
backward compatibility, but which in practice doesn't give
us anything.

Enable compatibility on amd64 and i386.
2009-04-15 22:38:22 +00:00
Jung-uk Kim
cebe9dc98a A simple rewrite of biossmap.c:
- Do not iterate int 15h, function e820h twice.  Instead, we use STAILQ to
store each return buffer and copy all at once.
- Export optional extended attributes defined in ACPI 3.0 as separate
metadata.  Currently, there are only two bits defined in the specification.
For example, if the descriptor has extended attributes and it is not
enabled, it has to be ignored by OS.  We may implement it in the kernel
later if it is necessary and proven correct in reality.
- Check return buffer size strictly as suggested in ACPI 3.0.

Reviewed by:	jhb
2009-04-15 17:31:22 +00:00
Konstantin Belousov
3feb57a0a8 The bus_dmamap_load_uio(9) shall use pmap of the thread recorded in the
uio_td to extract pages from, instead of unconditionally use kernel
pmap.

Submitted by:	Jason Harmening <jason.harmening gmail com> (amd64 version)
PR:	amd64/133592
Reviewed by:	scottl (original patch), jhb
MFC after:	2 weeks
2009-04-13 19:20:32 +00:00
Ed Schouten
e1048f7678 Simplify in/out functions (for i386 and AMD64).
Remove a hack to generate more efficient code for port numbers below
0x100, which has been obsolete for at least ten years, because GCC has
an asm constraint to specify that.

Submitted by:	Christoph Mallon <christoph mallon gmx de>
2009-04-11 14:01:01 +00:00
Jack F Vogel
b698ab40c8 Add ixgbe to the GENERIC amd64 kernel in place of the
older ixgb driver. I will add to other architectures
after this one proves trouble free.

MFC after:	2 weeks
2009-04-10 00:40:48 +00:00
Ed Schouten
2c97d32a81 Also remove the unused __word_swap_int*() macros.
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2009-04-08 19:10:20 +00:00
Ed Schouten
17cfde3df4 Implement __bswap16() without using inline assembly.
Most compilers nowadays (including GCC) are smart enough to know what's
going on and generate more efficient code anyway.

Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2009-04-08 19:06:47 +00:00
Ed Schouten
db26a6714a Don't explicitly force ecx to be used for MSR_FSBASE/MSR_GSBASE.
Because the "c" input constaint is used, the compiler will already place
the MSR_FSBASE/MSR_GSBASE constants in ecx. Using __asm("ecx") makes
LLVM crash. Even though this is also an LLVM bug, we'd better remove the
unnecessary GCCism as well.

Submitted by:	Christoph Mallon <christoph.mallon@gmx.de>
2009-04-07 19:31:36 +00:00
Dmitry Chagin
cd899aad76 Fix KBI breakage by r190520 which affects older linux.ko binaries:
1) Move the new field (brand_note) to the end of the Brandinfo structure.
2) Add a new flag BI_BRAND_NOTE that indicates that the brand_note pointer
   is valid.
3) Use the brand_note field if the flag BI_BRAND_NOTE is set and as old
   modules won't have the flag set, so the new field brand_note would be
   ignored.

Suggested by:	jhb
Reviewed by:	jhb
Approved by:	kib (mentor)
MFC after:	6 days
2009-04-05 09:27:19 +00:00
Jung-uk Kim
6d6dd74911 Reduce code duplcations from r190620. While I am here, tweak a comment. 2009-04-02 01:46:57 +00:00
Jung-uk Kim
c8b7d7f4bf Chase GDT layout changes and unbreak suspend/resume on amd64. 2009-04-02 00:23:56 +00:00
Jung-uk Kim
4ec2a29f12 Garbage collect unused MSR_GSBASE since r190620.
The only consumer was exception.S and specialreg.h is directly included now.
Note no md5 changes were observed for all assym.s consumers with this.
2009-04-01 18:36:34 +00:00
Jung-uk Kim
4a608e44b5 Garbage collect unused stack segment since r190620. 2009-04-01 16:24:24 +00:00
Konstantin Belousov
7496ce7d74 Sync definitions for struct sigcontext for i386 and amd64 architectures
to struct mcontext.
2009-04-01 13:44:28 +00:00
Konstantin Belousov
2c66cccab7 Save and restore segment registers on amd64 when entering and leaving
the kernel on amd64. Fill and read segment registers for mcontext and
signals. Handle traps caused by restoration of the
invalidated selectors.

Implement user-mode creation and manipulation of the process-specific
LDT descriptors for amd64, see sysarch(2).

Implement support for TSS i/o port access permission bitmap for amd64.

Context-switch LDT and TSS. Do not save and restore segment registers on
the context switch, that is handled by kernel enter/leave trampolines
now. Remove segment restore code from the signal trampolines for
freebsd/amd64, freebsd/ia32 and linux/i386 for the same reason.

Implement amd64-specific compat shims for sysarch.

Linuxolator (temporary ?) switched to use gsbase for thread_area pointer.

TODO:
Currently, gdb is not adapted to show segment registers from struct reg.
Also, no machine-depended ptrace command is added to set segment
registers for debugged process.

In collaboration with:	pho
Discussed with:	peter
Reviewed by:	jhb
Linuxolator tested by:	dchagin
2009-04-01 13:09:26 +00:00
Konstantin Belousov
c11d6143ca Add separate gdt descriptors for %fs and %gs on amd64.
Reorder amd64 gdt descriptors so that user-accessible selectors are the
same as on i386. At least Wine hard-codes this into the binary.

In collaboration with:	pho
Reviewed by:	jhb
2009-04-01 12:53:01 +00:00
Konstantin Belousov
59aff0f894 Fully enumerate all i386 sysarch commands an amd64 include file.
Provides i386/freebsd API-compatible definitions for the argument
structures of the above sysarch commands. struct i386_ioperm_args
definition is ABI-compatible.

In collaboration with:	pho
Reviewed by:	jhb
2009-04-01 12:48:17 +00:00
Konstantin Belousov
0cdf4ffabc Add all segment registers for the amd64 CPU to struct reg and mcontext.
To keep these structures ABI-compatible, half the size of r_trapno,
r_err, mc_trapno, mc_flags.

Add fsbase and gsbase to mcontext on both amd64 and i386.
Add flags to amd64 mcontext to indicate that it contains valid segments
or bases.

In collaboration with:	pho
Discussed with:	peter
Reviewed by:	jhb
2009-04-01 12:44:17 +00:00
Konstantin Belousov
49c9cff881 Provide convenient definition of the union descriptor, similar to the
i386 one. Fully enumerate system segments and gate types.

In collaboration with:	pho
Reviewed by:	jhb
2009-04-01 12:31:04 +00:00
Jung-uk Kim
4e4ce82e0a Fix an uninitialized variable from the previous commit. 2009-03-31 21:14:05 +00:00
Jung-uk Kim
938608cb45 Probe size of installed memory modules from loader and display it
as 'real memory' instead of Maxmem if the value is available.
Note amd64 displayed physmem as 'usable memory' since machdep.c r1.640
to unconfuse users.  Now it is consistent across amd64 and i386 again.
While I am here, clean up smbios.c a bit and update copyright date.

Reviewed by:	jhb
2009-03-31 21:02:55 +00:00
Doug Ambrisko
0af7103533 Revert 190445 change to this file restoring:
typedef l_long          l_off_t;
Change l_mmap_argv's to l_ulong for pgoff.  This restores prior behaviour
to consumers of l_off_t but allows mmap to mmap a 32bit position which a
Linux application requires to access SMBIOS data via /dev/mem.

Reviewed by:	dchagin
Prompted by:	rdivacky
2009-03-27 17:00:49 +00:00
Konstantin Belousov
49d008d916 Convert gdt_segs and ldt_segs initialization to C99 style.
Reviewed by:	jhb
2009-03-26 18:07:13 +00:00
Doug Ambrisko
d2b2128a28 Add stuff to support upcoming BMC/IPMI flashing of newer Dell machine
via the Linux tool.
     -  Add Linux shim to ipmi(4)
     -  Create a partitions file to linprocfs to make Linux fdisk see
        disks.  This file is dynamic so we can see disks come and go.
     -  Convert msdosfs to vfat in mtab since Linux uses that for
        msdosfs.
     -  In the Linux mount path convert vfat passed in to msdosfs
        so Linux mount works on FreeBSD.  Note that tasting works
        so that if da0 is a msdos file system
                /compat/linux/bin/mount /dev/da0 /mnt
        works.
     -  fix a 64it bug for l_off_t.
Grabing sh, mount, fdisk, df from Linux, creating a symlink of mtab to
/compat/linux/etc/mtab and then some careful unpacking of the Linux bmc
update tool and hacking makes it work on newer Dell boxes.  Note, probably
if you can't figure out how to do this, then you probably shouldn't be
doing it :-)
2009-03-26 17:14:22 +00:00
John Baldwin
b9dda9d6fe Fix a few nits in the earlier changes to prevent local information leakage
in AMD FPUs:
- Do not clear the affected state in the case that the FPU registers for
  the thread that already owns the FPU are changed via fpu_setregs().  The
  only local information the thread would see is its own state in that
  case.
- Fix a type mismatch for the dummy variable used in a "fld".  It accepts
  a float, not a double.

Reviewed by:	bde
Approved by:	so (cperciva)
MFC after:	1 month
2009-03-25 22:08:30 +00:00
John Baldwin
63de9515b7 Rename (fpu|npx)_cleanstate to (fpu|npx)_initialstate to better reflect
their purpose.

Inspired by:	bde
MFC after:	1 month
2009-03-25 14:17:08 +00:00
John Baldwin
6cad8eb41d Fall back to using configuration type 1 accesses for PCI config requests if
the requested PCI bus falls outside of the bus range given in the ACPI
MCFG table.  Several BIOSes seem to not include all of the PCI busses in
systems in their MCFG tables.  It maybe that the BIOS is simply buggy and
does support all the busses, but it is more conservative to just fall back
to the old method unless it is certain that memory accesses will work.
2009-03-24 18:10:22 +00:00
Jung-uk Kim
d2b227cd49 - Clean up suspend/resume code for amd64.
- Call acpi_resync_clock() to reset system time before hardclock is ready
to tick.  Note we assume the current timecounter hardware and RTC are
already available for read operation.

Tested by:	mav
2009-03-23 22:35:30 +00:00
Alan Cox
b4862e19af Update stale comments. The alternate address space mapping was eliminated
when PAE support was added to i386.  The direct mapping exists on amd64.
2009-03-22 18:56:26 +00:00
Alan Cox
0c645b7267 In general, the kernel virtual address of the pml4 page table page that is
stored in the pmap is from the direct map region.  The two exceptions have
been the kernel pmap and the swapper's pmap.  These pmaps have used a
kernel virtual address established by pmap_bootstrap() for their shared
pml4 page table page.  However, there is no reason not to use the direct
map for these pmaps as well.
2009-03-22 04:32:05 +00:00
Alan Cox
9624b51a0e Eliminate the recomputation of pcb_cr3 from cpu_set_upcall(). The
bcopy()ed value from the old thread is the correct value because the new
thread and the old thread will share a page table.
2009-03-22 02:33:48 +00:00
Andrew Thompson
2b78d30630 Remove the uscanner(4) driver, this follows the removal of the kernel scanner
driver in Linux 2.6. uscanner was just a simple wrapper around a fifo and
contained no logic, the default interface is now libusb (supported by sane).

Reviewed by:	HPS
2009-03-19 20:33:26 +00:00
Konstantin Belousov
a4f2b2b0c6 Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointer
to the full path of the image that is being executed.
Increase AT_COUNT.

Remove no longer true comment about types used in Linux ELF binaries,
listed types contain FreeBSD-specific entries.

Reviewed by:	kan
2009-03-17 12:50:16 +00:00
Jung-uk Kim
c66d2b38c8 Initial suspend/resume support for amd64.
This code is heavily inspired by Takanori Watanabe's experimental SMP patch
for i386 and large portion was shamelessly cut and pasted from Peter Wemm's
AP boot code.
2009-03-17 00:48:11 +00:00
Dmitry Chagin
6465d2d9d2 Chase the k8temp->amdtemp rename in NOTES and loader.conf.
Approved by:	kib (mentor)
2009-03-16 10:36:24 +00:00
Alan Cox
3b2dc2ac52 Update the pmap's resident page count when a page table page is freed in
pmap_remove_pde() and pmap_remove_pages().

MFC after:	6 weeks
2009-03-14 08:28:02 +00:00
Alan Cox
957939b503 Correct accounting errors in _pmap_allocpte(). Specifically, the pmap's
resident page count and the global wired page count were not correctly
maintained when page table page allocation failed.

MFC after:	6 weeks
2009-03-14 05:33:09 +00:00
Dmitry Chagin
32c01de21c Implement new way of branding ELF binaries by looking to a
".note.ABI-tag" section.

The search order of a brand is changed, now first of all the
".note.ABI-tag" is looked through.

Move code which fetch osreldate for ELF binary to check_note() handler.

PR:		118473
Approved by:	kib (mentor)
2009-03-13 16:40:51 +00:00
Doug Rabson
1267802438 Merge in support for Xen HVM on amd64 architecture. 2009-03-11 15:30:12 +00:00
Alan Cox
802e54dc1f Optimize the inner loop of pmap_copy().
MFC after:	6 weeks
2009-03-11 14:55:04 +00:00
Alan Cox
280db2a6f5 Eliminate the last use of the recursive mapping to access user-space page
table pages.  Now, all accesses to user-space page table pages are
performed through the direct map.  (The recursive mapping is only used
to access kernel-space page table pages.)

Eliminate the TLB invalidation on the recursive mapping when a user-space
page table page is removed from the page table and when a user-space
superpage is demoted.
2009-03-10 02:12:03 +00:00
Robert Watson
6f63bf4edf Trim comments about the MP-safety of various bits of the amd64/i386
system call entry path and i386 IP checksum generation: we now assume
all code is MPSAFE unless explicitly marked otherwise.  Remove XXX
Giant comments along similar lines: the code by the comments either
doesn't need or doesn't want Giant (especially the NMI handler).

MFC after:	3 days
2009-03-09 13:11:16 +00:00
Alan Cox
6ec7df4a08 Change pmap_enter_quick_locked() so that it uses the kernel's direct map
instead of the pmap's recursive mapping to access the lowest level of the
page table when it maps a user-space virtual address.
2009-03-09 03:35:25 +00:00
Maxim Sobolev
feb593d215 Small comment nit: "run time" -> "run-time".
Submitted by:	rwatson
2009-03-08 05:01:39 +00:00
Andrew Thompson
663963b1d2 Reenable ndis in the LINT build now that it has been updated for USB. Thanks to
HPS and Weongyo.
2009-03-07 19:54:30 +00:00
Alan Cox
767a6e258b If the PDE is known, then use the direct mapping instead of the recursive
mapping to access the PTE.
2009-03-06 17:40:58 +00:00
John Baldwin
2ee8325f42 A better fix for handling different FPU initial control words for different
ABIs:
- Store the FPU initial control word in the pcb for each thread.
- When first using the FPU, load the initial control word after restoring
  the clean state if it is not the standard control word.
- Provide a correct control word for Linux/i386 binaries under
  FreeBSD/amd64.
- Adjust the control word returned for fpugetregs()/npxgetregs() when a
  thread hasn't used the FPU yet to reflect the real initial control
  word for the current ABI.
- The Linux/i386 ABI for FreeBSD/i386 now properly sets the right control
  word instead of trashing whatever the current state of the FPU is.

Reviewed by:	bde
2009-03-05 19:42:11 +00:00
Alan Cox
cc7d8aabd1 Make pmap_copy() more TLB friendly. Specifically, make it use the kernel's
direct map instead of the pmap's recursive mapping to access the lowest
level in the page table.

MFC after:	6 weeks
2009-03-05 18:11:26 +00:00
John Baldwin
a8346a9865 A few cleanups to the FPU code on amd64:
- fpudna() always returned 1 since amd64 CPUs always have FPUs.  Change
  the function to return void and adjust the calling code in trap() to
  assume the return 1 case is the only case.
- Remove fpu_cleanstate_ready as it is always true when it is tested.
  Also, only initialize fpu_cleanstate when fpuinit() is called on the BSP.

Reviewed by:	bde
2009-03-05 16:56:16 +00:00
John Baldwin
9edc34f864 Move the PCB flag macros up next to the 'pcb_flags' member in the struct. 2009-03-05 16:52:50 +00:00
John Baldwin
b25fc07f53 At least one BIOS bogusly includes duplicate entries for I/O APICs. The
bogus entries have a starting IRQ that is invalid (> 255, so won't fit
into a PCI intline config register).  It had the side effect of breaking
MSI by "claiming" several IRQs in the MSI range.  Fix this by ignoring such
I/O APICs.

MFC after:	2 weeks
2009-03-05 16:03:44 +00:00
Dmitry Chagin
4d7c2e8a48 Add AT_PLATFORM, AT_HWCAP and AT_CLKTCK auxiliary vector entries which
are used by glibc. This silents the message "2.4+ kernel w/o ELF notes?"
from some programs at start, among them are top and pkill.

Do the assignment of the vector entries in elf_linux_fixup()
as it is done in glibc.

Fix some minor style issues.

Submitted by:	Marcin Cieslak <saper at SYSTEM PL>
Approved by:	kib (mentor)
MFC after:	1 week
2009-03-04 12:14:33 +00:00
Konstantin Belousov
2883703e00 Use the p_sysent->sv_flags flag SV_ILP32 to detect 32bit process
executing on 64bit kernel. This eliminates the direct comparisions
of p_sysent with &ia32_freebsd_sysvec, that were left intact after
r185169.
2009-03-02 18:43:50 +00:00
Maxim Sobolev
df86dcaf67 Fix typo in comments in r189023. 2009-02-25 22:24:56 +00:00
Jung-uk Kim
a4079bfb74 Enable support for PAT_WRITE_PROTECTED and PAT_UNCACHED cache modes
unconditionally on amd64.  On i386, we assume PAT is usable if the CPU
vendor is not Intel or CPU model is newer than Pentium IV.

Reviewed by:	alc, jhb
2009-02-25 20:26:48 +00:00
Maxim Sobolev
e0bc0fad3d Make machdep.hyperthreading_enabled tunable working with the SCHED_ULE.
Unlike with SCHED_BSD, however, it can only be set to 0 at boot time,
it's not possible to change it at runtime.

Reviewed by:	jhb
MFC after:	1 month
2009-02-25 01:49:01 +00:00
Andrew Thompson
1f4963cb16 These are no longer needed. 2009-02-24 23:27:59 +00:00
Andrew Thompson
211211de83 Exclude ndis from the LINT build as it currently breaks the build, patches to
move to the new usb stack are in progress.
2009-02-24 00:39:48 +00:00
Andrew Thompson
c89d41e5ff Change over the usb kernel options to the new stack (retaining existing
naming). The old usb stack can be compiled in my prefixing the name with 'o'.
2009-02-23 18:34:56 +00:00
John Baldwin
0b7dc0a7c6 Some whitespace and style fixes.
Submitted by:	bde (partly)
2009-02-23 15:39:24 +00:00
Alan Cox
6d65f2fa57 Optimize free_pv_entry(); specifically, avoid repeated TAILQ_REMOVE()s.
MFC after:	1 week
2009-02-23 06:00:24 +00:00
Jeff Roberson
35d8de82c4 - Resolve an issue where we may clear an idt while an interrupt on a
different cpu is still assigned to that vector by never clearing idt
   entries.  This was only provided as a debugging feature and the bugs
   are caught by other means.
 - Drop the sched lock when rebinding to reassign an interrupt vector
   to a new cpu so that pending interrupts have a chance to be delivered
   before removing the old vector.

Discussed with:	tegge, jhb
2009-02-21 23:15:34 +00:00
Konstantin Belousov
99b7f1a10b Adapt linux emulation to use cv for vfork wait.
Submitted by:	Takahiro Kurosawa <takahiro.kurosawa gmail com>
PR:	kern/131506
2009-02-18 16:11:39 +00:00
Andrew Thompson
e31a070263 Add uslcom to the build too.
Reminded by:	Michael Butler
2009-02-15 23:40:29 +00:00
Andrew Thompson
e4edc14efd Switch over GENERIC kernels to USB2 by default.
Tested by:	make universe
2009-02-15 22:33:44 +00:00
Alan Cox
6be00eca3f Remove unnecessary page queues locking around vm_page_busy() and
vm_page_wakeup().  (This change is applicable to RELENG_7 but not
RELENG_6.)

MFC after:	1 week
2009-02-14 18:23:52 +00:00
Marcel Moolenaar
91e1be8baf Add option GEOM_PART_EBR by default on amd64 and i386. 2009-02-10 00:08:39 +00:00
Olivier Houchard
96c7367b9e The bounce zone sees its page number increased if multiple dma maps use it in
the same dma tag. However, it can happen multiple dma tags share the same
bounce zone too, so add a per-bounce zone map counter, and check it instead of
the dma tag map counter, to know if we have to alloc more pages.

Reported by:	miwi
Reviewed by:	scottl
2009-02-09 18:03:31 +00:00
Warner Losh
047e5fdabc When bouncing pages, allow a new option to preserve the intra-page
offset.  This is needed for the ehci hardware buffer rings that assume
this behavior.

This is an interim solution, and a more general one is being worked
on.  This solution doesn't break anything that doesn't ask for it
directly.  The mbuf and uio variants with this flag likely don't work
and haven't been tested.

Universe builds with these changes.  I don't have a huge-memory
machine to test these changes with, but will be happy to work with
folks that do and hps if this changes turns out not to be sufficient.

Submitted by:	alfred@ from Hans Peter Selasky's original
2009-02-08 22:54:58 +00:00
Warner Losh
3282e64ac0 Companion for r188301: fix the prototypes. 2009-02-08 07:03:34 +00:00
Warner Losh
d9d53b2a54 Correct parameter types for pcib_{read,write}_config by fixing the
protptyoes for the legacy_* impelemtnations of these kobj methods.
2009-02-08 07:02:42 +00:00
Wojciech A. Koszek
c4ce3ea6eb Tidy NOTES a bit:
- remove misleading nve/nfe comments, which make it hard to
  distinguish those two at a first glance
- bring pbio documentation to the block comment together with
  other drivers

I also brought commented out line responsible for si(4), since it
seems to compile and already has respective comment in this file.
2009-02-07 00:01:10 +00:00
Wojciech A. Koszek
bc4c1ddaf9 ural(4) is already present in global NOTES, thus there is no
need to explicitly list it here once again. This removes:

	WARNING: duplicate option `DEV_URAL' encountered.
	WARNING: duplicate device `ural' encountered.

Warnings when compiling LINT on amd64.
2009-02-06 21:56:55 +00:00
Wojciech A. Koszek
c353491ad3 Fix AGP debugging code:
- correct format strings
- fill opt_agp.h if AGP_DEBUG is defined
- bring AGP_DEBUG to LINT by mentioning it in NOTES

This should hopefully fix a warning that was...

Found by:	Coverity Prevent(tm)
CID:		3676
Tested on:	amd64, i386
2009-02-06 20:57:10 +00:00
Joseph Koshy
bb471e3315 Improve robustness of NMI handling, for NMIs recognized in kernel
mode.

- Make the NMI handler run on its own stack (TSS_IST2).
- Store the GSBASE value for each CPU just before the start of
  each NMI stack, permitting efficient retrieval using %rsp-relative
  addressing.
- For NMIs taken from kernel mode, program MSR_GSBASE explicitly
  since one or both of MSR_GSBASE and MSR_KGSBASE can be potentially
  invalid.  The current contents of MSR_GSBASE are saved and restored
  at exit.
- For NMIs handled from user mode, continue to use 'swapgs' to
  load the per-CPU GSBASE.

Reviewed by:	jeff
Debugging help:	jeff
Tested by:	gnn, Artem Belevich <artemb at gmail dot com>
2009-02-03 09:01:45 +00:00
David E. O'Brien
d065e13dc2 Fix the inconsistent tabbing.
Noticed by:	bde
2009-01-31 20:46:01 +00:00
David E. O'Brien
e6493bbebf Change some movl's to mov's. Newer GAS no longer accept 'movl' instructions
for moving between a segment register and a 32-bit memory location.

Looked at by:	jhb
2009-01-31 11:37:21 +00:00
Jeff Roberson
9c8e8e3aa7 - Allocate apic vectors on a per-cpu basis. This allows us to allocate
more irqs as we have more cpus.  This is principally useful on systems
   with msi devices which may want many irqs per-cpu.

Discussed with:	jhb
Sponsored by:	Nokia
2009-01-29 09:22:56 +00:00
John Baldwin
de43ac6044 Use a different value for the initial control word for the FPU state for
32-bit processes.  The value matches the initial setting used by
FreeBSD/i386.  Otherwise, 32-bit binaries using floating point would use
a slightly different initial state when run on FreeBSD/amd64.

MFC after:	1 week
2009-01-28 20:35:16 +00:00
Jung-uk Kim
b11e7979ac VIA Nano processor has a special MSR (CENT_HARDWARECTRL3) bit 32 to determine
whether TSC is P-state invariant or not.  In fact, this MSR is writable but
we just leave it at the BIOS default for now.
2009-01-22 21:04:46 +00:00
Konstantin Belousov
5c0c22e92e The context switch to the 32bit binary does not properly restore
the fsbase value. The switch loads the fs segment register, that
invalidates the value in fsbase msr, thus value in %r9 can not be
considered the current value for fsbase anymore.

Unconditionally reload fsbase when switching to 32bit binary.

PR:	130526
MFC after:	3 weeks
2009-01-20 12:07:49 +00:00
Maxim Sobolev
9cfe40d9fa Take NTFS option out to match i386 GENERIC.
Suggested by:	phk, luigi
2009-01-19 15:33:06 +00:00
Maxim Sobolev
4d598bc1de asr(4) is not amd64-clean, not amr(4).
Pointy hat to:	myself
Submitted by:	scottl
2009-01-19 08:51:20 +00:00
Maxim Sobolev
69b2984e2e Comment amr(4) out - according to scottl it's not 64-bit clean. 2009-01-19 08:25:41 +00:00
Maxim Sobolev
68ce278eea Whitespace-only: reduce diff to the i386 GENERIC. 2009-01-19 07:18:32 +00:00
Maxim Sobolev
579aaaa4ea Add asr(4) and stge(4) from i386 GENERIC. Both drivers compile on amd64 and
there is no particular reason for them to be i386-only.

MFC after:	2 weeks
2009-01-19 07:10:11 +00:00
Konstantin Belousov
a353a3455e Disable interrupts, if they were enabled, before doing swapgs.
Otherwise, interrupt may happen while we run with kernel CS and usermode
gsbase.

Reviewed by:	jeff
MFC after:	1 week
2009-01-14 14:20:08 +00:00
Andrew Thompson
ea8f960c13 MFp4: //depot/projects/usb@155990
Add USB scanner support to USB2 config files.

Submitted by: Hans Petter Selasky
2009-01-13 19:05:10 +00:00
Luigi Rizzo
650ea0d62e Documentation-only change:
- add a reference to the config(5) manpage;
- hopefully clarify the format of the 'env FILENAME' directive.

I am putting these notes in sys/${arch}/conf/GENERIC and not
in sys/conf/NOTES because:

1. i386/GENERIC already had reference to a similar option (hints..)
   and to documentation (handbook)

2. GENERIC is what most users look at when they have to modify or
   create a new kernel config, so having the suggestion there is
   more effective.

I am only touching i386 and amd64 because the other GENERIC files
are already out of sync, and I am not sure what is the overall plan.

MFC after:	3 days
2009-01-13 12:35:33 +00:00