Commit Graph

5234 Commits

Author SHA1 Message Date
alc
1ecfdf51e9 Remove unnecessary page queues locking around vm_page_busy() and
vm_page_wakeup().  (This change is applicable to RELENG_7 but not
RELENG_6.)

MFC after:	1 week
2009-02-14 18:23:52 +00:00
marcel
8a9f5896ce Add option GEOM_PART_EBR by default on amd64 and i386. 2009-02-10 00:08:39 +00:00
cognet
80c343b215 The bounce zone sees its page number increased if multiple dma maps use it in
the same dma tag. However, it can happen multiple dma tags share the same
bounce zone too, so add a per-bounce zone map counter, and check it instead of
the dma tag map counter, to know if we have to alloc more pages.

Reported by:	miwi
Reviewed by:	scottl
2009-02-09 18:03:31 +00:00
imp
719ba982f2 When bouncing pages, allow a new option to preserve the intra-page
offset.  This is needed for the ehci hardware buffer rings that assume
this behavior.

This is an interim solution, and a more general one is being worked
on.  This solution doesn't break anything that doesn't ask for it
directly.  The mbuf and uio variants with this flag likely don't work
and haven't been tested.

Universe builds with these changes.  I don't have a huge-memory
machine to test these changes with, but will be happy to work with
folks that do and hps if this changes turns out not to be sufficient.

Submitted by:	alfred@ from Hans Peter Selasky's original
2009-02-08 22:54:58 +00:00
imp
f765a01b09 Companion for r188301: fix the prototypes. 2009-02-08 07:03:34 +00:00
imp
932f4517f0 Correct parameter types for pcib_{read,write}_config by fixing the
protptyoes for the legacy_* impelemtnations of these kobj methods.
2009-02-08 07:02:42 +00:00
wkoszek
b77738fab2 Tidy NOTES a bit:
- remove misleading nve/nfe comments, which make it hard to
  distinguish those two at a first glance
- bring pbio documentation to the block comment together with
  other drivers

I also brought commented out line responsible for si(4), since it
seems to compile and already has respective comment in this file.
2009-02-07 00:01:10 +00:00
wkoszek
02d740fa65 ural(4) is already present in global NOTES, thus there is no
need to explicitly list it here once again. This removes:

	WARNING: duplicate option `DEV_URAL' encountered.
	WARNING: duplicate device `ural' encountered.

Warnings when compiling LINT on amd64.
2009-02-06 21:56:55 +00:00
wkoszek
a6c32bcda6 Fix AGP debugging code:
- correct format strings
- fill opt_agp.h if AGP_DEBUG is defined
- bring AGP_DEBUG to LINT by mentioning it in NOTES

This should hopefully fix a warning that was...

Found by:	Coverity Prevent(tm)
CID:		3676
Tested on:	amd64, i386
2009-02-06 20:57:10 +00:00
jkoshy
3091212869 Improve robustness of NMI handling, for NMIs recognized in kernel
mode.

- Make the NMI handler run on its own stack (TSS_IST2).
- Store the GSBASE value for each CPU just before the start of
  each NMI stack, permitting efficient retrieval using %rsp-relative
  addressing.
- For NMIs taken from kernel mode, program MSR_GSBASE explicitly
  since one or both of MSR_GSBASE and MSR_KGSBASE can be potentially
  invalid.  The current contents of MSR_GSBASE are saved and restored
  at exit.
- For NMIs handled from user mode, continue to use 'swapgs' to
  load the per-CPU GSBASE.

Reviewed by:	jeff
Debugging help:	jeff
Tested by:	gnn, Artem Belevich <artemb at gmail dot com>
2009-02-03 09:01:45 +00:00
obrien
3d748c0103 Fix the inconsistent tabbing.
Noticed by:	bde
2009-01-31 20:46:01 +00:00
obrien
7a153194ec Change some movl's to mov's. Newer GAS no longer accept 'movl' instructions
for moving between a segment register and a 32-bit memory location.

Looked at by:	jhb
2009-01-31 11:37:21 +00:00
jeff
bfa45b3bb7 - Allocate apic vectors on a per-cpu basis. This allows us to allocate
more irqs as we have more cpus.  This is principally useful on systems
   with msi devices which may want many irqs per-cpu.

Discussed with:	jhb
Sponsored by:	Nokia
2009-01-29 09:22:56 +00:00
jhb
3b7528c89c Use a different value for the initial control word for the FPU state for
32-bit processes.  The value matches the initial setting used by
FreeBSD/i386.  Otherwise, 32-bit binaries using floating point would use
a slightly different initial state when run on FreeBSD/amd64.

MFC after:	1 week
2009-01-28 20:35:16 +00:00
jkim
1e8881cf54 VIA Nano processor has a special MSR (CENT_HARDWARECTRL3) bit 32 to determine
whether TSC is P-state invariant or not.  In fact, this MSR is writable but
we just leave it at the BIOS default for now.
2009-01-22 21:04:46 +00:00
kib
a23ffa0635 The context switch to the 32bit binary does not properly restore
the fsbase value. The switch loads the fs segment register, that
invalidates the value in fsbase msr, thus value in %r9 can not be
considered the current value for fsbase anymore.

Unconditionally reload fsbase when switching to 32bit binary.

PR:	130526
MFC after:	3 weeks
2009-01-20 12:07:49 +00:00
sobomax
2f4bdc6a7f Take NTFS option out to match i386 GENERIC.
Suggested by:	phk, luigi
2009-01-19 15:33:06 +00:00
sobomax
a8c0e8bf46 asr(4) is not amd64-clean, not amr(4).
Pointy hat to:	myself
Submitted by:	scottl
2009-01-19 08:51:20 +00:00
sobomax
892160aa9e Comment amr(4) out - according to scottl it's not 64-bit clean. 2009-01-19 08:25:41 +00:00
sobomax
ba1b4a9892 Whitespace-only: reduce diff to the i386 GENERIC. 2009-01-19 07:18:32 +00:00
sobomax
bde2deb986 Add asr(4) and stge(4) from i386 GENERIC. Both drivers compile on amd64 and
there is no particular reason for them to be i386-only.

MFC after:	2 weeks
2009-01-19 07:10:11 +00:00
kib
c2da459b12 Disable interrupts, if they were enabled, before doing swapgs.
Otherwise, interrupt may happen while we run with kernel CS and usermode
gsbase.

Reviewed by:	jeff
MFC after:	1 week
2009-01-14 14:20:08 +00:00
thompsa
022a9f5ac2 MFp4: //depot/projects/usb@155990
Add USB scanner support to USB2 config files.

Submitted by: Hans Petter Selasky
2009-01-13 19:05:10 +00:00
luigi
421fd89a07 Documentation-only change:
- add a reference to the config(5) manpage;
- hopefully clarify the format of the 'env FILENAME' directive.

I am putting these notes in sys/${arch}/conf/GENERIC and not
in sys/conf/NOTES because:

1. i386/GENERIC already had reference to a similar option (hints..)
   and to documentation (handbook)

2. GENERIC is what most users look at when they have to modify or
   create a new kernel config, so having the suggestion there is
   more effective.

I am only touching i386 and amd64 because the other GENERIC files
are already out of sync, and I am not sure what is the overall plan.

MFC after:	3 days
2009-01-13 12:35:33 +00:00
jkim
7cdff4176a Add basic amd64 support for VIA Nano processors. 2009-01-12 19:17:35 +00:00
jkim
657301ea43 Add Centaur/IDT/VIA vendor ID for Nano family, which has long mode support. 2009-01-05 21:51:49 +00:00
rwatson
a5fb43e4cd Add commented out options KDTRACE_HOOKS and, for amd64, KDRACE_FRAME,
to GENERIC configuration files.  This brings what's in 8.x in sync
with what is in 7.x, but does not change any current defaults.

Possibly they should now be enabled in head by default?
2009-01-05 14:21:49 +00:00
rpaulo
114967dedd Disable USB bluetooth (needs netgraph built in) and USB audio (doesn't
compile).
2008-12-30 20:13:20 +00:00
rpaulo
72636ca358 Add a kernel config file so that users have less difficulty testing
USBng.

If it makes sense, it could be done for arm/mips too.
2008-12-30 19:46:06 +00:00
marcel
d654ea043b Make gpart the default partitioning class on all platforms.
Both ia64 and powerpc were using gpart exclusively already
so there's no change for those two.

Discussed on: arch@
2008-12-17 17:43:22 +00:00
imp
39a3668dcc AT_DEBUG and AT_BRK were OBE like 10 years ago, so retire them.
Reviewed by:	peter
2008-12-17 06:56:58 +00:00
imp
e4a424be30 Remove obsolete AT_DEBUG stuff. It never should have been committed
in the first place, let alone migrated to linux emulation.

Reviewed by:	peter, rdivacky
2008-12-17 06:11:42 +00:00
jkoshy
62d6b4ab63 Bug fix: %ebx needs to be preserved in the user callchain capture
path.
2008-12-14 09:06:28 +00:00
jkoshy
57939c399f - Bug fix: prevent a thread from migrating between CPUs between the
time it is marked for user space callchain capture in the NMI
  handler and the time the callchain capture callback runs.

- Improve code and control flow clarity by invoking hwpmc(4)'s user
  space callchain capture callback directly from low-level code.

Reviewed by:	jhb (kern/subr_trap.c)
Testing (various patch revisions): gnn,
		Fabien Thomas <fabien dot thomas at netasq dot com>,
		Artem Belevich <artemb at gmail dot com>
2008-12-13 13:07:12 +00:00
jkim
424471c961 Add more CPUID bits from AMD CPUID Specification Rev. 2.28. 2008-12-12 23:17:00 +00:00
jkoshy
e2774cc573 Expose symbol `PMC_FN_USER_CALLCHAIN' to assembler code. 2008-12-12 16:09:34 +00:00
jhb
160f4765eb Add constants for fields in the local APIC error status register and a
routine to read it.
2008-12-11 15:56:30 +00:00
alc
071a9996a4 Change the default value for the flag enabling superpage mapping and
promotion to "on".

Reminded by:	jhb
Tested by:	kris
2008-12-06 19:37:52 +00:00
kib
d57e5b9d8b Improve db_backtrace() for compat ia32 on amd64. 32bit image enters
the kernel via Xint0x80_syscall().

Submitted by:	dchagin
MFC after:	1 week
2008-12-05 11:34:36 +00:00
ed
9286c815e8 Remove "[KEEP THIS!]" from COMPAT_43TTY. It's not really that important.
Sgtty is a programming interface that has been replaced by termios over
the years. In June we already removed <sgtty.h>, which exposes the
ioctl()'s that are implemented by this interface. The importance of this
flag is overrated right now.
2008-12-02 19:09:08 +00:00
ganbold
a6ba0e1fed Remove unused variable.
Found with:     Coverity Prevent(tm)
CID: 3685

Approved by: jhb
2008-12-02 14:19:53 +00:00
sam
3693ee3c32 Switch to ath hal source code. Note this removes the ath_hal
module; the ath module now brings in the hal support.  Kernel
config files are almost backwards compatible; supplying

device ath_hal

gives you the same chip support that the binary hal did but you
must also include

options AH_SUPPORT_AR5416

to enable the extended format descriptors used by 11n parts.
It is now possible to control the chip support included in a
build by specifying exactly which chips are to be supported
in the config file; consult ath_hal(4) for information.
2008-12-01 16:53:01 +00:00
kensmith
656329bc07 Adjustments to make a tags file a bit more suitable to amd64.
Reviewed by:	peter
2008-12-01 14:15:10 +00:00
mav
750de65ae4 According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.
2008-11-30 00:10:55 +00:00
kib
8ffb383318 Make linux_sendmsg() and linux_recvmsg() work on linux32/amd64.
Change types used in the linux' struct msghdr and struct cmsghdr
definitions to the properly-sized architecture-specific types.
Move ancillary data handler from linux_sendit() to linux_sendmsg().

Submitted by:	dchagin
2008-11-29 17:14:06 +00:00
kib
1500739dba Regenerate 2008-11-29 14:57:58 +00:00
kib
bfe2c8cb22 Fix iovec32 for linux32/amd64.
Add a custom version of copyiniov() to deal with the 32-bit iovec
pointers from userland (to be used later).

Adjust prototypes for linux_readv() and linux_writev() to use new
l_iovec32 definition and to match actual linux code. In particular,
use ulong for fd (why ?).

Submitted by:	dchagin
2008-11-29 14:55:24 +00:00
jkoshy
aa86a7c59e - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solo
and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and
  model 0x1C (Atom).

  In these CPUs, the actual numbers, kinds and widths of PMCs present
  need to queried at run time.  Support for specific "architectural"
  events also needs to be queried at run time.

  Model 0xE CPUs support programmable PMCs, subsequent CPUs
  additionally support "fixed-function" counters.

- Use event names that are close to vendor documentation, taking in
  account that:
  - events with identical semantics on two or more CPUs in this family
    can have differing names in vendor documentation,
  - identical vendor event names may map to differing events across
    CPUs,
  - each type of CPU supports a different subset of measurable
    events.

  Fixed-function and programmable counters both use the same vendor
  names for events.  The use of a class name prefix ("iaf-" or
  "iap-" respectively) permits these to be distinguished.

- In libpmc, refactor pmc_name_of_event() into a public interface
  and an internal helper function, for use by log handling code.

- Minor code tweaks: staticize a global, freshen a few comments.

Tested by:	gnn
2008-11-27 09:00:47 +00:00
jkim
8bceebfbc2 Use newly introduced cpu_vendor_id to make invariant TSC detection more
clearer and merge r185295 to amd64.
2008-11-26 19:29:33 +00:00
jkim
d6a4501391 Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
Reviewed by:	jhb, peter (early amd64 version)
2008-11-26 19:25:13 +00:00