Commit Graph

621 Commits

Author SHA1 Message Date
andrew
49a7ecd041 We only support the ARM EABI in head, remove the check on __ARM_EABI__. 2015-05-31 10:51:06 +00:00
andrew
ef95fa5a27 Add more cp15_ functions, and use them in cpufunc.c where possible. 2015-05-24 12:12:01 +00:00
imp
b8ed2d07c4 Export the eflags field from the elf header. This allows better
discrimination between different subarch binaries, at least for mips
and arm. Arm is implemented, mips is still tbd, so not currently
exported. aarch64 does not export this because aarch64 binaries use
different tags and flags than arm.

Differential Revision: https://reviews.freebsd.org/D2611
2015-05-22 20:50:35 +00:00
andrew
43523cb7d2 Clean up struct syscall_args:
1. Align to a 64-bit address so 64-bit data will be correctly aligned.
 2. Add a comment explaining why.
 3. Remove an unneeded value from the struct.

This fixes an issue where the struct may not be correctly aligned on the
stack in the syscall function. This may lead to accesing a 64-bit value
at a non 64-bit. This will raise an exception and panic the kernel.

We have been lucky where on arm and armv6 both clang and gcc correctly
align the data, even without us asking to, however, on armeb with clang to
not be the case. This tells the compiler we really do need this to be
aligned.

Reported and tested by:	jmg (on armeb with clang)
MFC after:	1 Week [1, 2]
2015-05-17 18:35:58 +00:00
ian
ff64c3f311 Add assertions that the addresses passed to tlb maintenance are page-aligned.
Perform cache writebacks and invalidations in the correct (inner to outer
or vice versa) order, and add comments that explain that.

Consistantly use 'va' as the variable name for virtual addresses.

Submitted by:	Michal Meloun <meloun@miracle.cz>
2015-05-15 18:10:00 +00:00
ganbold
7623d151d8 It appears to be armv7_sleep is a duplication of armv7_cpu_sleep.
For consistency with the naming conventions used by the other
implementations kill armv7_sleep and keep armv7_cpu_sleep.

Differential Revision:	https://reviews.freebsd.org/D2537
Submitted by:	John Wehle
Reviewed by:	ian@, andrew@
2015-05-15 00:39:51 +00:00
alc
e4e7fd4992 Retire pmap_lazyfix(). This function only existed in the new armv6 pmap
because the i386 pmap on which the new armv6 pmap is based had it, and in
r281707 pmap_lazyfix() was removed from the i386 pmap.

Discussed with:	kib
Submitted by:	Michal Meloun (via Svatopluk Kraus)
2015-05-11 19:55:01 +00:00
andrew
7bb734e44d Mark thumb entry points as such when building for thumb, otherwise mark
them as arm.
2015-05-11 19:04:32 +00:00
andrew
86910dabc1 Use the Thumb compliant version of the add instruction. We can only use
"add Rd, Rn, Rm" from within an IT (if-then) block.
2015-05-11 19:00:02 +00:00
andrew
82ba7e94e9 List both registers to use in the 64-bit atomic instructions. We will need
these to build for Thumb-2.
2015-05-11 18:52:06 +00:00
andrew
79d8402976 cpu-v6.h should only be used in the kernel, add an error to enforce this. 2015-05-11 12:44:02 +00:00
emaste
5184251d09 Correct PL310_POWER_CTRL offset
Offet for the power control register was specified incorrectly (it had
the same value as the prefetch control register.) This change corrects
the offset value to 0xF80, per the ARM PL310 documentation.

Submitted by:	Steve Kiernan <stevek@juniper.net>
Obtained from:	Juniper Networks, Inc.
2015-05-07 16:56:20 +00:00
zbb
ff39bdf1b1 Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registers
Submitted by:   Wojciech Macek <wma@semihalf.com>
Reviewed by:    imp, Michal Meloun <meloun@miracle.cz>
Obtained from:  Semihalf
2015-05-06 15:17:28 +00:00
ian
8e7c521fdb Add a pmap_kremove_device() to undo mappings made with pmap_kenter_device().
Previously we used pmap_kremove(), but with ARM_NEW_PMAP it does the remove
in a way that isn't SMP-coherent (which is appropriate in some circumstances
such as mapping/unmapping sf buffers).  With matching enter/remove routines
for device mappings, each low-level implementation can do the right thing.

Reviewed by:	Svatopluk Kraus <onwahe@gmail.com>
2015-04-10 13:26:35 +00:00
andrew
1b7f9d2b45 Add support to the efi boot1 and loader for 32-bit ARM. This will be used
by the future qemu virt support.

Differential Revision:	https://reviews.freebsd.org/D2238
Reviewed by:	emaste
2015-04-06 15:50:20 +00:00
andrew
0a38ac8a11 dev/ofw/openfirm.h is not needed in the arm machine/fdt.h 2015-04-05 09:50:22 +00:00
andrew
7d8a76a98f Re-add machine/bus.h to machine/fdt.h on arm, it's still needed. 2015-04-04 23:10:13 +00:00
andrew
601eb65e99 Don't include unneeded files in the arm machine/fdt.h. While here, remove
it from more files.
2015-04-04 22:22:04 +00:00
andrew
36a74b71ba Move the definition of fdt_localbus_devmap to a Marvell specific file as
it's only used there.
2015-04-04 22:05:43 +00:00
andrew
9f96058615 Add the generic timer registers to sysreg.h and cpu-v6.h, and use the
access functions in the generic timer driver.

Differential Revision:	https://reviews.freebsd.org/D2198
Sponsored by:	The FreeBSD Foundation
2015-04-02 12:56:06 +00:00
andrew
17264df1ac Remove support for CPU_XSCALE_80200. None of our configs support it, and
there wasn;t an option to enable it.

While here remove a check for CPU_ARM10 being defined as it has also been
removed.
2015-03-30 09:29:45 +00:00
andrew
38c739d81c Remove support for CPU_FA626TE. It's unused by any of our kernel configs. 2015-03-30 08:38:18 +00:00
andrew
702711f680 pj4b_config and pj4bv7_setup are only used when CPU_MV_PJ4B is defined. 2015-03-29 22:45:33 +00:00
andrew
def0da773a Remove arm1136 support. We don't have any configs that use it, and I don't
expect us to add support for any more arm11 SoCs.
2015-03-29 21:12:59 +00:00
andrew
61b861116b Remove the bootconfig parsing. We never used it and always passed either an
empty string or NULL to the setup functions that called into it.
2015-03-29 20:37:28 +00:00
andrew
eb7a3e863e Remove ARM9_CACHE_WRITE_THROUGH, none of our configs define it. 2015-03-29 18:59:04 +00:00
andrew
978db77056 Remove unused cpufunc arm11 and armv6 code. While here only define the
remaining functions in the context we use them in.
2015-03-29 18:44:15 +00:00
andrew
e302be911e Remove unused arm10_* functions. The remaining functions are only used in
mv configs.
2015-03-29 17:42:32 +00:00
andrew
4458b2f4b7 Remove support for CPU_ARM10. No kernel configs could possibly use this as
it's not an available option. Along with this we will never support this
cpu type as very few arm10 chips were made.
2015-03-29 17:13:44 +00:00
bz
9632944658 Rather than defining our own magic checks here use INKERNEL() for
the PMC_IN_KERNEL() macro definition.

Add missing macros to extract the return address (LR) from the trapframe.

Discussed with:	andrew
Obtained from:	Cambridge/L41
Sponsored by:	DARPA, AFRL
MFC after:	2 weeks
2015-03-27 08:47:16 +00:00
ian
6fb7bdd343 New pmap code for armv6. Disabled by default, option ARM_NEW_PMAP enables it.
This is pretty much a complete rewrite based on the existing i386 code.  The
patches have been circulating for a couple years and have been looked at by
plenty of people, but I'm not putting anybody on the hook as having reviewed
this in any formal sense except myself.

After this has gotten wider testing from the user community, ARM_NEW_PMAP
will become the default and various dregs of the old pmap code will be
removed.

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>,
	  	Michal Meloun <meloun@miracle.cz>
2015-03-26 21:13:53 +00:00
zbb
8f5c3973fb Allow to override default kernel virtual address assignment on ARM
Each plaform performs virtual memory split between kernel and user space
and assigns kernel certain amount of memory space. However, is is sometimes
reasonable to change the default values. Such situation may happen on
systems where the demand for kernel buffers is high, many devices occupying
memory etc. This of course comes with the cost of decreasing user space
memory range so shall be used with care. Most embedded systems will not
suffer from this limtation but rather take advantage of this potential
since default behavior is left unchanged.

Submitted by:  Wojciech Macek <wma@semihalf.com>
Reviewed by:   imp
Obtained from: Semihalf
2015-03-20 10:15:34 +00:00
emaste
bf31580311 Delete stray clause 3 and renumber. 2015-03-13 02:49:55 +00:00
ian
3da704e7e6 Add minimum cache line sizes to struct cpuinfo, use them in the new cache
maintenance routines.  Also add a routine to invalidate the branch cache.

Submitted by:	Michal Meloun
2015-03-09 14:46:10 +00:00
ian
845accea49 Revert r279338. The casts are apparently bogus, despite the fact that
they've been working in i386 (where this change came from).
2015-03-02 20:40:25 +00:00
ian
2c469d5dc1 Add casting to make atomic ops work for pointers. (Apparently nobody has
ever done atomic ops on pointers before now on arm).

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>
2015-02-26 23:05:46 +00:00
ian
00f7051c20 Correct a comment which was exactly backwards from reality. 2015-02-21 22:19:59 +00:00
andrew
47da3760fc Allow the ARM unwinder to work through modules. This will be used to add
support for unwinding from dtrace.

Tested by:	gnn (with dtrace)
Sponsored by:	ABT Systems Ltd
2015-02-19 12:06:57 +00:00
andrew
5b8b9e9db4 Pull the ARM ddb unwind code out to a new file. This will allow it to be
used by other places that expect to unwind the stack, e.g. dtrace and
stack(9).

As I have written most of this code I'm changing the license to the
standard FreeBSD license. I have received approval from the other
developers who have changed any of the affected code.

Approved by:	ian, imp, rpaulo, eadler (all license change)
2015-02-17 13:09:20 +00:00
gnn
b9be305241 Initial version of DTrace on ARM32.
Submitted by:	Howard Su based on work by Oleksandr Tymoshenko
Reviewed by:	ian, andrew, rpaulo, markj
2015-02-10 19:41:30 +00:00
zbb
d12ce3b931 Resolve cache line size from CP15
Switch the cache line size during invalidations/flushes
to be read from CP15 cache type register.

Submitted by:  Wojciech Macek <wma@semihalf.com>
Reviewed by:   ian, imp
Obtained from: Semihalf
2015-02-10 14:11:23 +00:00
andrew
086d1fe33f Stop using load-multiple with lr and pc. This has been deprecated in ARMv7
and clang 3.6 warns about it. As this is used in libc and we build it with
-Werror this warning becomes an error stopping the build.
2015-01-31 19:55:12 +00:00
br
236c1b153d Add ARMv7 performance monitoring counters.
Differential Revision:	https://reviews.freebsd.org/D1687
Reviewed by:	rpaulo
Sponsored by:	DARPA, AFRL
2015-01-28 16:08:07 +00:00
ian
f6d6d22c9f Declare Maxmem on arm. This should have been part of r277532. 2015-01-22 17:46:05 +00:00
ian
33d6283946 Micro-optimize the new arm inline bus_space implementation by grouping all
the data the inline functions access together at the start of the bus_space
struct.  The start-of part isn't so important, it's the grouping-together
that's the point: now all the most-accessed data should be in one cache line.

Suggested by:	  cognet
2015-01-21 20:12:35 +00:00
ian
1852f2db62 The versatile platform had two copies of a bus_space that are essentially
duplicates of the standard arm base bus_space, so just use it.
2015-01-21 04:06:36 +00:00
ian
7aeca12fb3 Move bs_unimplemented() to bus_space_generic.c so it can be shared. 2015-01-21 03:24:18 +00:00
ian
c25b839fb8 Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

The bus_space struct contains a private data pointer (poorly named bs_cookie,
now renamed to bs_privdata) which is used only by a few old armv4 xscale
implementations.  The bus_space functions were all defined to take this
value as the first parameter instead of the bus_space_tag_t, requiring all
the inline macro and function expansions to dereference the tag to pass it
to another function, which never uses it.  Now all the functions take the tag
as the first parameter and retrieve the privdata if they need it.

Also fix a couple bus_space_unmap() implementations that were calling
kva_free() instead of pmap_unmapdev().

Discussed with:	   cognet
2015-01-21 01:06:08 +00:00
ian
fd7fb7b57b Add inline implementations of arm bus_space_read/write_N().
Reviewed by:	cognet
2015-01-20 22:56:59 +00:00
andrew
1672a09eb0 Add the User and PL1 read only and reqd write thread ID registers.
Sponsored by:	The FreeBSD Foundation
2015-01-20 11:11:32 +00:00