4 Commits

Author SHA1 Message Date
Andrew Turner
7c570e8bb1 Remove the arm KERNPHYSADDR option as it is no longer used. The make
option is still in existance as it is used to build the trampoline code.
2015-12-22 09:08:21 +00:00
Andrew Turner
979d76c948 Remove STARTUP_PAGETABLE_ADDR from the ARM configs and replace it with
memory at the end of the kernel.

This helps reduce the SoC and board specific configuration required.

Reviewed by:	bsdimp
Tested by:	jmg (armeb), br
2014-01-28 09:12:04 +00:00
Sam Leffler
d212022417 Merge WIP from p4:
o recognize ixp435 cpu
o change memory layout for for ixp4xx to not assume memory is aliases
  to 0x10000000 (Cambria/ixp435 memory starts at zero)
o handle 64 irqs for ixp435
o dual EHCI USB 2.0 controller integral to ixp435
o overhaul NPE code for ixp435 and better MAC+MII naming
o updated NPE firmware (including NPE-A image for ixp435/ixp465)
o Gateworks Cambria board support:
  - IDE compact flash
  - MCU
  - front panel LED on i2c bus
  - Octal LED latch

Sanity-tested with NFS-root on Avila and Cambria boards.  Requires
pending boot2 mods for CF-boot on Cambria.
2008-12-13 01:21:37 +00:00
Sam Leffler
e67f80fd20 Gateworks Avila board support:
o ixp425 support
o NPE network driver (requires Intel microcode)
o h/w qmgr support
o True IDE compact flash over expansion bus
o pci (ath and hifn795x parts tested)
o xscale watchdog timer
o ds1672 RTC on i2c bus
o ad7418 voltage + temp monitoring on i2c bus
o uart

Work done together with cognet, kevlo, and jmg.  Parts of
the ixp425 support obtaine/derived from netbsd.

Reviewed by:	cognet, imp
MFC after:	1 month
2006-11-19 23:55:23 +00:00