Commit Graph

16 Commits

Author SHA1 Message Date
rpaulo
69436c4cab Add support for Cavium Econa CNS11XX ARM boards. These boards were
previously know by StarSemi STR9104.

Tested by the submitter on an Emprex NSD-100 board.

Submitted by:	Yohanes Nugroho <yohanes at gmail.com>
Reviewed by:	freebsd-arm, stas
Obtained from:	//depot/projects/str91xx/...
2010-01-04 03:35:45 +00:00
raj
9a3c731c25 Fix confusing naming of Marvell ARM CPU specific routines.
- The contents of 'feroceon_cpufuncs' dispatch table was really dedicated for the
  new Sheeva CPU (in 88F6xxx and MV-78xxx SOCs), and NOT Feroceon.

- Feroceon CPU (in 88F5xxx SOCs) appears as a regular ARM926EJ-S core and does
  not require dedicated routines.

This will be accompanied by a file rename commit.
2009-01-09 10:45:04 +00:00
raj
b9c565987a Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.
They are compliant with ARMv5TE and integrated on 88F6281 (Kirkwood) and
MV78100 (Discovery) system-on-chip families.

Obtained from:	Marvell, Semihalf
2008-10-13 18:16:54 +00:00
imp
003f26732c Merge support from p4 (from NetBSD) for arm9e and arm10, arm11 cores. Not
yet connected to the build, but reduces diffs to p4 repo.

Obtained from: NetBSD
2007-10-18 05:33:06 +00:00
cognet
30161fe629 Add a new set of functions to handle L2 cache. Make them no-op for every
CPU except Xscale core 3.

Approved by:	re (blanket)
2007-07-27 14:39:41 +00:00
kevlo
44a4513fbb Remove __P 2007-03-21 03:28:16 +00:00
cognet
6c634eded7 Identify the xscale 81342. 2006-11-07 22:36:57 +00:00
cognet
d4600e67df Finally bring it support for the i80219 XScale processor.
Submitted by:	Max M. Boyarov <m.boyarov bsd by>
2006-08-24 23:51:28 +00:00
cognet
55e41f7b78 Don't enable the FIQ in enable_interrupts() if F32_bit is not specified.
This has been committed by mistake.

Reported by:	ssouhlal
2006-06-01 16:17:44 +00:00
cognet
70eb7340ea Bring in bits I forgot while importing write back support for arm9. 2005-06-03 19:49:53 +00:00
imp
77267e277f Start all license statements with /*- 2005-01-05 21:58:49 +00:00
cognet
75354c7e52 Implement enough to be able to enter and leave DDB. 2004-11-20 16:52:10 +00:00
cognet
a9cde5c028 Use interrupts_disable() and interrupts_restore() as intr_disable() and
intr_restore() instead of re-implement it.
2004-11-04 19:18:50 +00:00
cognet
f6936a77a8 Nuke disable_intr() and enable_intr(), as it already exists elsewhere. 2004-07-20 22:38:46 +00:00
cognet
b0940860cf Implement a stub breakpoint(). 2004-07-12 21:20:38 +00:00
cognet
295dcdd687 Import FreeBSD/arm kernel bits.
It only supports sa1110 (on simics) right now, but xscale support should come
soon.
Some of the initial work has been provided by :
Stephane Potvin <sepotvin at videotron.ca>
Most of this comes from NetBSD.
2004-05-14 11:46:45 +00:00