Commit Graph

96 Commits

Author SHA1 Message Date
gibbs
3c297571e4 o Convert to <inttypes.h> style fixed sized types to facilitate porting to
other systems.

 o Normalize copyright text.

 o Clean up probe code function interfaces by passing around a single
   structure of common arguments instead of passing "too many" args
   in each function call.

 o Add support for the AAA-131 as a SCSI adapter.

 o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net

 o Correct manual termination support for PCI cards.  The bit definitions
   for manual termination control in the SEEPROM were incorrect.

 o Add support for extracting NVRAM information from SCB 2 for BIOSen
   that use this mechanism to pass this data to OS drivers.

 o Properly set the STPWLEVEL bit in PCI config space based on the
   setting in an SEEPROM.

 o Go back to useing 32byte SCBs for all controllers.  The current
   firmware allows us to embed 12byte cdbs on all controllers in
   a 32byte SCB, and larger cdbs are rarely used, so it is a
   better use of this space to offer more SCBs (32).

 o Add support for U160 transfers.

 o Add an idle loop executed during data transfers that prefetches
   S/G segments on controllers that have a secondary DMA engine
   (aic789X).

 o Improve the performance of reselections by avoiding an extra
   one byte DMA in the case of an SCB lookup miss for the reselecting
   target.  We now keep a 16byte "untagged target" array on the card
   for dealing with untagged reselections.  If the controller has
   external SCB ram and can support 64byte SCBs, then we use an
   "untagged target/lun" array to maximize concurrency.  Without
   external SCB ram, the controller is limited to one untagged
   transaction per target, auto-request sense operations excluded.

 o Correct the setup of the STPWEN bit in SXFRCTL1.  This control
   line is tri-stated until set to one, so set it to one and then
   set it to the desired value.

 o Add tagged queuing support to our target role implementation.

 o Handle the common cases of the ignore wide residue message
   in firmware.

 o Add preliminary support for 39bit addressing.

 o Add support for assembling on big-endian machines.  Big-endian
   support is not complete in the driver.

 o Correctly remove SCBs in the waiting for selection queue when
   freezing a device queue.

 o Now that we understand more about the autoflush bug on the
   aic7890, only use the workaround on devices that need it.

 o Add a workaround for the "aic7890 hangs the system when you
   attempt to pause it" problem.  We can now pause the aic7890
   safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
gibbs
db6a3ed930 o Correct the offsets into the syncrate table for paritcular
negotiation features (DT, ULTRA2, ULTRA, FAST).  The offsets
  where not properly updated when the DT entry was added and so
  the driver could attempt to negotiate a speed faster than that
  supported by the target device or even requested by the user
  via SCSI-Select settings. *

o Update the target mode incoming command queue kernel index value
  ever 128 commands instead of 32.  This means that the kernel will
  always try to keep its index (as seen on the card - the kernel may
  actually have cleared more space) 128 commands ahead of where the
  sequencer is adding entries.

o Use the HS_MAILBOX register instead of the KERNEL_TQINPOS location
  in SRAM to indicate the kernel's target queue possition on Ultra2
  cards.  This avoids the "pause bug" on these cards and also turns
  out to be much more efficient.

o When enabling or disabling a particular target id for target mode,
  make sure that the taret id in the SCSIID register does not
  reference an ID that is not to receive target selections.  This
  is only an issue on chips that support the multiple target id
  feature where the value in SCSIID will still affect selection
  behavior regardless of the values in the target id bit field
  registers.

o Remove some target mode debugging printfs.

o Make sure that the sense length reported in ATIO commands is
  always zero.  This driver does not, yet, report HBA generated
  sense information for accepted commands.

o Honor the CAM_TIME_INFINITY and CAM_TIME_DEFAULT values for
  the CCB timeout field.

o Make the driver compile with AHC_DEBUG again.

* Noticed by: Andrew Gallatin<gallatin@cs.duke.edu>
2000-03-18 22:28:20 +00:00
gibbs
c8e218c397 Kill the "unpause_always" argument to unpause_sequencer(). The reasons
for optimizing the unpause operation no-longer exist, and this is much
safer.

When restarting the sequencer, reconstitute the free SCB list on the card.
This deals with a single instruction gap between marking the SCB as free
and actually getting it onto the free list.

Reduce the number of transfer negotiations that occur.  In the past, we
renegotiated after every reported check condition status.  This ensures
that we catch devices that have unexpectidly reset.  In this situation,
the target will always report the check condition before performing a
data-phase.  The new behavior is to renegotiate for any check-condition where
the residual matches the orginal data-length of the command (including
0 length transffers).  This avoids renegotiations during things like
variable tape block reads, where the check condition is reported only
to indicate the residual of the read.

Revamp the parity error detection logic.  We now properly report and
handle injected parity errors in all phases.  The old code used to hang
on message-in parity errors.

Correct the reporting of selection timeout errors to the XPT.  When
a selection timeout occurs, only the currently selecting command
is flagged with SELTO status instead of aborting all currently active
commands to that target.

Fix flipped arguments in ahc_match_scb and in some of the callers of this
routine.  I wish that gcc allowed you to request warnings for enums passed
as ints.

Make ahc_find_msg generically handle all message types.

Work around the target mode data-in wideodd bug in all non-U2 chips.
We can now do sync-wide target mode transfers in target mode across the
hole product line.

Use lastphase exclusively for handling timeouts.  The current phase
doesn't take the bus free state into account.

Fix a bug in the timeout handler that could cause corruption of the
disconnected list.

When sending an embedded cdb to a target, ensure that we start on a
quad word boundary in the data-fifo.  It seems that unaligned stores
do not work correctly.
2000-02-09 21:25:00 +00:00
gibbs
ee07555354 Update copyrights to Y2K.
93cx6.c:
	Make the SRAM dump output a little prettier.

aic7xxx.c:
	Store all SG entries into our SG array in kernel space.
	This makes data-overrun and other error reporting more
	useful as we can dump all SG entries.  In the past,
	we only stored the SG entries that the sequencer might
	need to access, which meant we skipped the first element
	that is embedded into the SCB.

	Add a table of chip strings and replace ugly switch
	statements with table lookups.

	Add a table with bus phase strings and message reponses
	to parity errors in those phases.  Use the table to
	pretty print bus phase messages as well as collapse
	another switch statement.

	Fix a bug in target mode that could cause us to unpause
	the sequencer early in bus reset processing.

	Add the 80MHz/DT mode into our syncrate table.  This
	rate is not yet used or enabled.

	Correct some comments, clean up some code...

aic7xxx.h:
	Add U160 controller feature information.

	Add some more bit fields for various SEEPROM formats.

aic7xxx.reg:
	Add U160 register and register bit definitions.

aic7xxx.seq:
	Make phasemis state tracking more straight forward.  This
	avoids the consumption of SINDEX which is a very useful register.

	For the U160 chips, you must use the 'mov' instruction to
	update DFCNTRL.  Using 'or' to set the PRELOADED bit is
	completely ineffective.

	At the end of the command phase, wair for our ACK signal
	to de-assert before disabling the SCSI dma engine.  For
	slow devices, this avoids clearing the ACK before the
	other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
gibbs
09d56a3f8f Simplify my copyright license terms.
aic7xxx.c:
	Add a function for sucking firmware out of the controller
	prior to reset.

	Remove some inline bloat from functions that should not have
	been inlined.

	During initialization, wait 1ms after the chip reset before
	touching any registers.  You can get machine checks on certain
	architectures (Atari I think?) without the delay.

	Return CAM_REQ_CMP for external BDR requests instead
	of CAM_BDR_SENT.

	Bump some messages to bootverbose levels above 1.

	Don't clear any negotiated sync rate if the target rejects
	a WDTR message.  The sync rate is only cleared if the target
	accepts a WDTR message.

	Fix a small bug in the mesgin handling code that could cause
	us to believe that we had recieved a message that was actually
	received by another target.  This could only confuse us in
	some very rare transmission negotiation scenarios.

	Remove some unecessary cleanup of residual information after
	a residual is reported.  The sequencer does this when the
	command is queued now.
1999-12-06 18:23:31 +00:00
gibbs
8a7720ea1c Work around a defect in the FIFOEMP status bit of Ultra2 class
aic7xxx parts.  This problem could result in data corruption
during periods of my PCI bus load by busmasters other than the
aic7xxx.

Many thanks to Andrew Gallatin <gallatin@cs.duke.edu> for characterizing
the symptoms of this problem and testing this fix.
1999-09-20 18:57:04 +00:00
peter
3b842d34e8 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
gibbs
30dacb106a aic7xxx.c:
Honor the 'bus reset at startup' option now that the XPT properly
	handles transfer negotiation in this scenario.

	Honor the sync rate settings on Ultra2 controllers.  We would
	always negotiate at the fastest speed.  Oops.

aic7xxx.h:
	Whitespace.

aic7xxx.seq:
	Fix a minor nit that would cause the controller to miss the update
	of the negotiation required bitmask causing the negotiation to
	be delayed by a command.
1999-05-22 22:04:11 +00:00
gibbs
be407614c4 Better workaround for aic7890 chip bug. Use the HS_MAILBOX register to
tell the sequencer to pause itself for a target msg variable update.  This
avoids the pause race entirely as HS_MAILBOX can be accessed without
pausing the chip.

3.2 Merge candidate.
1999-05-14 05:07:25 +00:00
gibbs
d57cb059af Use TCL_CHANNEL/SCSI_ID/etc. macros in more locations.
Don't mess with the IRQMS bit in the host control register unless
we are an aic7770 chip.

Use calling context to determine if the card is already paused when
we update the target message request bit field in controller scratch
ram.  Looking at the paused bit in the HCNTRL register opened up a
race condition.

Insert delays in the target message request update routine as a temporary
work around for what looks like a chip bug.  I'm still investigating this
one.

Fix the Abort/Abort Tag/BDR handler to pull its message from the message
buffer in our softc instead of attempting to get it from a register on
the controller.  The message is never recorded by the controller in the
new message scheme.

Don't rely on having an SCB when a BDR occurs.  We can issue these during
invalid reconnects to.

Fix a few cases where we were restarting the sequencer but then still
falling out of a switch statement to unpause the sequencer again.
This could cause us to mess up sequencer state if it generated another
pausing interrupt between the time of the restart and unpause.

Kill the 'transceiver settle' loop during card initialization.  I
failed to realize that a controller that is not connected to any
cables will never settle or enable the SCSI transceivers at all.
The correct solution is to monitor the IOERR interrupt which indicates
that the transceiver state has changed (UW<->LVD).

Modify the aic7xxx assembler to properly echo input when stdin is not
a tty.
1999-03-23 07:24:29 +00:00
gibbs
399fca227c Keep track of negotiated transfer parameters for each initiator<->target
connection.

Clean up support for devices featuring the multiple target SCSI ID feature.
On aic7890/91/96/97 chips, we can now assume the target role on multiple
target ids simultaneously.  Although these chips also have sufficient
instruction space to hold to support the initiator and target role at the
same time, the initiator role is currently disabled as it will conflict
(chip design restriction) with the multi-tid feature.  I'll probably add
a nob to enable the initiator (there-by disabling multi-tid) some time
in the future.

Return queue full or busy, depending on the tagged nature of the incoming
request, if our command input queue fills up in host memeory.

Deal with accept target I/O resource shortages.

If we get an underrun on a transaction that wasn't supposed to transmit
any data, don't attempt to print out the S/G list.  The code would
run until hitting a non-present page. (oops)
1999-03-05 23:35:48 +00:00
gibbs
806b785adb Ensure that the ACK from the last information transfer phase has been
de-asserted by the initiator before changing phase or releasing the bus.
Corrects a SCSI specification violation in target mode.
1999-02-11 07:10:20 +00:00
gibbs
b0bf7fe0ff Add support for routing initiator transactions to disabled luns to the
black hole device.  The controller will now only accept selections if
the black hole device is present and some other target/lun is enabled
for target mode.

Handle the IGNORE WIDE RESIDUE message.  This support has not been tested.

Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS,
and CLEAR QUEUE messages as a target.

Fix a few problems with tagged command handling in target mode.

Wait until the sync offset counter falls to 0 before changing phase
after a data-in transfer completes as the DMA logic seems to indicate
transfer complete as soon as our last REQ is issued.

Simplify some of the target mode message handling code in the sequencer.
1999-01-14 06:14:15 +00:00
gibbs
dc4a57e23b Fix a few problems with handling rejected transfer negotiation messages.
Use the host message loop for any unknown message types instead of performing
a reject message in the sequencer.  Pass reject messages to the host
message loop too which frees up a sequencer interrupt type slot.

Default to issuing a bus reset if initiator mode is enabled.  It seems
that the reset scsi bus bit is not defined in the same location for
all aic78xx BIOSes, so attempting to honor this setting will have to
wait until I get more information on how to detect it.

Nuke some unused variables.
1998-12-17 00:06:52 +00:00
gibbs
4bb599f96c Perform a save data pointers operation if a data transfer was performed
in target mode, but we are not completing the command.

Use a template of allowed bus arbitration phases to selectively and
dynamically enable/disable initiator or target (re)selection.

Properly handle timeouts for target role transactions - just go to the
bus free state and report the error to the peripheral driver.

Checkpoint support for the XPT_ABORT_CCB function code.  This currently
handles the accept tio and immediate notify ccb types, but does not
handle the continue target I/O or SCSI I/O ccb types.  This is enough
to handle dynamic target enable/disable events.

Clean up the SCSI reset code so that we perform at most 1 SCSI bus
reset at initialization, the reset requested by the XPT layer.
1998-12-15 08:22:42 +00:00
gibbs
3e9f8a5d64 Revamp the way that exceptional message handling is performed so that it
is more robust and common code can be used for both the target and iniator
roles.  The mechanism for tracking negotiation state has also been simplified.

Add support for sync/wide negotiation in target mode and fix many of
the target mode bugs running at higher speeds uncovered.  Make a first
stab at getting all of the bus skew delays correct.  Sync+Wide dataout
transfers still cause problems, but this may be an initiator problem.

Ensure that we exit BITBUCKET mode if the controller is restarted.

Add support for target mode only firmware downloads.  This has been
tested on the aic7880, but should mean that we can perform target mode
on any aic7xxx controller.  Mixed mode (initiator and target roles in
the same firmware load) is currently only supported on the aic7890, but
with optimization, may fit on chips with less instruction space.
1998-12-10 04:14:50 +00:00
gibbs
ad7080d581 Change the delivery mechanism for incoming target commands. We now
use a 256 entry ring buffer of descriptersfor this purpose.  This allows
the use of a simple 8bit counter in the sequencer code for tracking start
location.

Entries in the ring buffer now contain a "cmd_valid" byte at their tail.
As an entry is serviced, this byte is cleared by the kernel and set by
the sequencer during its dma of a new entry.  Since this byte is the last
portion of the command touched during a dma, the kernel can use this
byte to ensure the command it processes is completely valid.

The new command format requires a fixed sized DMA from the controller
to deliver which allowed for additional simplification of the sequencer
code.  The hack that required 1 SCB slot to be stolen for incoming
command delivery notification is also gone.
1998-11-23 01:33:47 +00:00
gibbs
ed79d284db Correct twin channel operation. 1998-09-21 16:46:13 +00:00
gibbs
b845ffee80 Massive overhaul of the aic7xxx driver:
- Convert to CAM
 - Use a new DMA based queuing and paging scheme
 - Add preliminary target mode support
 - Add support for the aic789X chips
 - Take advantage of external SRAM on more controllers.
 - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
gibbs
110fbf62fd Some revisions of the aic7880 have a problem where, if the
data fifo is full, but the PCI input latch is not empty,
HDMAEN cannot be cleared.  The fix used here is to attempt
to drain the data fifo until there is space for the input
latch to drain and HDMAEN de-asserts.

This is a 1 instruction fix, so it should have no performance
impact.
1998-06-28 02:58:57 +00:00
gibbs
b9404180a2 Add support to aicasm for "downloaded constants". These are immediate
operands that are set during seqeuncer program download instead of at
assembly time.

Convert the sequencer code to use" downloaded constants" for four run time
constants that vary depending on the board type.  This frees up 4 bytes
of sequencer scratch ram space where these constants used to be stored and
also removes the additional instructions required to load their values
into the accumulator prior to using them.

Remove the REJBYTE sram variable.  The host driver can just as easly
read the accumulator to get this value.

The scratch ram savings is important as the old code used to clober the
SCSICONF register on 274X cards which sits near the top of scratch ram
space.  The SCSICONF register controls bus termination, and clobbering
it is not a good thing.  Now we have 4 bytes to spare.

This should fix the reported problems with cards that don't have devices
attached to them failing with a stream of "Somone reset bus X" messages.

Doug Ledford determined the cause of the problem, fixes by me.
1997-09-27 19:37:31 +00:00
gibbs
6bb904da80 Add a spin lock that prevents the sequencer from attempting to add an
entry to the QOUTFIFO when it is full.  This should eliminate the
"Timed out while idle" problems that many have reported.

In truth, this is somewhat of a hack.  Although are interrupt latency is
low enough that we should be able to always service the queue in time,
since each entry must be passed up to the higher SCSI layer for what can
be a large amount of processing (perhaps even resulting in a new command
being queued) with interrupts disabled, we need this mechanism to avoid
overflow.  In the future, these additional tasks will be offloaded to a
software interrupt handler which should make this hack unnecessary.
1997-08-13 17:02:47 +00:00
gibbs
7ebb73022c Modify my copyright notice to allow the sequencer to be used with GPLed
software (aka Linux).

Fix a few bugs in the sequencer assembler.

Make it easy to compiler the assembler with debugging turned on.
1997-06-27 19:38:56 +00:00
gibbs
3ca5733308 The following scenario would result in a bogus residual being reported
if SCB Paging was enabled:

    disconnect with more data to transfer
    disconnected SCB gets paged out
    target reconnects so we page SCB back in
    target completes transfer so residual is 0
    target disconnects
    SCB gets reused but not paged out since the residual is 0 (optimization)
    target reconnects so we page the SCB back in
    we report a residual because of stale residual information.

The fix for this is to set a flag that forces the SCB to be paged back
up to the host if we page in an SCB with a residual

Pointed out by: Doug Ledford <dledford@dialnet.net>
1997-04-24 16:52:18 +00:00
gibbs
5cc94ca038 Revert some changes to the selection and reselection code that were thought
to fix a selection timeout problem.

If we can't find an SCB for the reconnecting target, issue a bus device
reset as the SCSI2 spec suggests.

Add a missing call to "add_scb_to_free_list" in the non paging case.  In
the non-paging case, the SCBs don't really need to be on the free list,
but putting them there clears the tag field which is something the recovery
code depends on.
1997-04-18 16:31:55 +00:00
gibbs
5b06a03240 Re-arange the selection and reselection code to hopefully kill the
spurious selection timeouts that have been reported.
1997-04-14 02:26:59 +00:00
gibbs
3ab172303a aic7xxx.seq:
Be consistant about testing for parity errors after waiting for a
	REQ on the bus.

	Don't ack the last byte in a transaction until after we've cleared
	all target state.

aic7xxx_asm.c:
	Test the return value of getopt against -1 not EOF. (Yet another
	shameless victum of the style guide being wrong).
1997-04-10 19:13:07 +00:00
gibbs
7e5a647dba Instead of testing for both SELDI and SELDO in SSTAT0 in the poll for work
loop, test for them separately.  The bug report from David Malone showed that
even though we had been reselected (SELDI was true), we sat in the poll for
work loop until the selection timeout timer expired.  It may be that the
SSTAT0 register doesn't like to have more than one bit tested at a time.
I've seen stranger things than this on these parts.
1997-04-05 22:03:47 +00:00
gibbs
f7a750c64a Add missing Id that was lost when the sequencer file format changed. 1997-04-04 19:35:30 +00:00
gibbs
da403d57c1 When not using SCB paging, we can always directly index the SCB of interest
either by looking it up in the array of pending, per target, untagged
transactions, or by using the tag value passed in during the identify.  The
old code only direct indexed for tagged transactions.  This makes the
"findSCB" routine only necessary when SCB paging is enabled, so appropriately
conditionalize it.  This greatly simplifies the non SCB paging code flow.
1997-04-04 04:09:29 +00:00
gibbs
bc569a7a8f Re-arrange the code to upload an SCB to ensure that there is at least
on instruction between the last load into the DFIFO and enabling the DMA.
During back to back SCB DMA, it was possible to hang the card.
1997-03-24 05:02:55 +00:00
gibbs
b15d6bfc29 aic7xxx.seq:
Stick 4 more, twin channel only, instructions behind
	.if ( TWIN_CHANNEL)

aic7xxx_asm.c:
	Add the -O options which allows the specification of which options
	to include in a program listing.  This makes it possible to easily
	determine the address of any instruction in the program across
	different hardware/option configurations.  Updated usage() as well.
1997-03-18 19:18:39 +00:00
gibbs
40f591dab8 Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters.  This assembler
	performs some amount of register type checking, allows bit
	manipulation of symbolic constants, and generates "patch tables"
	for conditionalized downloading of portions of the program.
	This makes it easier to take full advantage of the different
	features of the aic7xxx cards without imposing run time penalies
	or being bound to the small memory footprints of the low end
	cards for features like target mode.

aic7xxx.reg:
	New, assembler parsed, register definitions fo the aic7xxx cards.
	This was done primarily in anticipation of 7810 support which
	will have a different register layout, but should be able to use
	the same assembler.  The kernel aic7xxx driver consumes a generated
	file in the compile directory to get the definitions of the register
	locations.

aic7xxx.seq:
	Convert to the slighly different syntax of the new assembler.

	Conditionalize SCB_PAGING, ultra, and twin features which shaves
	quite a bit of space once the program is downloaded.

	Add code to leave the selection hardware enabled during reconnects
	that win bus arbitration.  This ensures that we will rearbitrate
	as soon as the bus goes free instead of delaying for a bit.

	When we expect the bus to go free, perform all of the cleanup
	associated with that event "up front" and enter a loop awaiting
	bus free.  If we see a REQ first, complain, but attempt to
	continue.  This will hopefully address, or at least help diagnose,
	the "target didn't send identify" messages that have been reported.

Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
gibbs
28f5afdb85 No longer clear all interrupt status when the sequencer is reset. The only
time that we really want to do this is when a bus reset causes the sequencer
to be reset and the kernel driver now handles this case.

Remove some reordering in the select2 routine that wasn't necessary.
It was an experimental fix for a race condition I fixed elsewhere, and
confused the code flow.

Don't bother looping on a parity error in the mesgout loop since we can't
see parity errors on out phases.

Clean up the mesgin_identify code.  In the old days, we "snooped" for tag
messages and used this as an indicator of whether or not the target was
using tagged transactions.  This forced the sequencer to ack the identify
before determining if a valid SCB matched the target meaning that an abort
message to handle this case might not be seen before the target entered a
data phase.  Since we can determin the "tagged-ness" of a target by looking
it up in the array of busy targets (recently introduced), we can determine
this up front simplifying the search code as well as ensuring we can follow
the SCSI specs method for rejecting a reselection.

When an SCB is placed on the free list, set its SCB_TAG to SCB_LIST_NULL.
This makes it much easier for the kernel driver to find active SCBs on the
card during error recovery.
1997-02-28 03:51:00 +00:00
gibbs
3d9663354c Leave reselections on all the time.
If we are aborting an SCB from findSCB, don't add it back to the free list -
	the kernel driver will do this for us.
1997-02-25 03:02:58 +00:00
peter
94b6d72794 Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not
ready for it yet.
1997-02-22 09:48:43 +00:00
gibbs
5e400d3141 Enlarge the message out buffer from 6 to 8 bytes. Now that sync and wide
negotiation messages may be tagged, we were overrunning the old buffer.
The variable that was getting squashed is updated before the message goes
out, causing corrupted SDTR or WDTR messages.  Depending on the phases
traversed before message out, this could cause the wrong offset to be
negotiated allowing data overruns to occur.  The problem is easier to
detect with wide targets on the chain since the allowed offset is smaller.

Also removed the unnecessary  clearing of SPIORDY during the message out
phase.  We don't rely on SPIORDY any more.
1997-02-18 20:22:52 +00:00
gibbs
9bbf9bfafb Clear the DFCNTRL register after every busfree.
When setting the HCNT registers, do so in ascending order.

When performing tagged queueing in non-paging mode, also check the
disconnected bit in the SCB as extra sanity during a reconection.

Make the labels in the DMA routine more sane.

When doing a DMA, if we see the DMADONE condition come true, we can
simply turn of the DMA enable bits in DFCNTRL without testing the FIFO
state as HDONE is true when DMADONE is true and this emplies the FIFO is
empty.

These changes clear up the data overrun error messages and seem to prevent
the "timed out in data-in phase" problems.
1997-02-11 17:07:54 +00:00
gibbs
dfc97649f7 Clear the channel after (re)selection instead of once we see the bus go
free.

When we clear SCSIRATE, also clear the FAST20 bit in SXFRCTL0.  This also
allowed me to clean up some of the ULTRA code.

ULTRAENB->FAST20 to follow the convention in the Adaptec data books.

Fix the data-overrun code to set both stcnt and hcnt otherwise, the transfer
will just hang until we get a timeout.

Add implicit support for the NOOP message.  I've never heard of the driver
issueing a reject for one, but its silly to reject NOOP and who knows how a
device might react.

In the dma routine, check SDONE before cleaing SDMAEN.  The data books mention
SDONE possibly being cleared when SDMAEN is reset.  Clients of dma now need
to check if SINDEX is cleared to know if a phasemis occured.

Fix some comments to be correct.
1997-02-09 03:23:28 +00:00
gibbs
7ee6b3a702 In dma_finish, don't disturb the direction bit in DFCNTRL when turning off
host DMAs.  The additional test to ensure that the DMA has stopped is also
unnecessary since we've already waited for the DMA to complete.

Update my copyright for the new year.
1997-02-03 02:02:04 +00:00
gibbs
deadaf1cb7 Add 1997 to my copyright.
Expand the boundaries of a pause disabled region to close of possible race
condition.

Revert a portion of the DMA code to fix false overruns.

Add a missing "add_scb_to_free_list" so we don't leak SCBs.
1997-01-29 05:19:46 +00:00
gibbs
a16faf06d2 Change the way DMA is handled during the command phase. Only test on
SDONE, not HDONE.

In the data phase dma handler, mask off just the enable bits instead of
clearing the whole register.  Clearing the direction bit could be bad.
Also don't stop a DMA until MREQPEND goes false.  Doing this may cause
an ABORT on the PCI bus although I have yet to see this happen.

Add definitions for MREQPEND and the BRDCTL register.  The BRDCTL register
is used to handle high byte termination and automatic termination testing.
1997-01-24 21:57:47 +00:00
gibbs
e95f937a4f Clear the SCSI channel after we go to busfree instead of after re/selection.
Only enable reselections once the channel and SCSIRATE have been cleared.

Add a pause block around the test busy code in the non-tagged case to simplify
error recovery in the corner case of aborting an SCB that just got started.

Simplify reselection processing by removing the call to initialize_scsiid.

Clear the scsiseq re/select control bits and setup for catching bogus
busfrees earlier in the re/select process.

Improve the automatic PIO code.  It turns out that SPIORDY is not a reliable
hardware condition bit, so use REQINIT intstead.  Don't rely on PHASEMIS
either since it can take too long to come true.  Use a brute force comparison
instead.

Remove some unnecessary overhead in the command complete processing.  It
should be nearly impossible to overflow the QOUTFIFO (worst case 9 command
have to complete with at least 6 of them requiring paging on an aic7850),
so don't take the additional PIO hit to guard against this condition.  If we
don't see our interrupt in time, the system has bigger problems elsewhere.
If this ever does happen, the timeout handler will notice and retry the
command.
1997-01-22 18:01:07 +00:00
jkh
808a36ef65 Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.

Boy, I'm glad we're not using sup anymore.  This update would have been
insane otherwise.
1997-01-14 07:20:47 +00:00
gibbs
5d165f4a80 Re-enable reselections as the first thing after we see a bus free. We seem
to miss reselections from some devices and since the reselection response
timeout is only 200ns, enabling reselections too late may be the cause of our
problem.
1996-12-03 17:04:51 +00:00
gibbs
f4da8ee753 Conditionally enable the busfree interrupt to catch unexpected busfrees.
Immediate SCBs, since they always send messages that tell the target to
transition to bus free now rely on the busfree interrupt instead of the
IMMEDDONE sequencer interrupt that was generated before.

Rearrange some code in the message out loop to give ATN a little more time
to drop before we ACK the last byte.

Use SPIORDY instead of REQINIT when snooping for a tag message on a reconnect.
This is done for the same reasons we use SPIORDY in the inb functions.

When going into BITBUCKET mode, turn off HDMAEN in the DFCNTRL register so
that we can "not care" what the value of HCNT is.  If HCNT is 0, BITBUCKET
mode won't transfer any data if HDMAEN is set.  Seeing as we don't want the
transfer to even think about touching the host, this seems more sane anyway.
Thanks to "Dan Willis" <dan@plutotech.com> for pointing out that this was
a problem.
1996-11-22 08:25:23 +00:00
gibbs
093bf696bd Change the way Automatic PIO is performed in the mesgin and mesgout phases.
SPIORDY should go active on any REQ of the bus, so testing for REQINIT is
not necessary.  It also seems that testing for SPIORDY is more robust then
REQINIT since SPIORDY comes active after REQINIT and PHASEMIS seems to take
some time to come true after REQ is asserted if the phase has changed.  Of
course, none of this is documented.

This should give the code savings of my original changes, without breaking the
driver on fast peripherals.
1996-11-21 06:18:33 +00:00
gibbs
5c62ce19d5 Assert that we have seen an identify or have not disconneccted since the
initial selection when entering the status phase.  This is the same assertion
we use for all the other data transfer phases.

Hopefully fix the hangs in the mesgin and mesgout phases that I introduced
last week during some code cleanup.  I need to get some of these 12MB/s
drives so I can reproduce these hangs here...

Add a pause disable in the SCB paging case around our manipulation of the
QOUTQCNT variable.  This is simply extra sanity.

Set LASTPHASE to P_BUSFREE once we see a busfree so that the kernel driver can
differentiate this from a data out phase.
1996-11-16 01:07:35 +00:00
gibbs
73aa471bcc Fix two problems with SCB Paging.
1) get_free_or_disc_scb was not being passed its argument correctly
   in one case

2) Add protection in the form of the QOUTQCNT variable to prevent
   overflowing the QOUTFIFO.

This should make SCB Paging work.  Really, I mean it now. 8-)
1996-11-11 05:16:41 +00:00
gibbs
eea6cd21c7 index_untagged_scb should rely solely on the argument passed in SINDEX and
not access SCB_TCL directly.  This could have caused problems on twin channel
adapters.

2.2 Candidate.
1996-11-05 07:51:29 +00:00