Commit Graph

138127 Commits

Author SHA1 Message Date
hselasky
6fb43c1c15 Sort the ports registers definitions numerically in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:56:27 +00:00
hselasky
a1d0cdd5db Unify prints in mlx5en(4).
All prints in mlx5en(4) should use on of the macros:
mlx5_en_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:49:44 +00:00
hselasky
a4ea37d694 Unify prints in mlx5core.
All prints in mlx5core should use on of the macros:
mlx5_core_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:48:01 +00:00
hselasky
8646971bc1 Add proper print in case of 0x0 health syndrome in mlx5core.
In case of health counter fails to increment it indicates a bad device health.
In case when the syndrome indicated by firmware is 0x0, this indicates that
firmware is unable to respond to initialization segment reads.
Add proper print in this case.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:46:14 +00:00
hselasky
ef65cb579c Add missing blank line at the end of the print in mlx5core.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:45:07 +00:00
hselasky
98f486724d Remove no longer needed fwdump register tables from mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:43:48 +00:00
hselasky
cfd379137e Read rege map from crdump scan space in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:40:23 +00:00
hselasky
0b7cc31be3 Define MLX5_VSC_DOMAIN_SCAN_CRSPACE.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:34:34 +00:00
hselasky
bc8cd0bdaf Use the MLX5_VSC_DOMAIN_SEMAPHORES constant instead of hand-rolled symbol
in mlx5core.

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:33:38 +00:00
hselasky
1524de61fb Move mlx5_ifc_vsc_space_bits and mlx5_ifc_vsc_addr_bits to mlx5_ifc.h.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:32:41 +00:00
hselasky
d02d577963 Make the mlx5_vsc_wait_on_flag(9) function global.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:31:36 +00:00
hselasky
d6e923c7f0 Add port module event software counters in mlx5core.
While at it, fixup PME based on latest PRM defines.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:29:55 +00:00
hselasky
980e2c987e Correct and update some counter names in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:56 +00:00
hselasky
3a8e1da3e2 Export channel IRQ number as part of the "hw_ctx_debug" sysctl(8) in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:08 +00:00
hselasky
5111d166ce Cleanup naming of IRQ vectors in mlx5en.
Remove unused IRQ naming functions and arrays.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:23:33 +00:00
hselasky
bf8cde114e Add support for Multi-Physical Function Switch, MPFS, in mlx5en.
MPFS is a logical switch in the Mellanox device which forward packets
based on a hardware driven L2 address table, to one or more physical-
or virtual- functions. The physical- or virtual- function is required
to tell the MPFS by using the MPFS firmware commands, which unicast
MAC addresses it is requesting from the physical port's traffic.
Broadcast and multicast traffic however, is copied to all listening
physical- and virtual- functions and does not need a rule in the MPFS
switching table.

Linux commit:	eeb66cdb682678bfd1f02a4547e3649b38ffea7e
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:22:22 +00:00
hselasky
375a0becda Implement macro for asserting priv lock in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:16:17 +00:00
hselasky
c0c4cb59bd Fix for missing cleanup code in error case in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:15:07 +00:00
hselasky
0632579b28 Check return value of mlx5_vector2eqn() function in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:14:01 +00:00
hselasky
eed9b8fd7f Make sure the number of IRQ vectors doesn't exceed 256 in mlx5core.
The "intr" field in "struct mlx5_ifc_eqc_bits" is only 8 bits wide.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:12:53 +00:00
hselasky
3318a21063 Update warning and error print formats in mlx5ib.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:11:01 +00:00
hselasky
9d0d705d0f Fix reported max SGE calculation in mlx5ib.
Add the 512 bytes limit of RDMA READ and the size of remote address to the max
SGE calculation.

Submitted by:	slavash@
Linux commit:	288c01b746aa
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:09:28 +00:00
hselasky
965c9cabba Make sure the transmit loop doesn't get starved in ipoib.
When the software send queue gets filled up, callbacks to
if_transmit will stop. Make sure the transmit callback
routine checks the send queue and outputs any remaining
mbufs. Else the remaining mbufs may simply sit in the
output queue blocking the transmit path.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:06:13 +00:00
hselasky
74b308eda0 Notify all sleeping threads of device removal in krping.
Implement d_purge for krping_cdevsw.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:03:48 +00:00
kevans
e3f43eab06 shm_open2(2): completely unbreak
kern_shm_open2(), since conception, completely fails to pass the mode along
to kern_shm_open(). This breaks most uses of it.

Add tests alongside this that actually check the mode of the returned
files.

PR:		240934 [pulseaudio breakage]
Reported by:	ler, Andrew Gierth [postgres breakage]
Diagnosed by:	Andrew Gierth (great catch)
Tested by:	ler, tmunro
Pointy hat to:	kevans
2019-10-02 02:37:34 +00:00
manu
dceda44f26 generic_ehci: Enable all phys and resets
The number of phys and resets is not defined and it controller dependent
so enable/disable every one of them.
2019-10-01 22:20:03 +00:00
manu
75f6d7161a arm: allwinner: a10_ehci: Enable all phys
Even if there should be only one phy enable all the ones declared in
the dts just to be sure.
2019-10-01 22:19:12 +00:00
manu
c2aca19e7c arm: allwinner: a10_ehci: Look for the phy based on the id
phy-names was never in the bindings schema even if it was present
in some DTS. Get the optional phy based on its ID.

PR:		240978
2019-10-01 20:22:54 +00:00
manu
b2f003f508 generic_ohci: Look for the phy based on the id
phy-names was never in the bindings schema even if it was present
in some DTS. Get the optional phy based on its ID.
2019-10-01 20:21:49 +00:00
mav
2a2e1e0397 Improve latency of synchronous 128KB writes.
Before my ZIL space optimization few years ago 128KB writes were logged
as two 64KB+ records in two 128KB log blocks.  After that change it became
~124KB+/4KB+ in two 128KB log blocks to free space in the second block
for another record.  Unfortunately in case of 128KB only writes, when space
in the second block remained unused, that change increased write latency by
imbalancing checksum computation time between parallel threads.

This change introduces new 68KB log block size, used for both writes below
67KB and 128KB-sharp writes.  Writes of 68-127KB are still using one 128KB
block to not increase processing overhead.  Writes above 131KB are still
using full 128KB blocks, since possible saving there is small.  Mixed loads
will likely also fall back to previous 128KB, since code uses maximum of
the last 10 requested block sizes.

On a simple 128KB write test with queue depth of 1 this change demonstrates
~15-20% performance improvement.

MFC after:	2 weeks
Sponsored by:	iXsystems, Inc.
2019-10-01 20:09:25 +00:00
ian
77452ce364 Add 8 and 16 bit versions of atomic_cmpset and atomic_fcmpset for arm.
This adds 8 and 16 bit versions of the cmpset and fcmpset functions. Macros
are used to generate all the flavors from the same set of instructions; the
macro expansion handles the couple minor differences between each size
variation (generating ldrexb/ldrexh/ldrex for 8/16/32, etc).

In addition to handling new sizes, the instruction sequences used for cmpset
and fcmpset are rewritten to be a bit shorter/faster, and the new sequence
will not return false when *dst==*old but the store-exclusive fails because
of concurrent writers. Instead, it just loops like ldrex/strex sequences
normally do until it gets a non-conflicted store. The manpage allows LL/SC
architectures to bogusly return false, but there's no reason to actually do
so, at least on arm.

Reviewed by:	cognet
2019-10-01 19:39:00 +00:00
manu
3d80554b0a syr827: Switch to iicdev_{readfrom,writeto}
Also use IIC_INTRWAIT as we need this to work with the rockchip i2c driver.
2019-10-01 18:32:27 +00:00
manu
c976945339 arm64: rockchip: rk805: Switch to iicdev_{readfrom,writeto}
This simpify the code a bit.
2019-10-01 18:30:06 +00:00
emaste
a079beb4de sysalls.master: remove superfluous ellipsis in comment
A single period is sufficient in this comment, and making this change
lets us find references to varargs syscalls by searching for ...
2019-10-01 17:05:21 +00:00
alc
b5c0c1bef3 In short, pmap_enter_quick_locked("user space", ..., VM_PROT_READ) doesn't
work.  More precisely, it doesn't set ATTR_AP(ATTR_AP_USER) in the page
table entry, so any attempt to read from the mapped page by user space
generates a page fault.  This problem has gone unnoticed because the page
fault handler, vm_fault(), will ultimately call pmap_enter(), which
replaces the non-working page table entry with one that has
ATTR_AP(ATTR_AP_USER) set.

This change reduces the number of page faults during a "buildworld" by
about 19.4%.

Reviewed by:	andrew, markj
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D21841
2019-10-01 15:33:47 +00:00
rstone
f35f9f59ca Clean up duplicate entries in sys/conf/files
Reviewed by:	imp
2019-10-01 13:36:01 +00:00
royger
3bf9d5ecd2 xen/ctrl: acknowledge all control requests
Currently only suspend requests are acknowledged by writing an empty
string back to the xenstore control node, but poweroff or reboot
requests are not acknowledged and FreeBSD simply proceeds to perform
the desired action.

Fix this by acknowledging all requests, and remove the suspend specific
ack done in the handler.

Sponsored by:	Citrix Systems R&D
MFC after:	3 days
2019-10-01 08:21:41 +00:00
brooks
f73831afa6 Regen after r347228 and r352693.
No functional change.
2019-09-30 21:00:19 +00:00
brooks
1f0b5f9a65 Restore the ability to set capenabled directly in syscalls.conf.
This fixes generation of cloudabi syscall tables broken in r340424.

Reviewed by:	kevans, emaste
MFC after:	3 days
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D21821
2019-09-30 20:58:29 +00:00
markj
3cb825da40 Remove more identifiers orphaned by r351742.
Reviewed by:	alc, kib
Differential Revision:	https://reviews.freebsd.org/D21642
2019-09-30 20:39:25 +00:00
kaktus
2f6a23158a linux_renameat2: don't add extra \n on error.
linux_msg() already adds \n at the end of all messages.

Reported by:	emaste, kib (mentor), mjg (mentor)
Reviewed by:	kib (mentor), mjg (mentor)
Differential Revision:	https://reviews.freebsd.org/D21852
2019-09-30 19:05:14 +00:00
markj
ea2f0b0a80 Add IFLIB_SINGLE_IRQ_RX_ONLY.
As of r347221 the iflib legacy interrupt mode setup assumes that drivers
perform both receive and transmit processing from the interrupt handler.
This assumption is invalid in the vmxnet3 driver, so introduce the
IFLIB_SINGLE_IRQ_RX_ONLY flag to make iflib avoid tx processing in the
interrupt handler.

PR:		239118
Reported and tested by:	Juraj Lutter <otis@sk.freebsd.org>
Obtained from:	marius
Reviewed by:	gallatin
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D21831
2019-09-30 15:59:07 +00:00
manu
57d7210f04 arm64: rockchip: rk_clk_pll: Check mode on recalc
If the pll is in slow or deep slow mode return the correct frequency.
2019-09-30 15:01:09 +00:00
manu
ad9caa60bb arm64: rockchip: correct reset value
If bit is 0 the reset is not asserted.
Also register our self as a reset provider, this was commented
in r352850

Reported by:	mmel
2019-09-30 15:00:22 +00:00
kevans
0c6303d3e7 syscalls.master: consistency, move ); to newline (no functional change) 2019-09-30 13:26:16 +00:00
tuexen
5f8f65d380 Don't use stack memory which is not initialized.
Thanks to Mark Wodrich for reporting this issue for the userland stack in
https://github.com/sctplab/usrsctp/issues/380
This issue was also found for usrsctp by OSS-fuzz in
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=17778

MFC after:		3 days
2019-09-30 12:06:57 +00:00
mjg
2e8c47f811 amd64 pmap: batch chunk removal in pmap_remove_pages
pv list lock is the main bottleneck during poudriere -j 104 and
pmap_remove_pages is the most impactful consumer. It frees chunks with the lock
held even though it plays no role in correctness. Moreover chunks are often
freed in groups, sample counts during buildkernel (0-sized frees removed):

    value  ------------- Distribution ------------- count
          0 |                                         0
          1 |                                         8
          2 |@@@@@@@                                  19329
          4 |@@@@@@@@@@@@@@@@@@@@@@                   58517
          8 |                                         1085
         16 |                                         71
         32 |@@@@@@@@@@                               24919
         64 |                                         899
        128 |                                         7
        256 |                                         2
        512 |                                         0

Thus:
1. batch freeing
2. move it past unlocking pv list

Reviewed by:	alc (previous version), markj (previous version), kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D21832
2019-09-29 20:44:13 +00:00
tuexen
5f6d43232d RFC 7112 requires a host to put the complete IP header chain
including the TCP header in the first IP packet.
Enforce this in tcp_output(). In addition make sure that at least
one byte payload fits in the TCP segement to allow making progress.
Without this check, a kernel with INVARIANTS will panic.
This issue was found by running an instance of syzkaller.

Reviewed by:		jtl@
MFC after:		3 days
Sponsored by:		Netflix, Inc.
Differential Revision:	https://reviews.freebsd.org/D21665
2019-09-29 10:45:13 +00:00
kevans
3e6fdbf4be MFD_*: swap ordering
This API is still young enough that I would expect no one to be dependant on
this yet... Swap the ordering while it's young to match Linux values to
potentially ease implementation of linuxolator syscall, being able to reuse
existing constants.
2019-09-29 03:26:29 +00:00
kevans
81f47d4eea fdt_slicer: bump to SI_ORDER_THIRD following r347183
r347183 bumped GEOM classes to SI_ORDER_SECOND to resolve a race between
them and the initialization of devsoftc.mtx in devinit, but missed this
dependency on g_flashmap that may now lose the race against GEOM
classes/g_init.

There's a great comment that describes the situation that has also been
updated with the new ordering of GEOM classes.

Reported by:	bdragon
MFC after:	4 days
2019-09-29 03:12:35 +00:00