533 Commits

Author SHA1 Message Date
obrien
ac195ce76f Sync with the Alpha's GENERIC configuration.
Most of the contents are commented out as they are as-yet untested.
However, I wanted the contents to match our other arches, so that when
people make changes to {i386,alpha,ia64}, they will also make the same
changes here.
2002-02-24 18:49:38 +00:00
jake
0238fc54e2 Make use of the ranged tlb demap operations where ever possible. Use
pmap_qenter and pmap_qremove in preference to pmap_kenter/pmap_kremove.
The former maps in multiple pages at a time, and so can do a ranged
flush.  Don't assume that pmap_kenter and pmap_kremove will flush the tlb,
even though they still do.  It will not once the MI code is updated to use
pmap_qenter and pmap_qremove.
2002-02-23 22:18:15 +00:00
jake
8c583de46f Add needed include of ucontext.h. 2002-02-23 22:03:25 +00:00
jake
63d6dd6dde Add inlines for demapping a range of pages from the itlb and dtlb. This
will be used to reduce the number of tlb shootdown ipis in an smp system
by sending one ipi for a whole range of pages, instead of one per page.
Munge the context demap operations slightly to support demapping a non-primary
context.
2002-02-23 21:10:06 +00:00
jake
b0c5fb0be3 Use intr_disable/intr_restore instead of TLB_ATOMIC_START/END.
Submitted by:	tmm
2002-02-23 20:59:35 +00:00
jake
85b439b694 Use PCB_REG instead of loading the pcb from curthread. This fixes a bug
where %g6 could be inconsistent for 1 instruction.
2002-02-23 20:54:01 +00:00
jake
ed147b733c Adapt the tsb_foreach interface to take a source and a destination pmap so
that it can be used for pmap_copy.  Other consumers ignore the second pmap.
Add statistics gathering for tsb_foreach.
Implement pmap_copy.
2002-02-23 20:25:20 +00:00
jake
f7ad72d5e2 Add statistic gathering for various tsb operations.
Submitted by:	tmm
2002-02-23 20:11:11 +00:00
jake
dd884ba3a2 Remove debug code. 2002-02-23 20:08:06 +00:00
jake
2b394c872f Add statistic gathering for various pmap operations.
Submitted by:	tmm
2002-02-23 20:06:19 +00:00
jake
db96a614fe Remove CADDR1 and CADDR2 which are no longer used. On other architectures
these are used for copy and zeroing physical pages; we use physical addresses
directly.
2002-02-23 20:00:33 +00:00
jake
d715e97c9b Add macros to extract the UPA module id from the UPA config register.
This is the hardware cpuid.
2002-02-23 19:54:34 +00:00
jake
3ed9f58376 1. Setup the user stack pointer before returning to a user trap handler.
If we don't do this here there's a 1 instruction race where an interrupt
   could come in and crash the user process due to having no stack.
2. Pass %fsr to the user trap handler in %l4.  Since %fsr can only be loaded
   from or stored to memory, we need to do some contortions and temporarily
   save it to the alternate global stack.
3. Reload the pcb and pcpu registers for traps in kernel mode, for sanity.

Submitted by:	tmm (1, 2)
2002-02-23 18:55:21 +00:00
jake
fc548e14d2 Include intr_machdep.h only for !LOCORE. 2002-02-23 18:41:34 +00:00
jake
81dc2952a8 Add needed include of ucontext.h. Fix braino setting curpcb. 2002-02-23 18:39:09 +00:00
jake
3ad7e30eb5 Add metadata types for dtlb and itlb data, and number of slots used. 2002-02-23 17:43:44 +00:00
julian
53eb1d9219 Add some DIAGNOSTIC code.
While in userland, keep the thread's ucred reference in a shadow
field so that the usual place to store it is NULL.
If DIAGNOSTIC is not set, the thread ucred is kept valid until the next
kernel entry, at which time it is checked against the process cred
and possibly corrected. Produces a BIG speedup in
kernels with INVARIANTS set. (A previous commit corrected it
for the non INVARIANTS case already)

Reviewed by:	dillon@freebsd.org
2002-02-22 23:58:22 +00:00
phk
fa959f1afd Convert p->p_runtime and PCPU(switchtime) to bintime format. 2002-02-22 13:32:01 +00:00
julian
4efc87c9d9 Catch up with i386 change I forgot to commit. 2002-02-19 03:23:28 +00:00
mike
bcee06d42c o Move NTOHL() and associated macros into <sys/param.h>. These are
deprecated in favor of the POSIX-defined lowercase variants.
o Change all occurrences of NTOHL() and associated marcros in the
  source tree to use the lowercase function variants.
o Add missing license bits to sparc64's <machine/endian.h>.
  Approved by: jake
o Clean up <machine/endian.h> files.
o Remove unused __uint16_swap_uint32() from i386's <machine/endian.h>.
o Remove prototypes for non-existent bswapXX() functions.
o Include <machine/endian.h> in <arpa/inet.h> to define the
  POSIX-required ntohl() family of functions.
o Do similar things to expose the ntohl() family in libstand, <netinet/in.h>,
  and <sys/param.h>.
o Prepend underscores to the ntohl() family to help deal with
  complexities associated with having MD (asm and inline) versions, and
  having to prevent exposure of these functions in other headers that
  happen to make use of endian-specific defines.
o Create weak aliases to the canonical function name to help deal with
  third-party software forgetting to include an appropriate header.
o Remove some now unneeded pollution from <sys/types.h>.
o Add missing <arpa/inet.h> includes in userland.

Tested on:	alpha, i386
Reviewed by:	bde, jake, tmm
2002-02-18 20:35:27 +00:00
wollman
7d29dd10d3 Resurrect one of the easiest changes from my big include files roll-up
patch from a year ago: give file flags their own type.  This does not
(yet) change the type used by system calls or library functions.
The underlying type was chosen to match what is returned by stat().
2002-02-15 22:15:39 +00:00
tmm
a9a5e28ef4 Add a delta missed in the last iommu.c commit. This unbreaks the sparc64
kernel build.

Pointy hat to:	tmm
2002-02-15 14:48:54 +00:00
tmm
ec412094f2 Calculate physmem before calling init_param2().
Submitted by:	jake
2002-02-13 17:05:56 +00:00
tmm
192c359134 Avoid crashing in early boot when WITNESS is enabled by moving the
mtx_init() for intr_table_lock after the globaldata pointer
initialization.
2002-02-13 16:36:44 +00:00
tmm
727706e845 Add the counter-timer node to the exclusion list, as it is handled
specially. While being there, sort that list.
2002-02-13 16:28:40 +00:00
tmm
078cd8f98d Use stxa_sync() when accessing the LSU control register to avoid undefined
behaviour.
2002-02-13 16:25:33 +00:00
tmm
df810ee5f1 Use stxa_sync() when accessing the diagnostic registers to invalidate
caches; this is needed to avoid undefined behaviour.
Clean up a bit.
2002-02-13 16:20:38 +00:00
tmm
0560836106 Add support for the counter-timer which is included in the Sun U2S and
U2P bridges as a time counter.
2002-02-13 16:16:36 +00:00
tmm
b7f14ec97a Add support for the SBus, which is used in early Sun UltraSPARC machines.
Ported from NetBSD.
2002-02-13 16:11:36 +00:00
tmm
aac61c2231 Merge r1.39 from NetBSD (manage both streaming caches for psycho pairs).
Use explicit bus space accesses instead of mapping the device memory
into kva.
Fix support for psycho pairs, and catch up with iommu code changes.
2002-02-13 16:07:59 +00:00
tmm
833609e922 Merge r1.42 of iommu.c and r1.9 of iommuvar.h from NetBSD (this adds
support for managing both streaming caches on psycho pairs).
Use explicit bus space accesses instead of mapping the device memory into
kva.
Move DVMA allocation to the map creation/dma memory allocation functions.
2002-02-13 15:59:17 +00:00
tmm
0c9d147985 Clean up bus space debugging support; change sparc64_bus_mem_map() to
take a bus tag and handle as argument instead of a i/o space id and a
physical address, now that nexus handles device memory resource
allocations.
2002-02-13 15:51:57 +00:00
tmm
1f20dab185 Define constants for the CPU implementation id; export the dectected id
as cpu_impl.
2002-02-13 15:47:12 +00:00
tmm
fd0bcc7a88 Don't panic when no interrupt map can be found for a PCI bus; this seems
to happen on some models, like the Netra T1.
2002-02-13 15:44:58 +00:00
tmm
d1b951ba96 Fix typos in a comment. 2002-02-13 15:43:42 +00:00
tmm
242f49613d Add a few new functions/macros: intr_disable() and intr_restore() to
disable interrupts completely, and stxa_sync(), which performs a store
immediately followed by a membar #Sync with interrupts disabled (this
is needed for writes to diagnostic registers).
2002-02-13 15:40:05 +00:00
tmm
caee904afc Minor bug fixes (add a missing break, correct the resource ranges, remove
a memory leak).
2002-02-13 15:35:22 +00:00
obrien
bb08463f2b Add this FreeBSD standard header. 2002-02-10 14:27:20 +00:00
julian
b5eb64d6f0 Pre-KSE/M3 commit.
this is a low-functionality change that changes the kernel to access the main
thread of a process via the linked list of threads rather than
assuming that it is embedded in the process. It IS still embeded there
but remove all teh code that assumes that in preparation for the next commit
which will actually move it out.

Reviewed by: peter@freebsd.org, gallatin@cs.duke.edu, benno rice,
2002-02-07 20:58:47 +00:00
bde
199578d7e8 Compile osigreturn() unconditionally since it will always be needed on
some arches and the syscall table is machine-independent.  It was
(bogusly) conditional on COMPAT_43, so this usually makes no difference.

ia64: in addition:
- replace the bogus cloned comment before osigreturn() by a correct one.
  osigreturn() is just a stub fo ia64's.
- fix the formatting of cloned comment before sigreturn().
- fix the return code.  use nosys() instead of returning ENOSYS to get
  the same semantics as if the syscall is not in the syscall table.
  Generating SIGSYS is actually correct here.
- fix style bugs.

powerpc: copy the cleaned up ia64 stub.  This mainly fixes a bogus comment.

sparc64: copy the cleaned up the ia64 stub, since there was no stub before.
2002-02-01 15:44:03 +00:00
jake
83bd8bd03b Add extern to avoid sloppy common style declarations.
Tripped over by:	jhb, mux@sneakerz.org
2002-01-16 14:28:50 +00:00
tmm
8418dee397 Add upa.h, which I had previously forgotten, to unbreak the sparc64
kernel build.

Pointy hat to:	tmm
2002-01-08 16:25:51 +00:00
jake
9304ac0dfd Catch up to the latest and greatest. 2002-01-08 05:53:31 +00:00
jake
c6fae03058 Add initial smp support. This gets as far as allowing the secondary
cpu(s) into the kernel, and sync-ing them up to "kernel" mode so we can
send them ipis, which also work.

Thanks to John Baldwin for providing me with access to the hardware
that made this possible.

Parts obtained from:	bsd/os
2002-01-08 05:50:26 +00:00
jake
68d3ae71f6 Setup the normal global pcb register as well on entry from user land.
Call critical_enter/critical_exit around (fast) interrupt handlers.  All
non-threaded interrupts are fast, and the threaded interrupt scheduler is
itself a fast interrupt.
Assert that an interrupt handler we are about to call is non-zero.
Be paranoid about restoring the users global registers.  Do it as the
last thing before switching to alternate globals (when we magically get
our preloaded registers back), and do it with interrupts disabled.  Any
kind of kernel trap when the globals are not setup properly is bad news.
Don't save and restore the kernel g6, it invariably points to the current
pcb now.
2002-01-08 05:37:52 +00:00
jake
f4c697794d Adapt the vectored interrupt handler for receiving ipis. If the second
data word in an interrupt packet is non-zero, it points to code to execute
to handle the ipi, so jump to it instead of enqueueing the packet.  It
is unclear if we will need queued ipis.
Interrupt g7 now points to pcpu, instead of to the per-cpu interrupt queue
itself, so use that instead.  Interrupt g6 is no longer reserved.
2002-01-08 05:27:13 +00:00
jake
a6184c4ddb Use the per-cpu panic stack in the case of a fault with a bad kernel
stack.
2002-01-08 05:20:40 +00:00
jake
0d87bee2b4 Remove ATOMIC_INC_INT macro which has moved elsewhere. 2002-01-08 05:17:28 +00:00
jake
0d46a69b72 Catch up to change in compile time assertion interface. 2002-01-08 05:15:31 +00:00
jake
28332fb455 Make this code more robust in the event of stray interrupts. Handle
stray level interrupts as well.
2002-01-08 05:13:29 +00:00