Commit Graph

3860 Commits

Author SHA1 Message Date
peter
72c8222cf4 MFi386 rev 1.207 (phk): Don't mistakenly disable the TSC when using
statclock_disable.

Approved by:  re (scottl)
2003-11-21 02:53:49 +00:00
peter
cc3418dd77 Argh! Followup to previous commit. I checked in the patch with an
unintended local change.  Change Xurthread back to curthread.
2003-11-20 23:49:28 +00:00
peter
855c7a569b Provide a streamlined '#define curthread __curthread()' for amd64 to avoid
the compiler having to parse and optimize the PCPU_GET(curthread) so often.
__curthread() is an inline optimized version of PCPU_GET(curthread) that
knows that pc_curthread is at offset zero in the pcpu struct.  Add a
CTASSERT() to catch any possible changes to this.  This accounts for
just over a 1% wall clock speedup for total kernel compile/link time,
and 20% compile time speedup on some specific files depending on which
compile options are used.

Approved by:  re (jhb)
2003-11-20 22:54:44 +00:00
peter
404972795a Sync with i386.
- turn on SMP in generic
- add 'device atpic' - this is unconditional on i386, but certain nvidia
  based systems need to disable acpi because the reference bios seems to be
  hosed.  If acpi is disabled, we won't find the apic.  amd64 has the
  mptable code in a seperate compile option as well.
- turn sym back on, it doesn't fail to compile anymore.

Approved by: re
2003-11-19 18:11:27 +00:00
peter
acbbfb5fbd Add SMP changes as should have been committed as rev 1.28 2003-11-17 09:19:12 +00:00
peter
f55fcb6647 Restore file accidently killed in the crossfire from the smp commit. 2003-11-17 09:11:04 +00:00
peter
9dedda25aa Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
  (in particular, bootstrap)
- This is still a WIP.  It seems that there are some highly bogus bioses
  on nVidia nForce3-150 boards.  I can't stress how broken these boards
  are.  I have a workaround in mind, but right now the Asus SK8N is broken.
  The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE.  SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
  atpic' in addition, because they somehow managed to forget to connect the
  8254 timer to the apic, even though its in the same silicon!  ARGH!
  This directly violates the ACPI spec.
2003-11-17 08:58:16 +00:00
peter
ac20ea6dcd Oh, how embarresing. I broke my own platform. :-) 2003-11-17 07:50:59 +00:00
peter
d29883b254 Widen the enable/disable helper function's argument in line with the
ithread_create() changes etc.  This should be mostly a NOP.
2003-11-17 06:10:15 +00:00
bde
efa9a611d9 Fixed pedantic warnings for statement-expressions using __extension__
and by not using a statement-expression for the non-expression
__PCPU_SET().
2003-11-17 04:40:58 +00:00
bde
59742d249e Fixed a pedantic syntax error (a stray semicolon at the end of
PCPU_MD_FIELDS).
2003-11-17 03:40:41 +00:00
alc
aea6af995e - Remove unnecessary synchronization from sf_buf_init(). (There is only
one active CPU when sf_buf_init() is performed.)
2003-11-16 23:40:06 +00:00
alc
74614e7f63 - Modify alpha's sf_buf implementation to use the direct virtual-to-
physical mapping.
 - Move the sf_buf API to its own header file; make struct sf_buf's
   definition machine dependent.  In this commit, we remove an
   unnecessary field from struct sf_buf on the alpha, amd64, and ia64.
   Ultimately, we may eliminate struct sf_buf on those architecures
   except as an opaque pointer that references a vm page.
2003-11-16 06:11:26 +00:00
bde
60cfaec287 Localized the cy driver's locking. 2003-11-16 00:55:54 +00:00
njl
1f1358c8e0 Add the pc_acpi_id PCPU member. The new acpi_cpu driver uses this to
dereference the softc.
2003-11-15 18:58:29 +00:00
peter
03bc446f3f Preemptively burn a bridges. The isa timer code is likely to be
replaced by the HPET timer at some point, so dont even make a release
with the aquire/release_timer0 functions.
2003-11-14 22:34:43 +00:00
peter
4c65df1b6e Minor source sync with amd64. Use int as the type for the width
field of %.*s rather than size_t.
2003-11-14 22:29:21 +00:00
peter
a04c723d6a Minor source sync with amd64. For %.*s printf formats, pass in an
int rather than a size_t.  cast the ioapicaddress variable via
uintptr_t before going to void *.
2003-11-14 22:26:29 +00:00
peter
bd6ac1d6e5 Convert a couple of pointers to integers for source compatability with
amd64.
2003-11-14 22:23:30 +00:00
peter
e928c72a09 Whitespace nit (sorry, couldn't help it) 2003-11-14 22:21:30 +00:00
jhb
5d2ca74893 Always install IDT entries for ATPIC interrupt sources. The APIC no
longer uses these interrupt vectors for its ISA interrupt pins, so these
entries will not be overwritten.  If we get a spurious interrupt from the
ATPIC when using the APIC, it will be treated as a stray interrupt instead
of causing a panic.
2003-11-14 21:02:49 +00:00
jhb
642972defa If an interrupt source doesn't have an ithread, treat it as a stray
interrupt.  This can only happen if an unregistered interrupt source
triggers an interrupt.
2003-11-14 21:00:32 +00:00
peter
af7f62665d basemem is in K, not bytes. I think I tricked jhb into making the same
mistake I did and then committing it to cvs.
2003-11-14 20:51:07 +00:00
peter
25398f67bb "opt_auto_eoi.h" is not used here anymore. See atpic.c. 2003-11-14 20:06:24 +00:00
jhb
398b81cbfe Replace magic numbers with macros for i8259A register constants. Still
need the ICW4 bits for PC98 though.
2003-11-14 19:13:06 +00:00
jhb
97b2405ad5 Shuffle the APIC interrupt vectors around a bit:
- Move the IPI and local APIC interrupt vectors up into the 0xf0 - 0xff
  range.  The pmap lazyfix IPI was reordered down next to the TLB
  shootdowns to avoid conflicting with the spurious interrupt vector.
- Move the base of APIC interrupts up 16 so that the first 16 APIC
  interrupts do not overlap the vectors used by the ATPIC.
- Remove bogus interrupt vector reservations for LINT[01].
- Now that 0xc0 - 0xef are available, use them for device interrupts.
  This increases the number of APIC device interrupts to 191.
- Increase the system-wide number of global interrupts to 191 to catch up
  to more APIC interrupts.

Requested by:	peter (2)
2003-11-14 19:10:13 +00:00
peter
1e116ec1a8 Fix up the control word 3 bits. jhb discovered how much I screwed this
up. :-]
2003-11-14 18:20:20 +00:00
jhb
c7b89dee16 Whitespace. 2003-11-13 18:16:37 +00:00
jhb
2b7e5ca79f Fix a typo. 2003-11-13 16:41:07 +00:00
peter
72cf6d90a3 Stop pretending to support kernel profiling. The FAKE_MCOUNT() etc
calls are just gradually getting more and more stale.  At this point it
would be better to start from scratch once prof_machdep.c is adapted.
2003-11-13 02:38:33 +00:00
jhb
9428d57b9b - Move manipulation of td_intr_nesting_level out of assembly interrupt
vector stubs and into the C functions they call.
- Move disabling and EOIing of interrupt sources out of PIC driver entry
  points and into intr_execute_handlers().  Intr_execute_handlers() only
  disables a source for an interrupt if it is a stray interrupt or has
  threaded handlers.  Sources with fast handlers no longer disable (mask)
  the source while executing the handlers.
- Move the setting of clkintr_pending into intr_execute_handlers() and set
  the variable for any interrupt source with a vector of 0.  (Should only
  be true for IRQ 0.)  This fixes clkintr_pending in the NO_MIXED_MODE
  case.
- Implement lapic_eoi() and use it to implement ioapic_eoi_source().
- Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to
  handle all atpic interrupts and not just threaded ones.

Inspired by:	peter's changes to amd64 in p4 (1)
Requested by:	bde (2)
2003-11-12 18:13:57 +00:00
peter
2d3fabf548 Cosmetic sync with i386 2003-11-12 01:49:49 +00:00
jhb
39d0219649 Don't probe busses in the MP Table for the MP Table PCI bridge drivers
if the bus number doesn't correspond to a PCI bus in the MP Table.

Reported by:	jhay
2003-11-11 21:19:43 +00:00
jhb
bd8a6e05f8 Some motherboards like to remap the SCI (normally IRQ 9) up to a PCI
interrupt such as IRQ 22 or 19.  However, the ACPI BIOS still routes
interrupts from some PCI devices to the same intpin calling the pin
IRQ 22.  Thus, ACPI expects to address a single interrupt source via two
different names.  To work around this, if the SCI is remapped to a non-ISA
interrupt (i.e., greater than 15), then we use
acpi_OverrideInterruptLevel() function to tell ACPI to use IRQ 22 or 19
rather than IRQ 9 for the SCI.

Previously we would change IRQ 22 or 19's name to IRQ 9 when we encountered
such an Interrupt Source Override entry in the MADT which routed the SCI
properly but left PCI devices mapped to IRQ 22 or 19 w/o a routable
interrupt.

Tested by:	sos
2003-11-11 18:20:10 +00:00
jhb
b128cb00e2 Enable HTT CPUs by default instead of halting them by default. Users
should now only have HTT CPUs if they have explicitly asked for them
either by enabling HyperThreading in the BIOS or by using the
MPTABLE_FORCE_HTT kernel option.
2003-11-11 17:16:15 +00:00
jhb
79be2e97e9 Disable probing of HTT CPUs by default for the MP Table case. HTT CPUs
should only be used if they are enabled in the BIOS.  Now that we support
enumerating CPUs using the ACPI MADT, any HTT machine using ACPI should
respect the BIOS setting.  For HTT machines with ACPI disabled in the
kernel, the MPTABLE_FORCE_HTT kernel option can be used to try to probe HTT
CPUs like have done in the past for the MP Table case.  This option should
only be enabled if HTT is enabled in the BIOS.
2003-11-11 17:14:26 +00:00
jhb
68cae19322 MFamd64 (via P4, not in CVS yet):
- Use the static boot_address variable directly rather than passing it
  around to several functions.
- Clean up a couple of magic numbers.
2003-11-10 21:24:34 +00:00
jhb
28b603f1f4 Bump APIC ID limits up to 32 since a machine with 16 CPUs will have APIC
IDs for the I/O APICs that are greater than 16.

Reported by:	John Cagle <john.cagle@hp.com>
2003-11-10 19:52:58 +00:00
marcel
21340f30b3 Change the clear_ret argument of get_mcontext() to be a flags argument.
Since all callers either passed 0 or 1 for clear_ret, define bit 0 in
the flags for use as clear_ret. Reserve bits 1, 2 and 3 for use by MI
code for possible (but unlikely) future use. The remaining bits are for
use by MD code.

This change is triggered by a need on ia64 to have another knob for
get_mcontext().
2003-11-09 20:31:04 +00:00
peter
b652116ae9 Move a MD 32 bit binary support routine into the MD areas. exec_setregs
is highly MD in an emulation environment since it operates on the host
environment.  Although the setregs functions are really for exec support
rather than signals, they deal with the same sorts of context and include
files.  So I put it there rather than create yet another file.
2003-11-08 07:43:44 +00:00
peter
2edc2f597b Update the graffiti. 2003-11-08 04:39:22 +00:00
peter
c32b37e0ed Switch from having a fpu "device" to something that is more like the
integrated part of the cpu core that it is.
2003-11-08 04:37:54 +00:00
peter
a2fff099b7 The great s/npx/fpu/gi 2003-11-08 03:33:38 +00:00
peter
e3ffb41b64 Converge with i386/GENERIC 2003-11-08 03:17:36 +00:00
peter
e27aec25ab Rename npx* to fpu*. I haven't done the flags/function names yet. 2003-11-08 02:39:46 +00:00
peter
bcb110396e There isn't much point printing 'npx0: INT 16 interface' because that is
the only way it works here.
2003-11-08 00:13:43 +00:00
jhb
0d68cc1731 Dump the trigger and polarity of each intpin's default setting in the
bootverbose output.
2003-11-07 23:44:35 +00:00
scottl
e3855085d1 Document the lockfunc and lockfuncarg arguments to bus_dma_tag_create() in
the busdma headers.
2003-11-07 23:29:42 +00:00
jhb
f09704e3ea Only disable the old pin when doing a remap if it's current vector is still
the old vector.

Reported by:	sam
2003-11-06 14:47:53 +00:00
peter
be32bf8001 OK, this might be a bit silly, but add another popcnt() candidate. 2003-11-06 01:24:25 +00:00