(mutant) Crystal CSS4236 chip on the Intel PR440FX SMP motherboard.
XXX this uses some rather ugly PnP bootstrap code that is *NOT* compatable
with 'controller pnp0' or *ANY* other PnP devices. If you use some other
PnP devices, enabling css0 will burn your house down. :-] The
"simplified" PnP init sequence directly blats your config(8) settings onto
the chip. I'm pretty sure 'css0' will conflict with 'mss0', this whole
area desperately needs a cleanup.
I have been using the following with some success on the PR440FX:
controller snd0
device css0 at isa? port 0x534 irq 5 drq 1 flags 0x08 vector adintr
device opl0 at isa? port 0x388
device mpu0 at isa? port 0x330 irq 10 vector mpuintr
Here are the remanding changes required to support the Ensoniq
Soundscape using FreeBSD 3.0-current.
Notes:
1) ad1848_init already has code to detect if DMA_DUPLEX should
be set so it is not necessary (and is in fact a mistake) to
hard code setting it. Not all soundcards (i.e. the current
sscape driver) are capable of using DMA_DUPLEX.
2) The other changes are hopefully self explanatory. Feel free
to let me know if you need additional information.
Submitted by: john@feith.com (John Wehle)
follow.
* Rename/reorder all of the pccard structures, change many of the member
names to be descriptive, and follow more closely other 'bus' drivers
naming schemes.
* Rename a bunch of parameter and local variable names to be more
consistant in the code.
* Renamed the PCCARD 'crd' device to be the 'card' device
* KNF and make the code consistant where it was obvious.
* ifdef'd out some unused code
i was at it, do no longer insist on `PCVT_FREEBSD' being declared in
the config file, but default it to a reasonable value.
More cleanup to follow, but this part is safe for RELENG_2_2, too.
has a PS/2 port, this is a good thing. Note, older 386/486 boxes may
lockup the keyboard controller with this enabled, but most of these kinds
of machines don't run -current, so the benefits outweigh the downsides.
Discussed with: Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
- CPU_CYRIX_NO_LOCK enables weak locking. If this option is not set and
FAILESAFE is defined, NO_LOCK bit of CCR1 is cleared.
- CPU_WT_ALLOC enables write-through allocation.
of multiple PCI IDE controllers(Dyson), and some updates and cleanups from
John Hood, who originally made our IDE DMA stuff work :-).
I have run tests with 7 IDE drives connected to my system, all in DMA
mode, with no errors. Modulo any bugs, this stuff makes IDE look
really good (within it's limitations.)
Submitted by: John Hood <cgull@smoke.marlboro.vt.us>
internal modems. Currently detects a USR modem, and a couple Supra
modems... vendor id's for sio capabile cards welcomed...
document new option EXTRA_SIO that will increase sio's internal data
structures to support X more serial ports... these are used by the
PnP part of sio for attaching... If you don't have it specified, it
will default to 2... This is defaulted to 0 if you don't have PnP
compiled into your kernel...
also document that if you set the PnP flags (pnp x flags y) to 0x1 that
the modem will be refused to be recognized by the sio driver... this
is for people that want the traditional isa driver to probe and attach
the modem... (for keeping legacy sio numbering)
Hide the bogus FDC ``chip type'' display behind a (mostly) undocumented
option, since people started to trust the bogus claim. Once we're going
to handle 2.88 MB controllers, we have to redo the chip detection, by
now just leave it hidden.
files.i386.
We aren't sure if this new code and the old sound code will co-exist in a
kernel, so the device pcm0 line is left commented out in LINT.
Submitted-by: Luigi Rizzo
you don't want this (and the documentation explains why), but if you
use ipfw as an as-needed casual filter as needed which normally runs as
'allow all' then having the kernel and /sbin/ipfw get out of sync is a
*MAJOR* pain in the behind.
PR: 4141
Submitted by: Heikki Suonsivu <hsu@mail.clinet.fi>
* lots of fixes to error handling-- mostly works now
* improve DMA timing config for Triton chipsets-- PIIX4 and UDMA drive
still untested
* generally improve DMA config in many ways-- mostly cleanup
* clean up boot-time messages
* rewrite PRD generation algorithm
* first wd timeout is now longer, to handle drive spinup
Submitted by: John Hood <cgull@smoke.marlboro.vt.us>
