13270 Commits

Author SHA1 Message Date
sos
44e51c4adc Now that probing is working in the new fashion, we need to go back to
having ata_getparm issue an ata_request and not fool around with the HW
on its own.
Needed for new HW support.
2005-04-29 11:30:03 +00:00
imp
d9ce4b2c6b Add a detach for pci bridge and pci bus drivers. This allows one to
theoretically unload pci bridges or pci drivers.  It will also allow
detach to work if one needed to detach a subtree.

This is inspired by looking at the p4 commits from bms to his 5.4
tree, but I didn't look at the final results.
2005-04-29 06:22:41 +00:00
scottl
6a5362b1bc Only create the rdpti alias if the asr device creation succeeds. 2005-04-29 04:47:11 +00:00
scottl
f1512277b5 Don't bother pretending that CAM will send CAM_DATA_PHYS pointers. It's
a concept that is fundamentally broken with PAE.
2005-04-29 02:58:23 +00:00
marcel
6d5a555d4b In pcib_alloc_resource() check if the resource allocation request is
for the VGA I/O or memory ranges, when it's not within the default
ranges decoded by the bridge. When allocation for VGA addresses is
attempted, check that the bridge has the VGA Enable bit set before
allowing it.
As such, newbusified VGA drivers can allocate their resources when
the VGA adapter is behind a PCI-to-PCI bridge.

Reviewed by: imp@, jhb@
2005-04-29 02:15:40 +00:00
marcel
05efdf30cf Add pci_is_vga_ioport_range() and pci_is_vga_memory_range() as inline
functions. These functions centralize the details of which I/O port
and memory ranges belong to VGA.

Reviewed by: imp@, jhb@
2005-04-29 02:03:11 +00:00
marcel
662415efd6 Add defines for the Bridge Control Register bits.
Obtained from: jhb@
2005-04-29 01:58:27 +00:00
sos
77e24e4928 Provide a default setmode method.
This shaves off multiple copies of the same setmode stub.
2005-04-28 22:15:44 +00:00
sos
99fa5be8ed Rearrange the way the reset code is called.
Prepare for different looking controllers.
2005-04-28 22:08:08 +00:00
ps
9c8b8647e1 Add support for the P600 and name the E400. 2005-04-28 14:40:23 +00:00
jkoshy
cb5a9ccd73 Return the correct register number in the 'get_msr()' MD function.
Only allow a process to use the x86 RDPMC instruction if it has
allocated and attached a PMC to itself.

Inform the MD layer of the "pseudo context switch out" that needs
to be done when the last thread of a process is exiting.
2005-04-28 08:13:19 +00:00
marcel
4caac8b973 Make the Z8530 more reliable as low-level console by making use of the
fact that access to RR0 does not need a prior write to the register
index because the index always reverts to 0 after the indexed register
has been accessed.

Typically when a RR or WR is to accessed, one programs the index (which
is a write to the control register), followed by a read or write to the
actual indexed register (a read pr write to the same control register).
When this non-atomic sequence is interrupted after having written the
index and low-level console I/O is done in that situation, the write to
program the index will actually write to the indexed register and nuke
state. This almost always yields a wedge.

By not programming the index register and instead just reading from RR0,
the worst case scenario is non-fatal. For if we don't actually read from
RR0 but some other register we get an invalid status, which may lead us
to conclude that the transit data register is empty when it's not or that
the receive data register contains data when it doesn't. Hence, we may
lose an output character or get a sporadic input character, but given
the situation this is a non-issue.

Full serialization is not possible due to the fact that this code needs
to work from DDB and before mutex initialization has happened.

In collaboration with: kris@, marius@
Tested by: kris@
MFC after: 1 day
X-MFC: 5.4-RELEASE candidate
2005-04-27 21:57:51 +00:00
julian
1fe881be97 Add code from Kazuhito HONDA that allows the user to see
the available modes in /dev/sndstat.
e.g.
pcm1: <USB Audio> at addr ? (0p/1r/0v channels duplex)
        mode 1:(input) 1ch, 16/16bit, pcm, 44100Hz
	mode 2:(input) 1ch, 16/16bit, pcm, 22050Hz
	mode 3:(input) 1ch, 16/16bit, pcm, 11025Hz
	mode 4:(input) 1ch, 16/16bit, pcm, 8000Hz
2005-04-27 17:16:27 +00:00
obrien
a757638684 I missed a s/nv/nve/.
Submitted by:	Tai-hwa Liang <avatar@mmlab.cse.yzu.edu.tw>
2005-04-26 16:07:50 +00:00
scottl
5e7fbbbdc2 Remove an extra mutex unlock in the morpheus interrupt handler.
PR: 80246
Submitted by: Dean Strik
MFC After: 3 days
2005-04-26 13:38:29 +00:00
sos
ab882dca1f Fix a bug introduced in r1.89 thats caused leak of requests, and possibly
bogus data to be written.
2005-04-26 06:42:33 +00:00
wpaul
9c27269632 Remove the extra EEPROM reload step I added before. vge_reset()
already does this anyway.
2005-04-25 23:26:20 +00:00
scottl
72524cc1b2 Apply a torniquet to the problem of the drive unexpectedly disconnecting
during a data phase.  Before, we would try to recover the autosense, but
the DMA engine would still be active with interrupted transfer, and we'd
quickly spiral out of control and cause massive data corruption.  For now,
just reset the chip and cancel everything.  The better solution is to
cancel the DMA operation, but there is no clear way to do that right now.
The data corruption problem is severe enough to warrant this fix in the
interim.  Thanks to Kris Kenneway to sacrificing countless filesystems to
this bug.

MFC After: 3 days
2005-04-25 22:11:43 +00:00
wpaul
c66cc39233 Correct the if_link_state_change() logic: when the link went down,
if_link_state_change() reported link up, and when the link went up,
if_link_state_change() reported link down. These should be swapped.
2005-04-25 18:37:27 +00:00
wpaul
06ecb5ca5d Reading the EEPROM to learn the station address doesn't seem to work
on boards with VIA gigE controllers that are embedded in VIA chipsets.
Presumably, they don't have an external EEPROM and store the MAC
address somewhere else. To get around this, force an autoload and
read the station address from the RX filter registers instead.
This has been tested to work on both embedded and standalone
controllers.
2005-04-25 18:29:42 +00:00
bz
cd218c4d5b Deal with failed malloc calls[1].
While there also check for failed device_add_child calls.

Found by:	Coventry Analysis tool[1].
Submitted by:	sam[1]
Approved by:	pjd (mentor)
MFC after:	1 week
2005-04-25 10:18:24 +00:00
sos
0841bd55a7 Cosmetics 2005-04-25 07:57:04 +00:00
sos
59f595842e Only try to allocate and use the SATA resource if they are enabled
by the BIOS. It seems some BIOS's doesn't get this right, and that would
result in ATA panic'ing.
2005-04-25 07:50:51 +00:00
phk
dbbbd2e74d Retire the musycc E1/T1 driver 2005-04-25 07:08:42 +00:00
wpaul
b493dd59e2 Throw the switch on the new driver generation/loading mechanism. From
here on in, if_ndis.ko will be pre-built as a module, and can be built
into a static kernel (though it's not part of GENERIC). Drivers are
created using the new ndisgen(8) script, which uses ndiscvt(8) under
the covers, along with a few other tools. The result is a driver module
that can be kldloaded into the kernel.

A driver with foo.inf and foo.sys files will be converted into
foo_sys.ko (and foo_sys.o, for those who want/need to make static
kernels). This module contains all of the necessary info from the
.INF file and the driver binary image, converted into an ELF module.
You can kldload this module (or add it to /boot/loader.conf) to have
it loaded automatically. Any required firmware files can be bundled
into the module as well (or converted/loaded separately).

Also, add a workaround for a problem in NdisMSleep(). During system
bootstrap (cold == 1), msleep() always returns 0 without actually
sleeping. The Intel 2200BG driver uses NdisMSleep() to wait for
the NIC's firmware to come to life, and fails to load if NdisMSleep()
doesn't actually delay. As a workaround, if msleep() (and hence
ndis_thsuspend()) returns 0, use a hard DELAY() to sleep instead).
This is not really the right thing to do, but we can't really do much
else. At the very least, this makes the Intel driver happy.

There are probably other drivers that fail in this way during bootstrap.
Unfortunately, the only workaround for those is to avoid pre-loading
them and kldload them once the system is running instead.
2005-04-24 20:21:22 +00:00
anholt
f52bea2757 Fix a panic on X startup for drivers that don't init maps themselves by storing
the return value of drm_ioremap in the right place again.

Submitted by:	tegge
2005-04-24 19:03:32 +00:00
scottl
2648cc9805 Fix the order of the lowaddr,highaddr arguments in the parent tag. This
coincidentally didn't cause any problems, but was definitely wrong.
2005-04-24 02:45:27 +00:00
mux
c5baa061e7 Be more conservative when enabling extended features. There are fxp(4)
NICs out there that have an utterly bogus revision ID.

Reported by:	Denis Shaposhnikov <dsh@vlink.ru>
2005-04-22 13:05:53 +00:00
imp
620c981ecd Sort Oxford Semi entires. Add entry for OXCB950, a PCI/CardBus
16C950.  Adding it here doesn't unlock any of the cool 16C950 features
(like the 128 byte fifo, the different prescalor, etc), but it does
seem to get it working for me in light testing.

Card Provided by: Ihsan Dogan
2005-04-22 07:49:35 +00:00
scottl
92c02688a6 If we get interrupted during a data phase and the DMA engine is still
pumping data despite our scsi data counters being at 0, something has
gone massively wrong.  The consequence of happily ignoring this is more
DMA phase errors and a disk full of spammed sectors.  Instead, panic on
the first occurance to hopefully limit the damage.

MFC After: 3 days
2005-04-22 03:37:10 +00:00
mux
667f732128 Add a microcode to implement receive bundling for 82551 chipsets with
a revision ID of 0x0f (D102 E-step).

MFC after:	2 weeks
Tested by:	pav
2005-04-21 19:34:57 +00:00
mux
510a2f302a Enable extended RFDs and TCBs, and thus checksum offloading, for
latest 82550 and 82551 chipsets (revision IDs 0x0e, 0x0f and 0x10).
We were only enabling it for revisions 0x0c and 0x0d, now it's
enabled for any 8255x NIC with a revision ID bigger than 0x0c.  It
should be safe, and this is what Intel does in their open source
driver.

MFC after:	2 weeks
Tested by:	Pavel Lobach lobach_pavel at mail dot ru
2005-04-21 13:27:38 +00:00
sos
50df456889 Rehash the timeout code to make it more simple.
This also removes the warning timeout on the taskqueues stalling as
I'm tired of getting ATA error reports for problems in other parts ;)
Misc cosmetic and comment cleanups now we are here.
2005-04-21 11:13:39 +00:00
njl
e238554b5c Add the tunable "debug.acpi.max_threads" to allow users to set the
number of task threads to start on boot.  Go back to a default of 3
threads to work around lost battery state problems.  Users that need
a setting of 1 can set this via the tunable.  I am investigating the
underlying issues and this tunable can be removed once they are solved.

MFC after:	2 days
2005-04-21 06:13:48 +00:00
marcel
eda3bd9ab9 Include <sys/pmc.h> instead of <machine/pmc_mdep.h>. The MI header
includes the MD header for us. Do not include <machine/specialreg.h>
as it is not a header file that can be included from MI files. It
is included from <machine/pmc_mdep.h> if so needed and possible.

Ok'd: jkoshy@
2005-04-20 20:26:39 +00:00
sos
01d6e824de When a rebuild is done, properly mark the arrays as functional again. 2005-04-20 14:14:08 +00:00
sos
05ce5bbeb6 Properly hook in devices found by SATA connect events.
This broke on the changes done to get atapicam happy earlier.
2005-04-20 12:51:54 +00:00
jkoshy
6f78472e11 Remove dead variable. 2005-04-20 04:43:30 +00:00
wpaul
c67b019336 Small cleanup of the WPA code additions. The SIOCG80211 and SIOCS80211
ioctls are now handled explicitly, but we can't really do anything
with them unless the NIC is up (trying to get/set a parameter when
the NDIS driver isn't running always yields an error). If something
invokes either of these ioctls and the NIC isn't initialized, punt
to the default ieee80211_ioctl() routine.
2005-04-20 02:17:53 +00:00
imp
b98f7a4083 Remove unused variable that was horking up the LINT build 2005-04-19 21:40:49 +00:00
imp
5b5f397dfc Minimal changes to get this to compile with -DDEBUG defined as well
as hack a couple used before set warnings for LINT happiness.
2005-04-19 21:12:57 +00:00
wpaul
a5cc987ac6 Add preliminary support for WPA-PSK using wpa_supplicant and the
net80211 code, graciously contributed by Arvind Srinivasan.

Submitted by:	Arvind Srinivasan arvind at celar daht us
2005-04-19 15:30:44 +00:00
sos
6762159f44 CFA (Compact Flash) devices has a special config ID that fails the
normal ATA device check in ata-disk.c. Add support for the CFA magic.
2005-04-19 12:33:26 +00:00
ps
b7632e9a5b Provide a way to soft reset a proxy controller such as an MSA20 or
MSA500.  This is useful if you need to reset one of the storage
arrays on reboot.
2005-04-19 06:11:16 +00:00
sos
046acb18c8 Fix indentation problem in the last commit 2005-04-19 05:28:08 +00:00
jkoshy
dc3444cd91 Bring a working snapshot of hwpmc(4), its associated libraries, userland utilities
and documentation into -CURRENT.

Bump FreeBSD_version.

Reviewed by:	alc, jhb (kernel changes)
2005-04-19 04:01:25 +00:00
phk
b7f29c0fc0 Add a named reference-count KPI to hold off mounting of the root filesystem.
While we wait for holds to be released, print a list of who holds us
back once per second.

Use the new KPI from GEOM instead of vfs_mount.c calling g_waitidle().

Use the new KPI also from ata.

With ATAmkIII's newbusification, ata could narrowly miss the window
and ad0 would not exist when we tried to mount root.
2005-04-18 21:21:26 +00:00
damien
8e5cb227ae Initial import of ipw, iwi, ral and ural drivers:
ipw  - Intel PRO/Wireless 2100
iwi  - Intel PRO/Wireless 2200BG/2225BG/2915ABG
ral  - Ralink Technology RT2500
ural - Ralink Technology RT2500USB

Approved by:	silby (mentor)
2005-04-18 18:47:38 +00:00
sos
97d6dd54fd Add uma zone for composite ops.
Submitted by:	des
2005-04-18 16:01:56 +00:00
sos
47b4ce0270 Adjust the RAID type pickup code for the VIA, we dont actually care
if the array is bootable or not (yet).
2005-04-18 13:51:03 +00:00