Commit Graph

123 Commits

Author SHA1 Message Date
jhb
de01564f85 Don't bother clearing maps for static DMA allocations to NULL. Instead,
leave them as purely opaque values that are only set by bus_dmamem_alloc().
2014-06-17 18:10:06 +00:00
mav
43701d4645 Correct AMD chipsets identification.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2014-04-17 14:16:02 +00:00
mav
7cf333c5cb Add ID for one more ASMedia AHCI-compatible controller.
Reported by:	ignace.peeters@gmail.com
MFC after:	2 weeks
2014-01-17 17:16:49 +00:00
zbb
541c54820f Revert r260165: Proper configuration of unmapped_buf_allowed should be used
To avoid failures in bus_dmamap_sync() on ARM unmapped_buf_allowed should
be set to 0. Hence, ARM-specific changes in AHCI should not be applied.
2014-01-02 11:24:04 +00:00
zbb
9c9582b429 Use only mapped BIOs on ARM
Using unmapped BIOs causes failure inside bus_dmamap_sync, since
this function requires valid MVA address, which is not present
if mapping is not set up.

Submitted by:	Wojciech Macek <wma@semihalf.com>
Obtained from:	Semihalf
2014-01-01 20:26:08 +00:00
zbb
2df622e3b7 Do not attach to PCI bridges in AHCI driver
Some vendors use the same VID:PID combination in AHCI and PCI bridge cards

Submitted by:	Wojciech Macek <wma@semihalf.com>
Obtained from:	Semihalf
2014-01-01 20:18:03 +00:00
mav
938848ea5c Destroy mtx lock when failed to allocate memory during attach.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2013-12-11 17:40:35 +00:00
eadler
44c01df173 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
mav
5ecd12665c Add few more minor parts of DevSleep support from AHCI 1.3.1 proposal. 2013-11-15 15:14:07 +00:00
mav
616c9705f8 Add some more IDs for Intel ATA, AHCI and USB controllers. 2013-11-15 10:28:59 +00:00
mav
99ff385fd0 Merge CAM locking changes from the projects/camlock branch to radically
reduce lock congestion and improve SMP scalability of the SCSI/ATA stack,
preparing the ground for the coming next GEOM direct dispatch support.

Replace big per-SIM locks with bunch of smaller ones:
 - per-LUN locks to protect device and peripheral drivers state;
 - per-target locks to protect list of LUNs on target;
 - per-bus locks to protect reference counting;
 - per-send queue locks to protect queue of CCBs to be sent;
 - per-done queue locks to protect queue of completed CCBs;
 - remaining per-SIM locks now protect only HBA driver internals.

While holding LUN lock it is allowed (while not recommended for performance
reasons) to take SIM lock.  The opposite acquisition order is forbidden.
All the other locks are leaf locks, that can be taken anywhere, but should
not be cascaded.  Many functions, such as: xpt_action(), xpt_done(),
xpt_async(), xpt_create_path(), etc. are no longer require (but allow) SIM
lock to be held.

To keep compatibility and solve cases where SIM lock can't be dropped, all
xpt_async() calls in addition to xpt_done() calls are queued to completion
threads for async processing in clean environment without SIM lock held.

Instead of single CAM SWI thread, used for commands completion processing
before, use multiple (depending on number of CPUs) threads.  Load balanced
between them using "hash" of the device B:T:L address.

HBA drivers that can drop SIM lock during completion processing and have
sufficient number of completion threads to efficiently scale to multiple
CPUs can use new function xpt_done_direct() to avoid extra context switch.
Make ahci(4) driver to use this mechanism depending on hardware setup.

Sponsored by:	iXsystems, Inc.
MFC after:	2 months
2013-10-21 12:00:26 +00:00
gavin
ce93c74acc Support the PCI-Express SSD in the new MacBook Air (model A1465)
Submitted by:	Johannes Lundberg <johannes brilliantservice.co.jp>
MFC after:	3 days
2013-08-28 14:29:33 +00:00
mav
fd3a4f8fdf Decode some bits defined in AHCI 1.3.1 Device Sleep Technical Proposal.
For now this is only conmetics to report HBA capabilities (Haswell?).

Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2013-07-25 10:29:40 +00:00
jfv
0ccd4d5781 Add new Coleto Creek device support: SATA, SMBus, and Watchdog devices.
MFC after: 1 week
2013-07-19 21:37:40 +00:00
mav
39ad00b4bc Add ID for Marvell 88SE9215 AHCI SATA controller.
MFC after:	3 days
2013-07-09 08:49:17 +00:00
mav
f49b6d5881 Add one more ID of Marvell SATA controller.
Submitted by:	marck
MFC after:	3 days
2013-07-09 08:32:17 +00:00
smh
99516daae5 Added output of device QUIRKS for CAM and AHCI devices during boot.
Reviewed by:	mav
Approved by:	pjd (mentor)
MFC after:	2 weeks
2013-05-18 23:36:21 +00:00
mav
8183b49f3e Add IDs for HighPoint RocketRAID 640L/642L/644L -- new series of 4-port
6Gbps PCIe 2.0 x2 SATA controllers, based on Marvell 88SE9235 chips.

MFC after:	1 week
2013-05-02 16:09:06 +00:00
mav
695c50ff24 Create controller-level DMA tag, handling range of supported addresses.
That simplifies logic for channels and gives the bus information about what
device actually allocated the tag.

Submitted by:	jhb@
2013-04-10 20:38:15 +00:00
mav
26b501bbeb Check status of ahci_em_reset() on attach and abort if reset failed.
For now it is just a hypothetical case.

Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
2013-04-04 09:15:19 +00:00
mav
53f6db9f3e Read Asynchronous Notification statuses only if Port Multiplier or ATAPI
device are connected. ATA disks are not using ANs, while the extra register
read operation is quite expensive.
2013-03-25 13:58:17 +00:00
mav
a090de11fd Depending on combination of running commands (NCQ/non-NCQ) try to avoid
extra read from PxCI/PxSACT registers.  If only NCQ commands are running, we
don't really need PxCI.  If only non-NCQ commands are running we don't need
PxSACT.  Mixed set may happen only on controllers with FIS-based switching
when port multiplier is attached, and then we have to read both registers.

MFC after:	1 month
2013-03-25 08:50:51 +00:00
mav
4486b85658 No need to erase all 64 bytes of CFIS area if we never use more then 16. 2013-03-24 16:51:21 +00:00
kib
e57817ab00 ahci(4) and siis(4) are ready to process the unmapped i/o requests
Sponsored by:	The FreeBSD Foundation
Tested by:	pho
Submitted by:	bf (siis patch)
2013-03-19 15:09:32 +00:00
kib
bd7f0fa0bb Reform the busdma API so that new types may be added without modifying
every architecture's busdma_machdep.c.  It is done by unifying the
bus_dmamap_load_buffer() routines so that they may be called from MI
code.  The MD busdma is then given a chance to do any final processing
in the complete() callback.

The cam changes unify the bus_dmamap_load* handling in cam drivers.

The arm and mips implementations are updated to track virtual
addresses for sync().  Previously this was done in a type specific
way.  Now it is done in a generic way by recording the list of
virtuals in the map.

Submitted by:	jeff (sponsored by EMC/Isilon)
Reviewed by:	kan (previous version), scottl,
	mjacob (isp(4), no objections for target mode changes)
Discussed with:	     ian (arm changes)
Tested by:	marius (sparc64), mips (jmallet), isci(4) on x86 (jharris),
	amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)
2013-02-12 16:57:20 +00:00
mav
ffcbdecf17 Disable MSI interrupts for SB600 chipset. According to the report they are
not functional.

PR:		kern/174880, kern/174985, kern/175002
MFC after:	1 week
2013-01-24 09:33:43 +00:00
jfv
661fe34689 Add Intel Lynx Point PCH SATA Controller Device IDs 2013-01-02 22:26:46 +00:00
mav
54156ad826 Add IDs for SATA controllers on AMD Hudson-2 series chipsets.
I am not exactly sure about the naming due to lack of specs on AMD site,
but it is better to have some identification then none at all.

MFC after:	1 month
2012-12-12 11:53:15 +00:00
mav
b57ca0f66c Announce diagnostic page 7 (Element Descriptor) support. 2012-11-07 22:53:46 +00:00
eadler
3f7a414911 remove duplicate semicolons where possible.
Approved by:	cperciva
MFC after:	1 week
2012-10-22 03:00:37 +00:00
gavin
274e5948cc Switch some PCI register reads from using magic numbers to using the names
defined in pcireg.h

MFC after:	1 week
2012-09-19 12:27:23 +00:00
mav
9428c312c8 Fix AHCI 1.2 version checks. This should be mostly cosmetic.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	1 week
2012-09-12 09:20:37 +00:00
mav
2ae0055aac Add IDs for JMicron JMB360/JMB362 AHCI SATA controllers.
MFC after:	1 week
2012-08-30 15:23:59 +00:00
mav
a5e624d394 Return "locally assigned" Enclosure Logical Identifier instead of 8 zero
bytes. Zeroes there are incorrect and tend to cause false device ID matches.
2012-08-25 23:01:57 +00:00
mav
efa4f8be71 Refactor enclosure manegement support in ahci(4). Move it out into separate
subdevice ahciem. Emulate SEMB SES device from AHCI LED interface to expose
it to users in form of ses(4) CAM device. If we ever see AHCI controllers
supporting SES of SAF-TE over I2C as described by specification, they should
fit well into this new picture.

Sponsored by:	iXsystems, Inc.
2012-07-26 13:44:48 +00:00
mav
6450bdd899 Partially revert r236666:
Return PROTO_ATA protocol in response to XPT_PATH_INQ.

smartmontools uses it to identify ATA devices and I don't know any other
place now where it is important. It could probably use XPT_GDEV_TYPE
instead for more accurate protocol information, but let it live for now.

Reported by:	matthew
MFC after:	3 days
2012-06-10 11:17:14 +00:00
mav
93f5c479a5 Add IDs for Marvell 88SE9220/9230/9235 PCIe 2.0 x2 6Gbps SATA controllers.
Marvell 88SE9230 was confirmed to work, the rest two are just guessed.

MFC after:	1 week
2012-06-08 07:44:42 +00:00
mav
ee6412e858 ATA/SATA controllers have no idea about protocol of the connected device
until transport will do some probe actions (at least soft reset).
Make ATA/SATA SIMs to not report bogus and confusing PROTO_ATA protocol.
Make ATA/SATA transport to fill that gap by reporting protocol to SIM with
XPT_SET_TRAN_SETTINGS and patching XPT_GET_TRAN_SETTINGS results if needed.
2012-06-06 06:52:51 +00:00
hselasky
f7e9e0c9d7 Add quirk for Marvell based AHCI controller.
MFC after:	3 days
Suggested by:	mav @
2012-05-29 15:56:30 +00:00
mav
693ceab23e Add two functions xpt_batch_start() and xpt_batch_done() to the CAM SIM KPI
to allow drivers to handle request completion directly without passing
them to the CAM SWI thread removing extra context switch.
Modify all ATA/SATA drivers to use them.

Reviewed by:	gibbs, ken
MFC after:	2 weeks
2012-05-12 13:55:36 +00:00
mav
11e7605a3d Fix names of some Marvell SATA chips. It looks like chips with proprietary
interface supported by mvs(4) are 88SX, while AHCI-like chips are 88SE.

PR:		kern/165271
Submitted by:	Jia-Shiun Li <jiashiun@gmail.com>
MFC after:	1 week
2012-03-02 08:49:07 +00:00
uqs
d61d88a310 Convert files to UTF-8 2012-01-15 13:23:18 +00:00
jimharris
b3a02b2c5d Add 0x2826 device ID for C600 (Patsburg) SATA controller in RAID mode.
Reviewed by: mav
Approved by: scottl
2012-01-06 00:22:55 +00:00
mav
9be1bfa322 Add hw.ahci.force tunable to control whether AHCI drivers should attach
to known AHCI-capable chips (AMD/NVIDIA), configured for legacy emulation.

Enabled by default to get additional performance and functionality of AHCI
when it can't be enabled by BIOS. Can be disabled to honor BIOS settings if
needed for some reason.

MFC after:	1 month
2011-12-02 12:52:33 +00:00
hselasky
53a216b722 Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
hselasky
3bcdb8772a Move the device_delete_all_children() function from usb_util.c
to kern/subr_bus.c. Simplify this function so that it no longer
depends on malloc() to execute. Identify a few other places where
it makes sense to use device_delete_all_children().

MFC after:	1 week
2011-11-19 10:11:50 +00:00
mav
7ab470b9ba Change the way how "not implemented" AHCI channels handled. Instead of
completely skipping them, create ahcich devices for them to allocate unit
numbers, but mark them as disabled to prevent driver probe and attach.

Last time some BIOSes tend to report unused channels as "not implemented".
This change makes ahcichX devices numbering consistent, independently of
connected disks. It makes per-channel driver hints usable and CAM devices
wiring possible on such systems.
2011-11-17 20:46:51 +00:00
ed
e97eae1577 Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.
This means that their use is restricted to a single C file.
2011-11-07 06:44:47 +00:00
mav
7793d1dfed Add one more ID for the Marvell 88SE9128 6Gbps SATA controller.
MFC after:	3 days
2011-09-27 09:32:34 +00:00
mav
d6dc47f4fc Add ID for ASMedia ASM1061 2-port PCIe 2.0 x1 6Gb/s SATA controller.
Approved by:	re (blackend)
MFC after:	1 week
2011-08-24 09:08:07 +00:00