Commit Graph

4769 Commits

Author SHA1 Message Date
Jayachandran C.
cc9b5471a0 arm, acpi: increase size of memory region arrays
Bump up MAX_HWCNT and MAX_EXCNT to 32 when ACPI is enabled. These are
the sizes of the hwregions and exregions arrays respectively. ACPI
firmware typically has more memory regions and the current value of
16 is not sufficient for some platforms.

This commit fixes a failure seen with AMI firmware on Cavium's Sabre
ThunderX2 reference platform. This platform needs 21 physical memory
regions and 18 excluded regions to boot correctly with the current
firmware release.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D19073
2019-02-05 06:25:35 +00:00
Kyle Evans
649a5cd5ef awg: fix soft reset failure with no link
U-Boot will leave the ephy reset de-asserted and the MAC soft reset will
fail on these boards with internal PHY and no link established. Toggle reset
again before proceeding to attach/init.

MFC after:	1 week
2019-01-21 14:35:36 +00:00
Andriy Voskoboinyk
4945f79a4c Remove IEEE80211_AMPDU_AGE config option.
It is noop since r297774.
2019-01-20 15:17:56 +00:00
Kyle Evans
a3a7d2a4e5 Revert r343095
This was intended to fix the soft reset timeout on boot for OrangePi One/R1
with internal PHY, but seems to cause other problems later on due to soft
resetting around some state changes that may or may not make the NIC
non-functional.

Reverting this for now while a better solution is sought out.
2019-01-17 18:51:56 +00:00
Oleksandr Tymoshenko
3ea5899793 [mv] Fix invalid condition in fdt_fixup_ranges
Add parentheses to perform assignment before comparison. The prior
condition worked because fdt_parent_addr_cells returns 1 for the DTB
on which fdt_fixup_ranges is called and accidentally par_addr_cells
ends up to be set to the same value.

PR:		210705
Submitted by:	David Binderman <dcb314@hotmail.com>
MFC after:	1 week
2019-01-16 21:13:50 +00:00
Kyle Evans
1cf7d13fab awg: Move MAC soft reset to awg_init_locked to avoid soft reset timeout
From NetBSD: Since the MAC can get stuck in reset state with no link, ignore
reset timeouts and continue with initializing the device.

Fixes "soft reset timeout" issue at boot with no network cable plugged in.

awg_init may be called multiple times throughout normal interface usage, so
the tx/rx descriptor base address registers must be written after each MAC
reset and are moved as such.

This problem has been observed on FreeBSD, H3/H2+ devices with an internal
PHY (includes OrangePi R1, OrangePi One at least).

Reviewed by:	manu, ganbold
Obtained from:	NetBSD
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D18844
2019-01-16 14:42:33 +00:00
Oleksandr Tymoshenko
6534f93296 [mv_pci] Increase default PCI space size for mv_pci
mv_pci driver reads PCI memory window layout from DTB data and if the
data is incomplete falls back to default value. The value is too small
to fit two PCI spaces for mwlwifi devices on WRT3200ACM so the resource
allocation for them fails. Increase the default to 4Mb from 1Mb so
the devices can be properly attached.

MFC after:	1 week
2019-01-15 00:37:37 +00:00
Ian Lepore
ed47d82f59 Add a missing \n to a bootverbose printf. 2019-01-07 16:36:45 +00:00
Ian Lepore
584e31851a Support the SPI mode and bus clock frequency parameters set by the devices
requesting SPI transfers.

Reported by:	SAITOU Toshihide <toshi@ruby.ocn.ne.jp>
2018-12-31 16:01:22 +00:00
Marius Strobl
ab00a509ee o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
  specific transfer method instead. While at it, factor out allocation
  and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to
  keep the code more readable when adding support for ADMA variants.

o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum
  of 512 KiB instead of using a fixed 4-KiB-buffer. With the default
  MAXPHYS of 128 KiB and depending on the controller and medium, this
  reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on
  sequential reads while an increase of throughput of up to ~84 % was
  seen.

  Front-ends for broken controllers that only support an SDMA buffer
  boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY
  and supply a size via struct sdhci_slot. According to Linux, only
  Qualcomm MSM-type SDHCI controllers are affected by this, though.

  Requested by: Shreyank Amartya (unconditional bump to 512 KiB)

o Introduce a SDHCI_DEPEND macro for specifying the dependency of the
  front-end modules on the sdhci(4) one and bump the module version
  of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order
  to ensure that all components are in sync WRT struct sdhci_slot.

o In sdhci(4):
  - Make pointers const were applicable,
  - replace a few device_printf(9) calls with slot_printf() for
    consistency, and
  - sync some local functions with their prototypes WRT static.
2018-12-30 23:08:06 +00:00
Mateusz Guzik
628888f0e0 Remove iBCS2, part2: general kernel
Reviewed by:	kib (previous version)
Sponsored by:	The FreeBSD Foundation
2018-12-19 21:57:58 +00:00
Oleksandr Tymoshenko
afffcaa18f [mv_pci] Do not attempt to attach disabled PCI ports
Fail probe for PCI port if the respective FDT node is not enabled

Differential Revision:	https://reviews.freebsd.org/D18385
2018-12-15 02:35:48 +00:00
Emmanuel Vadot
ad5bce19bf allwinner: aw_pwm: Read value at attach
The booloaded might have configured the pwm controller so read the values.
2018-12-14 18:39:17 +00:00
Emmanuel Vadot
6a9997ed67 pwm: Convert period and duty to unsigned int
We don't need a 64 bits value to store nanoseconds

Discused with:	ian, jhibbits
2018-12-14 18:37:26 +00:00
Emmanuel Vadot
6c8fcde80c arm64: allwinner: axp81x: Fix double invertion for FLDO1
This fix booting on A64 boards when disabling the unused regulators at boot.
We did disable all the regulator handled by register 0x13 which of course contain
mandatory regulators for the board to be up.

Reported by:	Mark Millard <marklmi@yahoo.com>
X-MFC-With:	r340848
2018-12-14 10:26:17 +00:00
Emmanuel Vadot
2d5e81fbd0 mv_thermal: Add thermal driver for AP806 and CP110 thermal sensor
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:33:05 +00:00
Emmanuel Vadot
31cdaf420f arm64: mv_cp110_icu: Fix build 2018-12-12 22:24:30 +00:00
Emmanuel Vadot
e5ff483e7a mv_gpio: Since it's also an interrupt controller, attach sooner
Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:10:11 +00:00
Emmanuel Vadot
44d027bb5d arm64: Add mv_cp110_icu and mv_cp110_gicp
icu is a interrupt concentrator in the CP110 block and gicp
is a gic extension to allow interrupts in the CP block to be turned
into GIC SPI interrupts

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:08:43 +00:00
Emmanuel Vadot
73450c4a7a arm64: marvell: Add cp110 clock controller support
The cp110 clock controller controls the clocks and gate of the CP110
hardware block.

Every clock/gate are implemented except the NAND clock.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:04:21 +00:00
Emmanuel Vadot
4f3a5b510b arm64: mv_gpio: Add Marvell 8K support
While here put the interrupts setup in it's own function

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:02:57 +00:00
Emmanuel Vadot
e1453c9e4c arm64: marvell: Add driver for Marvell Ap806 System Controller
The first two clocks are for the clusters and their frequencies can be
found reading a register. Then a fixed 1200Mhz clock is present and two
fixed clocks, 'mss' which is 1200 / 6 and 'sdio' which is 1200 / 3.

Sponsored by:	Rubicon Communications, LLC ("Netgate")
2018-12-12 22:01:06 +00:00
Emmanuel Vadot
2d2a085222 arm64: mvebu_pinctrl: Add driver for Marvell Pinmux Controller
Add a driver compatible with Marvell mvebu-pinctrl and add ap806-pinctrl
support.

Sponsored by:	Rubicon Communications, LCC ("Netgate")
2018-12-12 22:00:05 +00:00
Emmanuel Vadot
277a038d0d arm64: allwinner: Add pwm driver
Add a pwm driver for Allwinner PWM
Add pwm and aw_pwm to the GENERIC kernel
2018-12-12 20:58:43 +00:00
Hans Petter Selasky
d7a9bfee8f Implement atomic_swap_xxx() for all platforms.
Differential Revision:	https://reviews.freebsd.org/D18450
Reviewed by:		kib@
MFC after:		3 days
Sponsored by:		Mellanox Technologies
2018-12-10 13:38:13 +00:00
Michal Meloun
025489d337 Fix cut&paste typo in atomic_fetchadd_64().
Reported by:	Jia-Shiun Li <jiashiun@gmail.com>
MFC after:	1 week
2018-12-07 11:10:27 +00:00
Mark Johnston
352aaa5122 Plug memory disclosures via ptrace(2).
On some architectures, the structures returned by PT_GET*REGS were not
fully populated and could contain uninitialized stack memory.  The same
issue existed with the register files in procfs.

Reported by:	Thomas Barabosch, Fraunhofer FKIE
Reviewed by:	kib
MFC after:	3 days
Security:	kernel stack memory disclosure
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D18421
2018-12-03 20:54:17 +00:00
Oleksandr Tymoshenko
440e13cf1e Fix PCI driver unload for Marvell PCI controller
Add generic implementation for bus_deactivate_resource method. Without
it bus_release_resource fails with "Failed to release active resource"
message

MFC after:	1 week
2018-12-02 21:58:36 +00:00
Konstantin Belousov
b8c20c02cc Fix off-by-one (page) errors in checks in d_mmap methods of several drivers.
Reported by:	C Turt <ecturt@gmail.com>
Reviewed by:	alc, markj
admbug:		781
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2018-12-02 18:30:58 +00:00
Michal Meloun
f788dba5bb Return computed real memory size, not a value from similarly named
global variable.

MFC after:	1 week
2018-12-02 07:39:16 +00:00
Konstantin Belousov
36e1b9702e Correct the tunable name in the message.
Submitted by:	 Andre Albsmeier <mail@fbsd.e4m.org>
PR:	231577
MFC after:	1 week
2018-12-01 16:43:18 +00:00
Eric van Gyzen
984969cd96 Fix reporting of SS_ONSTACK
Fix reporting of SS_ONSTACK in nested signal delivery when sigaltstack()
is used on some architectures.

Add a unit test for this.  I tested the test by introducing the bug
on amd64.  I did not test it on other architectures.

Reviewed by:	kib
MFC after:	2 weeks
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D18347
2018-11-30 22:44:33 +00:00
Eric van Gyzen
4d5a108409 Prevent kernel stack disclosure in signal delivery
On arm64 and riscv platforms, sendsig() failed to zero the signal
frame before copying it out to userspace.  Zero it.

On arm, I believe all the contents of the frame were initialized,
so there was no disclosure.  However, explicitly zero the whole frame
because that fact could inadvertently change in the future,
it's more clear to the reader, and I could be wrong in the first place.

MFC after:	2 days
Security:	similar to FreeBSD-EN-18:12.mem and CVE-2018-17155
Sponsored by:	Dell EMC Isilon
2018-11-26 20:52:53 +00:00
Emmanuel Vadot
198e1deb5f aw_usbphy: Do not error if it's not phy 0
Only phy0 can switch between host/otg, do not error if we request
host mode on phy != 0.

MFC after:	1 month
X-MFC with:	r340846
2018-11-26 14:27:13 +00:00
Emmanuel Vadot
759436eb7c axp8xx: Rework the enable part and add the GPIOXLDO regulators
MFC after:	1 month
2018-11-23 19:45:57 +00:00
Emmanuel Vadot
8e9e4ec6b6 a10_ehci: Always set the phy to host mode
MFC after:	1 month
2018-11-23 19:45:11 +00:00
Emmanuel Vadot
84ebe16ac6 aw_usbphy: Convert to usbphy subclass
Instead of routing the phy when enabling it, do the configuration
and routing in the phynode_usb_set_mode function.
While here, if we don't have a vbus detection method, enable the phy
if requested.

MFC after:	1 month
2018-11-23 19:44:26 +00:00
Jayachandran C.
d4d6ad3f05 acpica: rework INTRNG interrupts
On arm64 (where INTRNG is enabled), the interrupts have to be mapped
with ACPI_BUS_MAP_INTR() before adding them as resources to devices.

The earlier code did the mapping before calling acpi_set_resource(),
which bypassed code that checked for PCI link interrupts.

To fix this, move the call to map interrupts into acpi_set_resource()
and that requires additional work to lookup interrupt properties.
The changes here are to:
 * extend acpi_lookup_irq_handler() to lookup an irq in the ACPI
   resources
 * create a helper function acpi_map_intr() which uses the updated
   acpi_lookup_irq_handler() to look up an irq, and then map it
   with ACPI_BUS_MAP_INTR()
 * use acpi_map_intr() in acpi_pcib_route_interrupt() to map
   pci link interrupts.

With these changes, we can drop the ifdefs in acpi_resource.c, and
we can also drop the call for mapping interrupts in generic_timer.c

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D17790
2018-11-19 03:02:47 +00:00
Luiz Otavio O Souza
aaf1f854e1 Set the SPI clock speed and polarity on each transfer to catch up with
recent changes in spibus and allow the use of different SPI modes on
the same bus.

Reported by:	ian
Sponsored by:	Rubicon Communications, LLC (Netgate)
2018-11-15 17:05:02 +00:00
Luiz Otavio O Souza
77613ca0cb Comment MD_ROOT and remove 'device re' which is not part of the system and
can be loaded as module.
2018-11-15 16:29:27 +00:00
Luiz Otavio O Souza
2e82757c64 Add the driver for the SPI controller on ARMADA38X.
Tested on Clearfog (Pro) and SG-3100.

Sponsored by:	Rubicon Communications, LLC (Netgate)
2018-11-14 14:26:32 +00:00
Ed Maste
8573e2c388 use -m ${LD_EMULATION} for binary->elf link invocation
r306041 changed ld invocations for converting binary files to kernel
ELF objects to pass -m, but missed bespoke ld invocations in a pair of
arm file configs (one of which has since been removed).

This is needed to support some external toolchains and lld.

Sponsored by:	The FreeBSD Foundation
2018-11-09 19:16:01 +00:00
John Baldwin
4cbbb74888 Add a KPI for the delay while spinning on a spin lock.
Replace a call to DELAY(1) with a new cpu_lock_delay() KPI.  Currently
cpu_lock_delay() is defined to DELAY(1) on all platforms.  However,
platforms with a DELAY() implementation that uses spin locks should
implement a custom cpu_lock_delay() doesn't use locks.

Reviewed by:	kib
MFC after:	3 days
2018-11-05 21:34:17 +00:00
Konstantin Belousov
f6bb885ff6 Move the fixed base for PIE loading on arm.
Existing base causes conflicts for direct execution of ld-elf.so.1
because default linking base for non-PIE binaries is 0x10000.

Reported and tested by:	Mark Millard <marklmi26-fbsd@yahoo.com>
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-11-04 19:11:32 +00:00
John Baldwin
b317cfd4c0 Don't enter DDB for fatal traps before panic by default.
Add a new 'debugger_on_trap' knob separate from 'debugger_on_panic'
and make the calls to kdb_trap() in MD fatal trap handlers prior to
calling panic() conditional on this new knob instead of
'debugger_on_panic'.  Disable the new knob by default.  Developers who
wish to recover from a fatal fault by adjusting saved register state
and retrying the faulting instruction can still do so by enabling the
new knob.  However, for the more common case this makes the user
experience for panics due to a fatal fault match the user experience
for other panics, e.g. 'c' in DDB will generate a crash dump and
reboot the system rather than being stuck in an infinite loop of fatal
fault messages and DDB prompts.

Reviewed by:	kib, avg
MFC after:	2 months
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D17768
2018-11-01 21:34:17 +00:00
Kyle Evans
be352d20d5 Compile in VERBOSE_SYSINIT support by default, remain silent by default
The loader tunable 'debug.verbose_sysinit' may be used to toggle verbosity.
This is added to the debugging section of these kernconfs to be turned off
in stable branches for clarity of intent.

MFC after:	never
2018-10-31 22:38:19 +00:00
Brooks Davis
c3adaa3305 Consolidate identical ELF auxargs type defintions.
All platforms except powerpc use the same values and powerpc shares a
majority of them.

Go ahead and declare AT_NOTELF, AT_UID, and AT_EUID in favor of the
unused AT_DCACHEBSIZE, AT_ICACHEBSIZE, and AT_UCACHEBSIZE for powerpc.

Reviewed by:	jhb, imp
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D17397
2018-10-22 22:24:32 +00:00
Jayachandran C.
47fa06ab35 arm generic_timer: fix armv8 timer desc
In the FDT based probe, check for "arm,armv8-timer" before "arm,armv7-timer".
This gets the description right when the timer node has both entries in
compatible list.
2018-10-21 02:12:26 +00:00
Ruslan Bukin
3c8efd61f5 Revert r339421 due to unintended files included to commit.
Reported by:	ian
Approved by:	re (gjb)
Sponsored by:	DARPA, AFRL
2018-10-18 15:17:58 +00:00
Ruslan Bukin
53c6ad1d62 Support RISC-V implementations that do not manage the A and D bits
(e.g. RocketChip, lowRISC and derivatives).

RISC-V page table entries support A (accessed) and D (dirty) bits. The
spec makes hardware support for these bits optional. Implementations that
do not manage these bits in hardware raise page faults for accesses to a
valid page without A set and writes to a writable page without D set.
Check for these types of faults when handling a page fault and fixup the
PTE without calling vm_fault if they occur.

Reviewed by:	jhb, markj
Approved by:	re (gjb)
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D17424
2018-10-18 15:08:14 +00:00