license managers to obtain the host's ethernet address as
a key.
Note that this implementation takes the first hardware address for
the first ethernet interface found, and disregards the interface name
that may be passed in, as linux ethernet devices are all "ethX".
is incompatible with -pg. (We use a different version of mcount for
profiling frame-pointer-less assembler functions, but gcc doesn't know
about this.)
Added a missing dependency.
Cleaned up trailing backslashes.
Added comment about config's limitations/bugs handling dependencies and
backslashe/newlines.
Finished removing support for isdn drivers.
that lkm's can use them for fiddling the masks without being dependent on
which mode the kernel is compiled in (SMP or UP). This is particularly
for ppp_tty.c which has some domain crossing between the net and tty
subsystems. The values are not used in the spl code, they are for
reference only (ie: the compiled code uses immediate values rather than
an indirect 32 bit address and 32 bit data fetch).
top of the hardware interrupt handlers. Apparently this is slightly
faster with the bit scanning instruction that looks these up - this set of
changes reverts the original change.
Reviewed by: bde
rather than inlines. These are compiled with -fomit-frame-pointer and
work out pretty close to the original routines, but it might be a fraction
slower. The reason for doing this is to prevent the SWI_* and HWI_* values
from being compiled into drivers and lkms etc which is one of the things
that prevents the same lkm from being used on both SMP and UP kernels.
This gives us a lot more scope for experimenting with the splxxx
implementaton for SMP parallelism etc.
Reviewed by: bde
CPU code-named `M2'.
- Use the result of cpuid instruction instead of DIR to identify
6x86MX cpu. DIR0 and DIR1 are not documented in the data sheet, and
cpuid instruction is enabled at reset time.
- Add a function, init_6x86MX() to initialize 6x86MX cpu. It supports
CPU_SUSP_HLT and CPU_IORT options. It always sets NC1 (640K - 1M is
not cached.), and enables L1 cache in write-back mode.
- Fix typo in the comment in identblue().
Hopefully I've done the proper magic to merge changes between 1.17 and
1.17.2.1 into the main trunk. Description of those changes follows:
Brought in changes sent to me in late 1995 by Rich Murphey.
I cleaned up a few things and am currently running these under
2.2-970205-GAMMA.
The changes deal with software debouncing apparently necessary on
todays faster hardware, and also some problems with the use of the -Select
line for the TW-523 sync. This driver allows use of +PaperEnd as an
alternative.
Changes to pmap.c for lapic_t lapic && ioapic_t ioapic pointers,
currently equal to apic_base && io_apic_base, will stand alone with the
private page mapping.
apic.h has defines like:
#define lapic__id lapic->id
Once private pages and "known virtual addr" mapping of the APICs is
ready all 'lapic__XXX' will be changed to 'lapic.XXX', and the defines
will be removed.
Changes to smp.h for lapic_t lapic && ioapic_t ioapic pointers,
currently equal to apic_base && io_apic_base, will stand alone with the
private page mapping.
Adjust the data port address by adding the two low order bits of
the register number. The address port takes only a word address
(i.e. ignores the two low order bits written to it).
mode 1. Omission of this bit makes all config register accesses fail in
on recent chip sets ...
(The problem was reported and debug output provided by: Steve Passe)
- vector.s <- stub called by i386/exception.s
- icu_vector.s <- UP
- apic_vector.s <- SMP
Split icu.s into UP and SMP specific files:
- ipl.s <- stub called by i386/exception.s (formerly icu.s)
- icu_ipl.s <- UP
- apic_ipl.s <- SMP
This was done in preparation for massive changes to the SMP INTerrupt
mechanisms. More fine tuning, such as merging ipl.s into exception.s,
may be appropriate.
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
be (eventually) architecture independent. It provides an emulation
of the ISA interrupt registration function register_intr(), but that
function does no longer manipulated the interrupt controller and
interrupt descriptor table, but calls the architecture dependent
function setup_icu() for that purpose.
After the ISA/EISA bus code has been modified to directly call the new
interrupt registartion functions (intr_create() and intr_connect()),
the emulation of register_intr() should be dropped.
The C level interrupt handler function should take a (void*) argument,
and the function pointer type (inthand2_t) should defined in some other
place than isa_device.h.
This commit is a pre-requisite for the removal of the PCI specific shared
interrupt code.
Reviewed by: dfr,bde
This is now the default, it delays most of the MP startup to the function
machdep.c:cpu_startup(). It should be possible to move the 2 functions
found there (mp_start() & mp_announce()) even further down the path once
we know exactly where that should be...
Help from: Peter Wemm <peter@spinner.dialix.com.au>
