Commit Graph

21685 Commits

Author SHA1 Message Date
marius
801d761a22 On sparc64 obtain the initiator ID from the Open Firmware device tree
in order to match what the PROM built-in driver uses.

Approved by:	mjacob
2010-05-03 18:39:40 +00:00
alc
77a3b0ef9e Acquire the page lock around vm_page_unwire(). For consistency, extend the
scope of the object lock in agp_i810.c.  (In this specific case, the scope
of the object lock shouldn't matter, but I don't want to create a bad
example that might be copied to a case where it did matter.)

Reviewed by:	kib
2010-05-03 16:55:50 +00:00
alc
425dc5ab94 Neither the page lock nor the page queues lock is required to unwire and
free a VM_ALLOC_NOOBJ page.  (Such pages are unmanaged.)
2010-05-03 15:51:59 +00:00
sobomax
213eac1f2c Add new tunable 'net.link.ifqmaxlen' to set default send interface
queue length. The default value for this parameter is 50, which is
quite low for many of today's uses and the only way to modify this
parameter right now is to edit if_var.h file. Also add read-only
sysctl with the same name, so that it's possible to retrieve the
current value.

MFC after:	1 month
2010-05-03 07:32:50 +00:00
yongari
46340f0793 Fix wrong dma tag usage. Previously it used TX descriptor ring dma
tag which should be TX mbuf dma tag.

Reported by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-05-03 00:56:26 +00:00
mjacob
5bdbfdef52 Print IR_RESYNC updates informatively.
Obtained from:	pluknet
MFC after:	1 week
2010-05-02 22:48:27 +00:00
mav
071496a9c7 Import mvs(4) - Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA controllers
driver for CAM ATA subsystem. This driver supports same hardware as
atamarvell, ataadaptec and atamvsata drivers from ata(4), but provides
many additional features, such as NCQ, PMP, etc.
2010-05-02 19:28:30 +00:00
marius
6637c2369d Remove redundant checking of sc_leaving (uart_intr() already handles this).
Approved by:	marcel
2010-05-02 19:07:19 +00:00
marius
5af1cc0b3d Remove a soft member which was never used.
Approved by:	marcel
2010-05-02 19:05:57 +00:00
mav
0291fae914 Enable PCI busmastering explicitly to be sure. 2010-05-02 14:46:05 +00:00
mav
90843ddc5c Make SATA XPT negotiate and enable some additional SATA features, such as:
- device initiated power management (some devices support only this way);
 - Automatic Partial to Slumber Transition (more power saving);
 - DMA auto-activation (expected to slightly improve performance).
More features could be added later, when hardware supports.
2010-05-02 12:07:47 +00:00
rstone
5baa2ffd76 When configuring a system-wide couting PMC, hwpmc was incorrectly logging process mappings for that PMC. Nothing ever reads pmc logs out of a counting PMC, so the log buffers were leaked when the PMC was deconfigured. The process mappings are only useful for sampling PMCs anyway, so only log the mappings if the PMC is a sampling PMC.
This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs.

Approved by:	jkoshy (mentor)
MFC after:	2 weeks
2010-05-01 22:04:58 +00:00
imp
e75188d9b5 The Atheros AR71xx CPUs, when paired with the AR5212 parts, has a bug
that generates a fatal bus trap.  Normally, the chips are setup to do
128 byte DMA bursts, but when on this CPU, they can only safely due
4-byte DMA bursts due to this bug.  Details of the exact nature of the
bug are sketchy, but some can be found at
https://forum.openwrt.org/viewtopic.php?pid=70060 on pages 4, 5 and 6.
There's a small performance penalty associated with this workaround,
so it is only enabled when needed on the Atheros AR71xx platforms.

Unfortunately, this condition is impossible to detect at runtime
without MIPS specific ifdefs.  Rather than cast an overly-broad net
like Linux/OpenWRT dues (which enables this workaround all the time on
MIPS32 platforms), we put this option in the kernel for just the
affected machines.  Sam didn't like this aspect of the patch when he
reviewed it, and I'd love to hear sane proposals on how to fix it :)

Reviewed by:	sam@
2010-05-01 16:36:14 +00:00
yongari
042dce9b96 Add Marvell PHYG65G Gigabit PHY which is found on 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 19:01:55 +00:00
yongari
7a0b6f8a32 Add basic support for Marvell 88E8059 Yukon Optima.
Tested by:	James LaLagna < jameslalagna <> gmail dot com >
MFC after:	5 days
2010-04-30 18:58:55 +00:00
yongari
90bf77c712 Disable non-ASF packet flushing on Yukon Extreme as vendor's driver
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.

Reported by:	jhb
Tested by:	jhb
MFC after:	5 days
2010-04-30 18:04:46 +00:00
mav
1c92d062ed Add Target/LUN ID checks. 2010-04-30 08:37:00 +00:00
mav
4137ab7278 Add Target/LUN ID checks and deny access to targets 1-14 when PMP absent. 2010-04-30 08:22:47 +00:00
mav
295ded74b5 Add Target/LUN ID checks and deny access to targets 1-14 when PMP absent.
Enforce PMA bit clearing when PMP detached to avoid further scan timeouts.
2010-04-30 08:02:12 +00:00
davidch
5724de4184 - Enable flow control.
- Print device details only when verbose boot is enabled.
- Add debug output for shared memory access.
- Add debug statistics (checksum offload & VLAN frame counters).
- Modify TX path to update consumer index for each frame completed
  rather than updating the consumer index only once for a group of
  frames to improve small packet performance.
- Print driver/firmware pulse messages only when verbose boot
  is enabled.
- Add debug sysctl to clear statistics.
- Fix more style(9) violations.

MFC after:	2 weeks
2010-04-30 02:35:46 +00:00
kmacy
1dc1263413 On Alan's advice, rather than do a wholesale conversion on a single
architecture from page queue lock to a hashed array of page locks
(based on a patch by Jeff Roberson), I've implemented page lock
support in the MI code and have only moved vm_page's hold_count
out from under page queue mutex to page lock. This changes
pmap_extract_and_hold on all pmaps.

Supported by: Bitgravity Inc.

Discussed with: alc, jeffr, and kib
2010-04-30 00:46:43 +00:00
yongari
a43425e883 Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. If
it is 8bits register then RX FIFO size can't exceed 2KB which is
not true for almost all Yukon II controller.
2010-04-30 00:34:00 +00:00
davidch
104994efcf - Pass flow control settings back to bce(4).
MFC after:	Two weeks
2010-04-29 22:00:57 +00:00
yongari
1294f271f5 Enable VLAN hardware tag insertion/stripping. Due to lack of SiS190
controller, I'm not sure whether this is also applicable to SiS190
so this feature is only activated on SiS191 controller.
In theory, controller reinitialization is not needed when VLAN tag
configuration is changed, but xclin said controller was not stable
whenever toggling VLAN tag bit. To address that, sge(4)
reinitialize controller for VLAN configuration which seems to work
as expected. VLAN tag information for TX/RX descriptor and
configure bit of RxMacControl register was found by xclin.

Submitted by:	xclin <xclin <> cs dot nctu dot edu dot tw > (initial version)
Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:14:14 +00:00
yongari
a570282110 Enable FCS stripping and padding 10 bytes bit of RX MAC control
register. Due to lack of SiS190 controller, I'm not sure whether
this is also applicable to SiS190 so this feature is only activated
on SiS191 controller.
The controller can pad 10 bytes before DMAing a received frame to
RX buffer and received bytes include the padded bytes. This padding
is very useful on strict-alignment architectures because driver
does not have to copy received frame to align IP header on 4 bytes
boundary. It also gives better RX performance on non-strict
alignment architectures. Special thanks to xclin to give me
valuable register information. Without his enthusiastic trial and
errors this wouldn't be even possible.

While I'm here tighten validity check of received frame. Controller
clears RDS_CRCOK bit when it received bad CRC frames. xclin found
that using loop back testing.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 18:00:42 +00:00
yongari
76cab47064 Explicitly marks SiS190 to differentiate it from SiS191. 2010-04-29 17:34:01 +00:00
yongari
6bf8e888ec Remove wrong link state chage. 2010-04-29 17:30:21 +00:00
yongari
a246ed9355 Preserve unknown bits of RX MAC control register when driver
programs RX filter configuration. It seems RX MAC control register
is one of key registers to get various offloading features as well
as performance. Blindly clearing unrelated bits can result in
unexpected results.

Tested by:	xclin <xclin <> cs dot nctu dot edu dot tw >
2010-04-29 17:28:07 +00:00
sobomax
06a2ddb54d On certain chipsets AT keyboard controller isn't present and is
emulated by BIOS using SMI interrupt. On those chipsets reading
from the status port may be thousand times slower than usually.
Sometimes this emilation is not working properly resulting in
commands timing out and since we assume that inb() operation
takes very little time to complete we need to adjust number of
retries to keep waiting time within a designed limits (100ms).
Measure time it takes to make read_status() call and adjust
number of retries accordingly.

To keep it simple, use TSC to measure inb() performance and
keep it to amd64-only, since TSC may not available on older
CPUs.

Also enable detection of the AT controller absence on amd64.

Reviewed by:	jhb
MFC after:	1 month
2010-04-29 06:16:00 +00:00
jkim
4c85155383 Merge ACPICA 20100428. 2010-04-28 22:25:27 +00:00
jfv
1b3b15fdbb Address the LOD that some are seeing, put the RX lock
back in rxeof (I could see little point in taking it out),
and now release it before the stack entry.

Also, make it so the 82574 does not configure for multiqueue
when its not used in the stack.
2010-04-28 19:22:52 +00:00
jhb
5b51584fbc Initialize the callout structure earlier in attach before calling any
routines that can fail since ciss_free() always tries to stop and drain
the callout.
2010-04-28 18:49:45 +00:00
jfv
b727d91e59 Change default WOL back to MAGIC only, having
multicast enabled causes problems in man environments.
2010-04-28 17:37:30 +00:00
jkim
1aa9abc305 Remove dead code. Calculated greatest common divisor was not used at all.
On top of that, LLVM+Clang mis-compiles this code because of its register
allocator bug.

Analyzed by:	Andrew Reilly (areilly at bigpond dot net dot au)
Reviewed by:	ariff, rdivacky
MFC after:	3 days
2010-04-28 17:26:05 +00:00
attilio
6dfd3f3030 - Extract the IODEV_PIO interface from ia64 and make it MI.
In the end, it does help fixing /dev/io usage from multithreaded
  processes.
- On i386 and amd64 the old behaviour is kept but multithreaded
  processes must use the new interface in order to work well.
- Support for the other architectures is greatly improved, where
  necessary, by the necessity to define very small things now.

Manpage update will happen shortly.

Sponsored by:	Sandvine Incorporated
PR:		threads/116181
Reviewed by:	emaste, marcel
MFC after:	3 weeks
2010-04-28 15:38:01 +00:00
rnoland
c86e821ecb fx->lock is used as an index, correct test case.
MFC after:	1 week
2010-04-28 10:33:41 +00:00
marius
97002d72b5 On sparc64 obtain the initiator ID to be used for SPI HBAs from the
Open Firmware device tree in order to match what the PROM built-in
driver uses. This is especially important when netbooting Fujitsu
Siemens PRIMEPOWER250 as in that case the built-in driver isn't used
and the port facts PortSCSIID defaults to 0, conflicting with the
disk at the same address.
2010-04-27 18:41:16 +00:00
marius
e4de7c8635 Replace a magic value with the appropriate macro. 2010-04-27 18:06:54 +00:00
marius
810d92b3d2 - On sparc64 obtain the initiator ID from the Open Firmware device tree
in order to match what the PROM built-in driver uses.
- Remove some no longer used includes.
2010-04-27 18:05:33 +00:00
marius
0e0efd3d2f Take advantage of OF_getscsinitid(). 2010-04-27 15:50:25 +00:00
yongari
bba9d9c06c It seems ale(4) controllers do not like to see TCP payload in the
first descriptor in TSO case. Otherwise controller can generate bad
frames during TSO. To address it, make sure to pull up ethernet +
IP + TCP header with options in first buffer. Also ensure the
buffer length of the first descriptor for TSO covers entire ethernet
+ IP + TCP with options and setup additional Tx descriptor if the
first buffer includes TCP payload.

Tested by:	Amar Takhar <verm <> darkbeer dot org >
MFC after:	1 week
2010-04-26 21:08:15 +00:00
marius
4604894eaf For the on-board interfaces found in Fujitsu SPARC64 machines obtain the
MAC address via OFW as well.
2010-04-26 18:56:06 +00:00
mav
b38c610c42 Mark ATA channel as idle on timeout in non-ATA_CAM mode.
This should fix possible duplicate request completion.

Submitted by:	mjacob
2010-04-26 11:58:15 +00:00
weongyo
819559822c ifp->if_ipackets++ when RX packet interrupts are occurred.
MFC after:	3 days
2010-04-24 23:32:24 +00:00
rnoland
f582e61801 remove vm obect tracker that slipped in from prior work.
MFC after:	2 weeks
2010-04-24 18:13:12 +00:00
rnoland
d39bb93731 Address some WITNESS panics that occur when using the via driver.
Some of these cases should be safe in a non-atomic fashion, however
since all of the driver ioctls are locked, a lot of work is required to
fix it correctly.  Just don't sleep now.

MFC after:	2 weeks
2010-04-23 14:48:30 +00:00
thompsa
0ce1581c92 Use a more obvious prefix for the USB control (endpoint 0) transfers rather
than default_*.
2010-04-22 22:15:08 +00:00
thompsa
c1641a7662 Properly name the sxlocks, mutexes and condvars. 2010-04-22 22:00:16 +00:00
thompsa
b42af4d929 Use SX_DUPOK rather than making the string unique. 2010-04-22 21:41:50 +00:00
thompsa
bd3f3db8dd Change USB_DEBUG to #ifdef and allow it to be turned off. Previously this had
the illusion of a tunable setting but was always turned on regardless.

MFC after:	1 week
2010-04-22 21:31:34 +00:00