Commit Graph

3028 Commits

Author SHA1 Message Date
Konstantin Belousov
e7a9df16e6 Add kernel support for Intel userspace protection keys feature on
Skylake Xeons.

See SDM rev. 68 Vol 3 4.6.2 Protection Keys and the description of the
RDPKRU and WRPKRU instructions.

Reviewed by:	markj
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D18893
2019-02-20 09:51:13 +00:00
Justin Hibbits
a9b033c2f3 powerpc/booke: Fix 32-bit build
MFC after:	2 weeks
MFC with:	344202
2019-02-16 04:47:33 +00:00
Justin Hibbits
0454ed9794 powerpc/booke: depessimize MAS register updates
We only need to isync before we actually use the MAS registers, so before and
after the TLB read/write/sync/search operations.

MFC after:	2 weeks
2019-02-16 04:38:34 +00:00
Justin Hibbits
18f7e2b45e powerpc/booke: Use DMAP where possible for page copy and zeroing
This avoids several locks and pmap_kenter()'s, improving performance
marginally.

MFC after:	2 weeks
2019-02-16 04:16:10 +00:00
Leandro Lupori
59621b207c [PPC64] Fix mismatch between thread flags and MSR
When sigreturn() restored a thread's context, SRR1 was being restored
to its previous value, but pcb_flags was not being touched.

This could cause a mismatch between the thread's MSR and its pcb_flags.
For instance, when the thread used the FPU for the first time inside
the signal handler, sigreturn() would clear SRR1, but not pcb_flags.
Then, the thread would return with the FPU bit cleared in MSR and,
the next time it tried to use the FPU, it would fail on a KASSERT
that checked if the FPU was disabled.

This change clears the FPU bit in both pcb_flags and frame->srr1,
as the code that restores the context expects to use the FPU trap
to re-enable it.

PR:		234539
Reported by:	sbruno
Reviewed by:	jhibbits, sbruno
Differential Revision:	https://reviews.freebsd.org/D19166
2019-02-14 15:15:32 +00:00
Konstantin Belousov
72091bb393 Enable enabling ASLR on non-x86 architectures.
Discussed with:	emaste
Sponsored by:	The FreeBSD Foundation
2019-02-14 14:44:53 +00:00
Justin Hibbits
64143619ab powerpc/booke: Use the 'tlbilx' instruction on newer cores
Newer cores have the 'tlbilx' instruction, which doesn't broadcast over
CoreNet.  This is significantly faster than walking the TLB to invalidate
the PID mappings.  tlbilx with the arguments given takes 131 clock cycles to
complete, as opposed to 512 iterations through the loop plus tlbre/tlbwe at
each iteration.

MFC after:	3 weeks
2019-02-13 03:11:12 +00:00
Leandro Lupori
b8efbfb9d3 [ppc64] prevent infinite loop on icache sync
At moea64_sync_icache(), when the 'va' argument has page size
alignment, round_page() will return the same value as 'va'.
This would cause 'len' to be 0 and thus an infinite loop.

With this change, 'lim' will always point to the next page boundary.

This issue occurred especially during debugging sessions, when a breakpoint
was placed on an exact page-aligned offset, for instance.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D19149
2019-02-12 11:29:03 +00:00
Justin Hibbits
dcbd7de5b6 powerpc: Clamp MAXCPU for MPC85XXSPE kernel to 2
SoCs with e500v2 chips only have at most 2 cores, and there are no plans to
release any more e500v2-based SoCs.  Clamping MAXCPU down to 2 saves 5MB of
data, and 1.5MB bss.
2019-02-10 20:21:20 +00:00
Justin Hibbits
83191e19b7 powerpc: Fix AIM build
cpu_idle_e500mc is only used in booke, so ignore it completely in AIM.

MFC after:	2 weeks
MFC with:	r343944
2019-02-09 23:19:33 +00:00
Justin Hibbits
d6919f21dc powerpc: Split out the e500mc idling from rest of Book-E
The e500v2 and e500mc (and derivatives) have different idling procedures, so
make them different functions.

MFC after:	2 weeks
2019-02-09 21:19:53 +00:00
Leandro Lupori
59a8224976 [ppc64] fix /dev/kmem
For direct mapped kernel addresses, ppc64 function was not
performing the dmap to physical conversion, before jumping
to the code that fetched the value from physical memory.

Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D19086
2019-02-07 17:30:44 +00:00
Justin Hibbits
4290b4b849 powerpc: Bind IRQs to only one interrupt on QorIQ SoCs
The QorIQ SoCs don't actually support multicast interrupts, and the
references state explicitly that multicast is undefined behavior.  Avoid the
undefined behavior by binding to only a single CPU, using a quirk to
determine if this is necessary.

MFC after:	3 weeks
2019-02-06 03:52:14 +00:00
Leandro Lupori
4a8450ceff [ppc64] llan: fix fatal kernel trap when system is low on memory
When running several builders in parallel, on QEMU, with 8GB of
memory, a fatal kernel trap (0x300 (data storage interrupt))
caused by llan driver is sometimes observed, when the system
starts to run out of swap space.

This happens because, at llan_intr(), a phyp call to add a
logical LAN buffer is always made when llan_add_rxbuf() fails,
even if it fails to allocate a new buffer.

PR:	235489
Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D19084
2019-02-05 18:16:14 +00:00
Justin Hibbits
9c22a13345 powerpc: Don't idle with the wait instruction on booke
It appears idling via 'wait' on e5500 causes strange behaviors, such as
top(1) simply hanging sporadically, until input.  Until this can possibly be
sorted out (interrupt issue?), just don't idle on this hardware.  The SoCs
are low power already, and the wait state doesn't save much anyway.
2019-02-05 04:47:41 +00:00
Leandro Lupori
6174048251 powerpc64: Add a trap stack area
Currently, the trap code switches to the the temporary stack in the dbtrap
section. It works in most cases, but in the beginning of the execution, the
temp stack is being used, as starting in the powerpc_init() code.

In this current scenario, the stack is being overwritten, which causes the
return of breakpoint() to take abnormal execution.

This current patchset create a small stack to use by the dbtrap: codepath
avoiding the corruption of the temporary stack.

PR:		224872
Submitted by:	breno.leitao_gmail.com
Reviewed by:	jhibbits
Differential Revision:	https://reviews.freebsd.org/D14484
2019-02-04 16:02:03 +00:00
Justin Hibbits
d49fc192c1 powerpc/powernv: Add a driver for the POWER9 XIVE interrupt controller
The XIVE (External Interrupt Virtualization Engine) is a new interrupt
controller present in IBM's POWER9 processor.  It's a very powerful,
very complex device using queues and shared memory to improve interrupt
dispatch performance in a virtualized environment.

This yields a ~10% performance improvment over the XICS emulation mode,
measured in both buildworld, and 'dd' from nvme to /dev/null.

Currently, this only supports native access.

MFC after:	1 month
2019-02-02 04:15:16 +00:00
Konstantin Belousov
c75f49f7d8 Make iflib a loadable module.
iflib is already a module, but it is unconditionally compiled into the
kernel.  There are drivers which do not need iflib(4), and there are
situations where somebody might not want iflib in kernel because of
using the corresponding driver as module.

Reviewed by:	marius
Discussed with:	erj
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D19041
2019-01-31 19:05:56 +00:00
Andriy Voskoboinyk
86d535ab47 Garbage collect AH_SUPPORT_AR5416 config option.
It does nothing since r318857.
2019-01-25 13:48:40 +00:00
Justin Hibbits
15fba9d3be powerpc: Fix opaque irq data initialization
The powerpc_intr structure is not zero-initialized, so on an invariants
build would panic in the xics driver with an invalid pointer.  Also fix the
xics driver to share the private data setup code between xics_enable() and
xics_bind().

Reported by:	Leonardo Bianconi
2019-01-19 04:47:19 +00:00
Justin Hibbits
bd326619e8 powerpc: Fix FPU fsqrt emulation special case results
If fsqrts is emulated with +INF as its argument, the 0 return value causes a
NULL pointer dereference, panicking the system.  Follow the PowerISA and
return +INF with no FP exception.

MFC after:	1 week
2019-01-16 03:52:43 +00:00
Justin Hibbits
2da4e52d79 powerpcspe: Correct SPE high-component loading
Don't clobber the low part of the register restoring the high component of.
This could lead to very bad behavior if it's an ABI-affected register.

While here, also mark the asm volatile in the SPE high save case, to match
the load case.

Reported by:	Branden Bergren (git_bdragon.rtk0.net)
MFC after:	1 week
2019-01-13 04:51:24 +00:00
Justin Hibbits
02f2e80c3f Add AT_HWCAP / AT_HWCAP2 to elf64_sysvec_v2.
Summary:
I was working on implementing ifuncs on powerpc64 elfv2 today, and I suddenly
realized that the reason I was having so much trouble with AT_HWCAP and
AT_HWCAP2 is they are missing from the sysentvec.

After adding them, the auxv is being filled like it should.

Submitted by:	Brandon Bergren (git_bdragon.rtk0.net)
Differential Revision: https://reviews.freebsd.org/D18575
2019-01-13 02:28:37 +00:00
Justin Hibbits
431d31e0bf powerpc/pseries: Cache the IPI vector to avoid the common static lookup
The IPI vector is static, and happens to be the most common interrupt by far
on some systems.  Rather than searching for the interrupt every time, cache
the index.

This appears to yield a small performance boost, of about 8% reduction in
buildworld times, on my POWER9 system, when paired with r342975.
2019-01-12 22:10:31 +00:00
Justin Hibbits
56505ec016 powerpc: Add opaque 'private data' to interrupt vectors
The XICS and XIVE need extra data beyond irq and vector.  Rather than
performing a separate search, it's better for the general interrupt facility
to hold a private pointer, since the search already must be done anyway at
that level.
2019-01-12 22:05:42 +00:00
Conrad Meyer
bba9cbe374 powerpc: Fix regression introduced in r342771
In r342771, I introduced a regression in Power by abusing the platform
smp_topo() method as a shortcut for providing the MI information needed for
the stated sysctls.  The smp_topo() method was already called later by
sched_ule (under the name cpu_topo()), and initializes a static array of
scheduler topology information.  I had skimmed the smp_topo_foo() functions
and assumed they were idempotent; empirically, they are not (or at least,
detect re-initialization and panic).

Do the cleaner thing I should have done in the first place and add a
platform method specifically for core- and thread-count probing.

Reported by:	luporl via jhibbits
Reviewed by:	luporl
X-MFC-With:	r342771
Differential Revision:	https://reviews.freebsd.org/D18777
2019-01-07 19:39:31 +00:00
Conrad Meyer
6b83069e05 Expose threads-per-core and physical core count information
With new sysctls (to the best of our ability do detect them).  Restructured
smp.4 slightly for clarity (keep relevant stuff closer to the top) while
documenting.

Reviewed by:	markj, jhibbits (ppc parts)
MFC after:	3 days
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D18322
2019-01-04 18:31:17 +00:00
Mateusz Guzik
628888f0e0 Remove iBCS2, part2: general kernel
Reviewed by:	kib (previous version)
Sponsored by:	The FreeBSD Foundation
2018-12-19 21:57:58 +00:00
Justin Hibbits
45b33e809f powerpc/booke: Change KERNBASE to be physical load address
Previous commits have made VM_MIN_KERNEL_ADDRESS its own separate entity,
and rebased the kernel around that address instead of KERNBASE.  This commit
pulls the trigger to rebase KERNBASE to a physical load address.  The
eventual goal is to align the address with the AIM KERNBASE, but at this
time that's not an option.

Currently a Book-E kernel must be loaded on a 64MB boundary, due to size
issues.  The common load address is at the 64MB mark (0x04000000), so simply
make that the default KERNBASE.

As of this commit, Book-E kernels can be loaded and booted with ubldr.

MFC after:	3 weeks
2018-12-13 05:07:39 +00:00
Justin Hibbits
3067a880ce powerpcspe: Fix GPR handling in SPE exception handler
Optimize the exception handler to only save and load the upper word of the
GPRs used in the emulating instruction.  This reduces the save/load
overhead, and as a side effect does not overwrite the upper word of any
temporary register.

With this commit I am now able to run editors/abiword and math/gnumeric on a
e500-based system.

MFC after:	1 week
MFC With:	r341752,r341751
2018-12-13 04:48:28 +00:00
Justin Hibbits
9d720d45c9 powerpc/booke: Don't get and use the load offset for TOC on APs
The code was a near exact copy of the code in startup, but it doesn't need
the complexity since the kernel is already relocated.  With
VM_MIN_KERNEL_ADDRESS as currently set to KERNBASE, this doesn't cause a
problem, because it's a zero offset.  However, when KERNBASE is changed to a
physical load address, it then has a non-zero offset, and ends up with an
invalid stack pointer, causing the AP to hang.
2018-12-11 02:03:00 +00:00
Leandro Lupori
be2bd024de ppc64: handle exception 0x1500 (soft patch)
This change adds a hypervisor trap handler for exception 0x1500 (soft patch),
normalizing all VSX registers and returning.
This avoids a kernel panic due to unknown exception.

Change made with the collaboration of leonardo.bianconi_eldorado.org.br,
that found out that this is a hypervisor exception and not a supervisor one,
and fixed this in the code.

Reviewed by:	jhibbits, sbruno
Differential Revision:	https://reviews.freebsd.org/D17806
2018-12-10 14:54:28 +00:00
Hans Petter Selasky
d7a9bfee8f Implement atomic_swap_xxx() for all platforms.
Differential Revision:	https://reviews.freebsd.org/D18450
Reviewed by:		kib@
MFC after:		3 days
Sponsored by:		Mellanox Technologies
2018-12-10 13:38:13 +00:00
Justin Hibbits
870d94c50a powerpc/booke: Replace a logical equivalent of pmap_kextract() with a real call
No sense in reinventing the wheel here.  AP bringup is not a time-critical
point.
2018-12-10 04:16:40 +00:00
Scott Long
44f299a3cc Remove the mps driver from powerpc 32bit GENERIC, and don't build it and
mpr as a module for powerpc or mips.  An upcoming commit will cause these
drivers to rely on the presence of 64bit atomic operations.  Discussed
with jhibbits.
2018-12-09 06:06:06 +00:00
Justin Hibbits
ddc6c1fa3d powerpc/SPE: Copy lower part of source register to target for efdabs/efdnabs/efdneg
MFC after:	1 week
MFC With:	r341751
2018-12-09 04:54:55 +00:00
Justin Hibbits
3d6bebd3a2 powerpc/SPE: Reload vector registers after efdabs/efdnabs/efdneg
While here, also style(9)-adjust indents around this code.
2018-12-09 04:13:14 +00:00
Justin Hibbits
76748087bf powerpc: Set very low priority mode while waiting for AP unleash event
The POWER9 does not recognize 'or 27,27,27' as a thread priority NOP.  On
earlier POWER architectures, this NOP would note to the processor to give up
resources if able, to improve performance of other threads.

All processors that support the thread priority NOPs recognize the
'or 31,31,31' NOP as very low priority, so use this to perform a similar
function, and not burn cycles on POWER9.
2018-12-06 04:36:02 +00:00
Justin Hibbits
ac37786a0a powerpc: Fix ELFv2 JMP_SLOT relocation fixup
The jump slot is a function pointer, not a descriptor pointer, in ELFv2.  Just
write the pointer itself over, not the contents of the pointer, which would be
the first instruction of the function.
2018-12-06 04:30:24 +00:00
Justin Hibbits
7c4f1a1c5a powerpc/powermac: Fix macgpio(4) child interrupt resource handling
The 'interrupts' property is actually 2 words, not one, on macgpio child
nodes.  Open Firmware's getprop function might be returning the value
copied, not the total size of the property, but FDT's returns the total
size.  Prior to this patch, this would cause the SYS_RES_IRQ resource list
to not be populated when running with the 'usefdt' loader variable set, to
convert the OFW device tree to a FDT.  Since the property is always 2 words,
read both words, and ignore the second.

Tested by:	Dennis Clarke (previous attempt)
MFC after:	2 weeks
2018-12-06 04:25:12 +00:00
Justin Hibbits
bfed756af6 Sprinkle EARLY_DRIVER_MODULE around the tree
Mark some buses as BUS_PASS_BUS, and some resources as BUS_PASS_RESOURCE.
This also decouples some resource attachment orderings from being races by
device tree ordering, instead relying on the bus pass to provide the
ordering.

This was originally intended to support multipass suspend/resume, but it's
also needed on PowerMacs when using fdt, as the device tree seems to get
created in reverse of the OFW tree.
Reviewed by:	nwhitehorn (long ago)
Differential Revision:	https://reviews.freebsd.org/D918
2018-12-04 04:55:49 +00:00
Justin Hibbits
f1e0cb5ef1 powerpc: preload_addr_relocate is no longer necessary for booke
The same behavior was moved to machdep.c, paired with AIM's relocation,
making this redundant.  With this, it's now possible to boot FreeBSD with
ubldr on a uboot Book-E platform, even with a
KERNBASE != VM_MIN_KERNEL_ADDRESS.
2018-12-04 03:51:10 +00:00
Justin Hibbits
f095905ca4 powerpc: Check for a fdt in the metadata if it doesn't already exist
It's possible the fdt pointer was passed in via the metadata, as is done in
ubldr.  Check for the fdt here, instead of working with a NULL fdt, and
panicking.
2018-12-03 04:56:06 +00:00
Justin Hibbits
3c0b081966 powerpc/booke: Check for the metadata address by physical address
The metadata pointer will almost never be at or above 'btext', as btext is a
relocated symbol, so will be based at VM_MIN_KERNEL_ADDRESS, not at
KERNBASE.  Check the address against kernload, where the kernel is
physically loaded.
2018-12-03 04:47:28 +00:00
Conrad Meyer
d86e0b338f pmcr: Fix pstate setting on Power8
Fix p-state setting on Power8 by removing the accidental double-indirection of
the pstate_ids table.

The pstate_ids table comes from the OF property "ibm,pstate-ids."  On Power9,
the values happen to be identical to the indices, so the extra indirection was
harmless.  On Power8, the values were out of the range [0, npstates], so
pmcr_set() would fail the spec[0] range check with EINVAL.

While here, include both the value and index in the driver-specific register
array as spec[0] and spec[1] respectively.  They're redundant, but relatively
harmless, and it may aid debugging.

While here, fix the range check to exclude the index npstates, which is one
past the last valid index.

PR:		233693
Reported and tested by:	sbruno
Reviewed by:	jhibbits
2018-12-01 21:37:47 +00:00
Justin Hibbits
f4a80449ce Fix thread creation in PowerPC64 ELFv2 processes.
Summary:
Currently, the upcall used to create threads assumes ELFv1.

Instead, we should check which sysentvec is in use on the process and act
accordingly.

This makes ELFv2 threaded processes work.

Submitted by:	git_bdragon.rtk0.net
Differential Revision: https://reviews.freebsd.org/D18330
2018-11-29 03:39:11 +00:00
Justin Hibbits
8f69e36d87 powerpc: Don't include KERNBASE in genassym, it's unnecessary
A related future change, which changes KERNBASE for Book-E for some reason
causes a "KERNBASE redefined" error with assym.inc, even though it only changed
the value of KERNBASE and nothing else.  Since machine/vmparam.h is already
included in booke/locore.S, and the requisite guards are already in place for
properly handling KERNBASE in vmparam.h, just remove it from genassym, and
include vmparam.h in the AIM locore files.
2018-11-28 16:00:52 +00:00
Justin Hibbits
b996435337 powerpc/booke: Fix debug printfs in pmap
Add missing '%'s so printf formats are actually handled.
2018-11-28 04:02:26 +00:00
Justin Hibbits
24c3112f0c powerpc: Fix the powerpc64 build post-r341102
VM_MIN_KERNEL_ADDRESS is now used in locore.S, but the UL suffix isn't
permitted in .S files.
2018-11-28 02:48:43 +00:00
Justin Hibbits
ea32838af0 powerpc: Prepare Book-E kernels for KERNBASE != run base
Book-E kernels really run at VM_MIN_KERNEL_ADDRESS, which currently happens to
be the same as KERNBASE.  KERNBASE is the linked address, which the loader also
takes to be the physical load address.  Treat KERNBASE as a physical address,
not a virtual, and change virtual address references for KERNBASE to use
something more appropriate.
2018-11-28 02:00:27 +00:00