start so we should adjust the mbuf if the driver is running in PIO mode.
Now it should work well with WPA authentication and association for LP
PHY devices.
Tested by: Warren Block <wblock at wonkity.com>
MFC after: 1 month
so ni_txrate returned 0 which is a invalid result.
- The fourth argument of ieee80211_ratectl_tx_complete() could be not
NULL.
Reported by: Gustau P?rez <gperez at entel.upc.edu>
Tested by: Gustau P?rez <gperez at entel.upc.edu>,
Ian FREISLICH <ianf at clue.co.za>
MFC after: 3 days
queue length. The default value for this parameter is 50, which is
quite low for many of today's uses and the only way to modify this
parameter right now is to edit if_var.h file. Also add read-only
sysctl with the same name, so that it's possible to retrieve the
current value.
MFC after: 1 month
This framework allows drivers to abstract the rate control algorithm and
just feed the framework with the usable parameters. The rate control
framework will now deal with passing the parameters to the selected
algorithm. Right now we have AMRR (the default) and RSSADAPT but there's
no way to select one with ifconfig, yet.
The objective is to have more rate control algorithms in the net80211
stack so all drivers[0] can use it. Ideally, we'll have the well-known
sample rate control algorithm in the net80211 at some point so all
drivers can use it (not just ath).
[0] all drivers that do rate control in software, that is.
Reviewed by: bschmidt, thompsa, weyongo
MFC after: 1 months
are referenced directly from ivar pointer. It's to do like what other
buses do. [1]
o changes exported prototypes. It doesn't use struct siba_* structures
anymore that instead of it it uses only device_t.
o removes duplicate code and debug messages.
o style(9)
Pointed out by: imp [1]
interface didn't be attached automatically at boot time so changes a
approach to attach children based on leveraging some newbus niceties.
Submitted by: nwhitehorn
o uses v4 firmware instead of v3. A port will be committed to create
the bwn firmware module.
o supports B/G and LP(low power) PHYs.
o supports 32 / 64 bits DMA operations.
o tested on big / little endian machines so should work on all
architectures.
It'd not connected to the build until the firmware port is committed.
