Sometimes the software loses the race when appending more descriptors to
the tx ring and the tx queue stops.
This commit detects this condition and restart the tx queue whenever it stall.
Tested by: sobomax@, Keith White <kwhite@site.uottawa.ca>,
Paul Mather <paul@gromit.dlib.vt.edu>
Sponsored by: Rubicon Communications (Netgate)
Approved by: re (kib)
- Introduce new OF API function OF_prop_free to free memory allocated by
OF_getprop_alloc and OF_getencprop_alloc. Current code just calls free(9)
with M_OFWPROP memory class which assumes knowledge about OF_*prop_alloc
functions' internals and leads to unneccessary code coupling
- Convert some of the free(..., M_OFWPROP) instances to OF_prop_free
Files affected by this commit are the ones I was able to test on real
hardware. The rest of free(..., M_OFWPROP) instances will be handled with
idividual maintainers
Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D6315
In dual emac mode, the CPSW subsystem provides two independent ethernets.
This is implemented (as recommended by TI's TRM) with a mixture of switch
settings (vlans) and specific features of CPSW subsystem.
The driver was splitted to accommodate the shared parts (RX and TX rings
for example) while it still provides two independent ethernets.
Each of the ethernet ports driver has it's own set of MDIO registers among
the other private settings.
Previously this driver always operate in promisc mode, now the Switch ALE
(address table entry) is properly initialized and enabled.
The driver is also tested (and known to work) with both ports operating in
single port mode (active_slave 0 or 1).
Tested on uBMC (dual emac mode, both ports in single mode, giga and fast
ethernet) and BBB (single port, fast ethernet).
Sponsored by: Rubicon Communications (Netgate)
files to vendor-provided ones. It should make easier to adopt platform
code to new revisions of hardware and to use DTS overlays for various
Beaglebone extensions (shields/capes).
Original dts filenames were not changed, they're now wrappers over dts
files provided by TI. So make sure you update .dtb files on your
devices as part of kernel update
GPIO addressing was changed: instead of one global /dev/gpioc0 there
are per-bank instances of /dev/gpiocX. Each bank has 32 pins so for
instance pin 121 on /dev/gpioc0 in old addressing scheme is now pin 25
on /dev/gpioc3
On Pandaboard serial console devices was changed from /dev/ttyu0 to
/dev/ttyu2 so you'll have to update /etc/ttys to get login prompt
on serial port in multiuser mode. Single user mode serial console
should work as-is
Differential Revision: https://reviews.freebsd.org/D2146
Reviewed by: rpaulo, ian, Michal Meloun, Svatopluk Kraus
While in theory this should have been a transparent change (and was for all
other drivers), cpsw(4) never used the proper accessor macros in a few
places but spelt the indirect m_hdr.mh_* out itself. Convert those to
use m_len and m_data and unbreak the driver build.
For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY
and fails to attach calling cpsw_detach() which end up in a panic.
Fix it by doing the proper check before detach the miibus and also fix the
leak of few variables.
And to actually make it work, ether_ifattach() has to be moved to the end
of cpsw_attach() to avoid a race where calling ether_ifdetach() before
domain_init() (which will only run later on) would make it crash at
INP_INFO_RLOCK() on in_pcbpurgeif0().
Tested on: BBB (am335x)
MFC after: 1 week
to check the status property in their probe routines.
Simplebus used to only instantiate its children whose status="okay"
but that was improper behavior, fixed in r261352. Now that it doesn't
check anymore and probes all its children; the children all have to
do the check because really only the children know how to properly
interpret their status property strings.
Right now all existing drivers only understand "okay" versus something-
that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
register from a bus space resource.
Note that this macro is just for ARM, and is intended to have a short
lifespan. The DMA engines in some SoCs need the physical address of a
memory-mapped device register as one of the arguments for the transfer.
Several scattered ad-hoc solutions have been converted to use this macro,
which now also serves to mark the places where a more complete fix needs
to be applied (after that fix has been designed).
Major changes:
* Finally tracked down the flow control setting that
seems to have been causing TX stalls and watchdog timeouts
* RX and TX paths now share a lot more code
* TX interrupt is no longer used; we instead GC finished
tx queue entries at the bottom of the start routine.
* TX start now queues fragmented packets directly; it only
invokes defrag() for occasional very fragmented packets.
* "sysctl dev.cpsw" dumps controller statistics and queue counts
* Host Error Interrupt will give extensive debugging information
if the controller chokes on the queued data.
TX stalls in this driver, I've also had some
time to evaluate the effectiveness of different
watchdog strategies.
This is the latest attempt, which consolidates
all of the watchdog logic in one place and
consistently detects TX stalls and resets within
a couple of seconds.
(as used in AM335x SoC for BeagleBone).
Among other things:
* Watchdog reset doesn't hang the driver.
* Disconnecting cable doesn't hang the driver.
* ifconfig up/down doesn't hang the driver
* Out-of-memory no longer panics the driver.
Known issues:
* Doesn't have good support for fragmented packets
(calls m_defrag() on TX, assumes RX packets are never fragmented)
* Promisc and allmulti still unimplimented
* addmulti and delmulti still unimplemented
* TX queue still stalls (but watchdog now consistently recovers in ~5s)
* No sysctl monitoring
* Only supports port0
* No switch configuration support
* Not tested on anything but BeagleBone
Committed from: BeagleBone
* Record TX mbufs when we get them so we can release them.
* Set TX/RX mbuf slots to NULL when we are no longer responsible for them
* Move dma sync on RX into RX intr routine
