associated changes. More details below:
Remove public declarations of variables that were forgotten when they were
made static.
Revision Changes Path
1.31 +0 -1 src/sys/sys/interrupt.h
Make sure the interrupt is masked before processing it, or bad things
can happen.
Revision Changes Path
1.10 +3 -3 src/sys/arm/arm/intr.c
Reorganize the interrupt handling code a bit to make a few things cleaner
and increase flexibility to allow various different approaches to be tried
in the future.
- Split struct ithd up into two pieces. struct intr_event holds the list
of interrupt handlers associated with interrupt sources.
struct intr_thread contains the data relative to an interrupt thread.
Currently we still provide a 1:1 relationship of events to threads
with the exception that events only have an associated thread if there
is at least one threaded interrupt handler attached to the event. This
means that on x86 we no longer have 4 bazillion interrupt threads with
no handlers. It also means that interrupt events with only INTR_FAST
handlers no longer have an associated thread either.
- Renamed struct intrhand to struct intr_handler to follow the struct
intr_foo naming convention. This did require renaming the powerpc
MD struct intr_handler to struct ppc_intr_handler.
- INTR_FAST no longer implies INTR_EXCL on all architectures except for
powerpc. This means that multiple INTR_FAST handlers can attach to the
same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
to the same interrupt. Sharing INTR_FAST handlers may not always be
desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
either. Drivers can always still use INTR_EXCL to ask for an interrupt
exclusively. The way this sharing works is that when an interrupt
comes in, all the INTR_FAST handlers are executed first, and if any
threaded handlers exist, the interrupt thread is scheduled afterwards.
This type of layout also makes it possible to investigate using interrupt
filters ala OS X where the filter determines whether or not its companion
threaded handler should run.
- Aside from the INTR_FAST changes above, the impact on MD interrupt code
is mostly just 's/ithread/intr_event/'.
- A new MI ddb command 'show intrs' walks the list of interrupt events
dumping their state. It also has a '/v' verbose switch which dumps
info about all of the handlers attached to each event.
- We currently don't destroy an interrupt thread when the last threaded
handler is removed because it would suck for things like ppbus(8)'s
braindead behavior. The code is present, though, it is just under
#if 0 for now.
- Move the code to actually execute the threaded handlers for an interrrupt
event into a separate function so that ithread_loop() becomes more
readable. Previously this code was all in the middle of ithread_loop()
and indented halfway across the screen.
- Made struct intr_thread private to kern_intr.c and replaced td_ithd
with a thread private flag TDP_ITHREAD.
- In statclock, check curthread against idlethread directly rather than
curthread's proc against idlethread's proc. (Not really related to intr
changes)
Tested on: alpha, amd64, i386, sparc64
Tested on: arm, ia64 (older version of patch by cognet and marcel)
Revision Changes Path
1.88 +43 -29 src/sys/alpha/alpha/interrupt.c
1.38 +5 -5 src/sys/alpha/isa/isa.c
1.16 +58 -52 src/sys/amd64/amd64/intr_machdep.c
1.6 +1 -1 src/sys/amd64/include/intr_machdep.h
1.16 +2 -2 src/sys/amd64/isa/atpic.c
1.11 +28 -22 src/sys/arm/arm/intr.c
1.462 +2 -2 src/sys/dev/sio/sio.c
1.6 +1 -1 src/sys/dev/uart/uart_kbd_sun.c
1.24 +2 -2 src/sys/dev/uart/uart_tty.c
1.15 +58 -52 src/sys/i386/i386/intr_machdep.c
1.8 +1 -1 src/sys/i386/include/intr_machdep.h
1.21 +2 -2 src/sys/i386/isa/atpic.c
1.52 +32 -25 src/sys/ia64/ia64/interrupt.c
1.180 +3 -2 src/sys/kern/kern_clock.c
1.127 +437 -270 src/sys/kern/kern_intr.c
1.206 +0 -1 src/sys/kern/subr_witness.c
1.6 +3 -3 src/sys/powerpc/include/intr_machdep.h
1.7 +35 -32 src/sys/powerpc/powerpc/intr_machdep.c
1.14 +1 -1 src/sys/sparc64/include/intr_machdep.h
1.24 +43 -36 src/sys/sparc64/sparc64/intr_machdep.c
1.32 +36 -36 src/sys/sys/interrupt.h
1.440 +1 -3 src/sys/sys/proc.h
Catch up with interrupt-thread changes.
Revision Changes Path
1.32 +1 -1 src/sys/dev/zs/zs.c
Catch up with new interrupt handling code.
Revision Changes Path
1.16 +3 -3 src/sys/netgraph/bluetooth/drivers/bt3c/ng_bt3c_pccard.c
Catch up with new interrupt handling code.
Revision Changes Path
1.162 +2 -2 src/sys/dev/cy/cy.c
1.101 +2 -2 src/sys/dev/rc/rc.c
Catch up with new interrupt handling code.
Revision Changes Path
1.50 +2 -2 src/sys/dev/cx/if_cx.c
1.41 +1 -1 src/sys/dev/sab/sab.c
1.238 +2 -2 src/sys/pc98/cbus/sio.c
Add a swi_remove() function to teardown software interrupt handlers. For
now it just calls intr_event_remove_handler(), but at some point it might
also be responsible for tearing down interrupt events created via swi_add.
Revision Changes Path
1.128 +17 -0 src/sys/kern/kern_intr.c
1.33 +1 -0 src/sys/sys/interrupt.h
- Use swi_remove() to teardown swi handlers rather than
intr_event_remove_handler().
- Remove tty: prefix from a couple of swi handler names.
Revision Changes Path
1.51 +1 -1 src/sys/dev/cx/if_cx.c
1.102 +2 -2 src/sys/dev/rc/rc.c
1.42 +1 -1 src/sys/dev/sab/sab.c
1.25 +1 -1 src/sys/dev/uart/uart_tty.c
1.33 +1 -1 src/sys/dev/zs/zs.c
1.17 +2 -2 src/sys/netgraph/bluetooth/drivers/bt3c/ng_bt3c_pccard.c
Remove a stray return statement in the interrupt dispatch function
that caused a premature exit after calling a fast interrupt handler
and bypassing a much needed critical_exit() and the scheduling of
the interrupt thread for non-fast handlers. In short: unbreak :-)
Revision Changes Path
1.53 +0 -1 src/sys/ia64/ia64/interrupt.c
If we get a stray interrupt, return after logging it. In the extremely
rare case of a stray interrupt to an unregistered source (such as a stray
interrupt from the 8259As when using APIC), this could result in a page
fault when it tried to walk the list of interrupt handlers to execute
INTR_FAST handlers. This bug was introduced with the intr_event changes,
so it's not present in 5.x or 6.x.
Submitted by: Mark Tinguely tinguely at casselton dot net
Revision Changes Path
1.17 +1 -0 src/sys/amd64/amd64/intr_machdep.c
1.16 +1 -0 src/sys/i386/i386/intr_machdep.c
Approved by: re (scottl)
> Copy SPRG0-3 registers at boot-time and restore when calling into
> OpenFirmware. FreeBSD/ppc uses SPRG0 as the per-cpu data area pointer,
> and SPRG1-3 as temporary registers during exception handling. There
> have been a few instances where OpenFirmware does require these to
> be part of it's context, such as cd-booting an eMac.
> Finally (!?) get to the bottom of the mysterious G3 boot-time panics.
> After a number of tests using nop's to change the alignment, it was
> confirmed that the mtibat instructions should be cache-aligned.
> FreeScale app note AN2540 indicates that the isync before and after
> the mtdbat is the right thing to do, but sync/isync isn't required
> before the mtibat so it has been removed.
>
> Fix by using a ".balign 32" to pull the code in question to the correct
> alignment.
ofw_syscons.c 1.9, s3_pci.c 1.10, scgfbrndr.c 1.23, scmouse.c 1.40,
scvgarndr.c 1.20, scvidctl.c 1.37, syscons.c 1.439, syscons.h 1.85,
tga.c 1.8, vesa.c 1.52, vga.c 1.35
Add a font width argument to vi_load_font_t, vi_save_font_t and vi_putm_t
and do some preparations for handling 12x22 fonts (currently lots of code
implies and/or hardcodes a font width of 8 pixels). This will be required
on sparc64 which uses a default font size of 12x22 in order to add font
loading and saving support as well as to use a syscons(4)-supplied mouse
pointer image.
Approved by: re (scottl)
Fix boot-time hang/panic on G3 systems when modifying IBAT0 in
pmap_bootstrap by using the sync;isync big hammer to make sure
all prior operations have completed.
Reported by: Nathan Whitehorn <nathan at uchicago edu>
Approved by: re (Ken Smith)
trap.c r1.55
trap_subr.S r1.15
Temporary band-aid to fix hang when a process exec's Altivec
instructions.
trap_subr.S: declare a stub for the a-unavailable trap
that does an absolute jump to the vector-assist trap.
This is due to the fact that the vec-unavail trap
doesn't start at a 256-byte boundary, so the trick of
masking the bottom 8 bits of the link register to identify
the interrupt doesn't work, so let the vec-assist
case handle Altivec-disabled for the time being.
Note that this will be fixed in the future with a much
smaller vector code-stub (< 16 bytes) that will allow
use of strange vector offsets that are also present in
4xx processors, and also allow smaller differences in
vector codepaths on the G5.
trap.c: Treat altivec-unavailable/assist process traps as SIGILL.
Not quite correct, since altivec-assist should really
be a panic,
but it is fine for the moment due to the above measure.
machdep.c Install the stub code for the altivec-unavailable trap, and
the standard trap code at the altivec-assist.
Approved by: re (Ken Smith)
address, writting non-canonical address can cause kernel a panic,
by restricting base values to 0..VM_MAXUSER_ADDRESS, ensuring
only canonical values get written to the registers.
Reviewed by: peter, Josepha Koshy < joseph.koshy at gmail dot com >
Approved by: re (scottl)
be set to 0 on input. This caused a panic in an an MP test version
of the GEM driver from Marius, and from inspection of other PCI
drivers, the same problem would happen there.
Fix by explicitly setting to 0.
Approved by: re
vm_page's machine-dependent fields. Use this function in
vm_pageq_add_new_page() so that the vm_page's machine-dependent and
machine-independent fields are initialized at the same time.
Remove code from pmap_init() for initializing the vm_page's
machine-dependent fields.
Remove stale comments from pmap_init().
Eliminate the Boolean variable pmap_initialized from the alpha, amd64,
i386, and ia64 pmap implementations. Its use is no longer required
because of the above changes and earlier changes that result in physical
memory that is being mapped at initialization time being mapped without
pv entries.
Tested by: cognet, kensmith, marcel
- Implement sampling modes and logging support in hwpmc(4).
- Separate MI and MD parts of hwpmc(4) and allow sharing of
PMC implementations across different architectures.
Add support for P4 (EMT64) style PMCs to the amd64 code.
- New pmcstat(8) options: -E (exit time counts) -W (counts
every context switch), -R (print log file).
- pmc(3) API changes, improve our ability to keep ABI compatibility
in the future. Add more 'alias' names for commonly used events.
- bug fixes & documentation.
spaces were 1 too large. This resulted in the rman list not being
sorted correctly, and USB ports not being discovered on older
TiBooks.
Detective work by: Andreas Tobler <toa at pop dot agri dot ch>
in other codes. Add cpu_set_user_tls, use it to tweak user register
and setup user TLS. I ever wanted to merge it into cpu_set_kse_upcall,
but since cpu_set_kse_upcall is also used by M:N threads which may
not need this feature, so I wrote a separated cpu_set_user_tls.
into _bus.h to help with name space polution from including all of bus.h.
In a few days, I'll commit changes to the MI code to take advantage of thse
sepration (after I've made sure that these changes don't break anything in
the main tree, I've tested in my trees, but you never know...).
Suggested by: bde (in 2002 or 2003 I think)
Reviewed in principle by: jhb
critical_enter() and critical_exit() are now solely a mechanism for
deferring kernel preemptions. They no longer have any affect on
interrupts. This means that standalone critical sections are now very
cheap as they are simply unlocked integer increments and decrements for the
common case.
Spin mutexes now use a separate KPI implemented in MD code: spinlock_enter()
and spinlock_exit(). This KPI is responsible for providing whatever MD
guarantees are needed to ensure that a thread holding a spin lock won't
be preempted by any other code that will try to lock the same lock. For
now all archs continue to block interrupts in a "spinlock section" as they
did formerly in all critical sections. Note that I've also taken this
opportunity to push a few things into MD code rather than MI. For example,
critical_fork_exit() no longer exists. Instead, MD code ensures that new
threads have the correct state when they are created. Also, we no longer
try to fixup the idlethreads for APs in MI code. Instead, each arch sets
the initial curthread and adjusts the state of the idle thread it borrows
in order to perform the initial context switch.
This change is largely a big NOP, but the cleaner separation it provides
will allow for more efficient alternative locking schemes in other parts
of the kernel (bare critical sections rather than per-CPU spin mutexes
for per-CPU data for example).
Reviewed by: grehan, cognet, arch@, others
Tested on: i386, alpha, sparc64, powerpc, arm, possibly more
FreeBSD based on aue(4) it was picked by OpenBSD, then from OpenBSD ported
to NetBSD and finally NetBSD version merged with original one goes into
FreeBSD.
Obtained from: http://www.gank.org/freebsd/cdce/
NetBSD
OpenBSD
This is mentioned in the Handbook but it is not as obvious to new
users why bpf is needed compared to the other largely self-explanatory
items in GENERIC.
PR: conf/40855
MFC after: 1 week
