Commit Graph

2348 Commits

Author SHA1 Message Date
rstone
57feb6fb43 Fix integer truncation bug in malloc(9)
A couple of internal functions used by malloc(9) and uma truncated
a size_t down to an int.  This could cause any number of issues
(e.g. indefinite sleeps, memory corruption) if any kernel
subsystem tried to allocate 2GB or more through malloc.  zfs would
attempt such an allocation when run on a system with 2TB or more
of RAM.

Note to self: When this is MFCed, sparc64 needs the same fix.

Differential revision:	https://reviews.freebsd.org/D2106
Reviewed by:	kib
Reported by:	Michael Fuckner <michael@fuckner.net>
Tested by:	Michael Fuckner <michael@fuckner.net>
MFC after:	2 weeks
2015-04-01 12:42:26 +00:00
jhibbits
aebe90ff98 CCSRBAR_VA is mpc85xx-specific, so add guards, and include the proper header
file for it.

MFC after:	1 month
2015-03-31 05:29:44 +00:00
jhibbits
16ac5300b4 Wrap #ifdef guards around pmap_bootstrap ap. It's only used in SMP, and
building without SMP causes a build failure.

MFC after:	1 month
2015-03-28 21:39:42 +00:00
jfv
834671c372 Correct the ixgbe entries in mips and powerpc, and add the module
entries in i386/amd64 in the Makefile
2015-03-18 16:54:03 +00:00
nwhitehorn
224d995d2e Convert PTE eviction lock from an RW lock to a RM lock. It is held for
writing approximately never (< 0.00000001% under heavy VM load, and it can
go for months without ever being acquired in normal operation). This
provides a 10% (2-minute) improvement in wall clock time for make -j32
buildworld on a 4-core 32-thread POWER8.
2015-03-16 16:29:33 +00:00
nwhitehorn
2c2f3ffe1d Deallocate any leftover page table entries in the LPAR at boot. This
prevents contamination from a previous kernel (e.g. after shutdown -r).
2015-03-13 00:08:58 +00:00
nwhitehorn
0891b7923f Provide VSX context in ucontext(3) API. 2015-03-12 21:15:38 +00:00
nwhitehorn
431cf92001 The H_VIO_SIGNAL hypercall only enables interrupts for future received
packets and does not schedule interrupts for any packets currently
enqueued. Close two races where enqueued packets may not ever trigger
interrupts. The first of these, at adapter initialization time, was
especially severe since a rush of enqueued packets could actually fill
the receive buffer completely, stalling the interface forever.

MFC after:	2 weeks
2015-03-12 17:01:30 +00:00
nwhitehorn
d4fc9fa205 Allow PowerMac systems to be booted from an FDT as well as Open Firmware.
This is not complete yet: the gem(4) interface on my laptop seems to
disappear from the PCI bus as a result of quiescing Open Firmware in the
boot loader.
2015-03-10 16:01:43 +00:00
nwhitehorn
c8714148e7 Provide $FreeBSD$ in the standard way. This fixes the build with clang 3.6. 2015-03-08 16:50:45 +00:00
hselasky
786e5032a7 Add support for USB display link adapters to the FB and VT drivers.
The vtophys() function is used to get the physical page address for
the virtually allocated frame buffers when a physically continuous
memory area is not available. This change also allows removing the
masking of the FB_FLAG_NOMMAP flag in the PS3 syscons driver.

The FB and VT drivers were tested using X.org/xf86-video-scfb and
syscons.
2015-03-07 20:45:15 +00:00
nwhitehorn
ac9d1569a3 Make assembly slightly more idiomatic (and able to be handled by clang's
integrated assembler).
2015-03-07 20:27:00 +00:00
nwhitehorn
fd67077071 Make 32-bit PowerPC kernels, like 64-bit PowerPC kernels, position-independent
executables. The goal here, not yet accomplished, is to let the e500 kernel
run under QEMU by setting KERNBASE to something that fits in low memory and
then having the kernel relocate itself at runtime.
2015-03-07 20:14:46 +00:00
nwhitehorn
cd06a4774f Move IVOR setup from assembler to C, decreasing required assumptions about
address formats for trap handlers.
2015-03-05 05:53:08 +00:00
nwhitehorn
07a9fad289 The AIM DAR (data access fault address register) and Book-E DEAR registers
have the same meaning and occupy the same memory address in the trapframe
courtesy of union. Avoid some pointless #ifdef by spelling them both 'DAR'
in the trapframe.
2015-03-04 21:06:57 +00:00
nwhitehorn
03939e42e6 Garbage collect old function prototypes. 2015-03-04 17:04:22 +00:00
nwhitehorn
0d072699a7 Move Book-E/AIM dependent bits for setting user PMAP during thread switch
out of cpu_switch() and into pmap_activate() where they belong. This also
removes all the #ifdef from cpu_switch().
2015-03-04 16:45:31 +00:00
nwhitehorn
2311978186 Missed local diff. 2015-03-01 21:47:38 +00:00
nwhitehorn
632c178a7b Initialize NX stack capabilities and direct map status in pmap like on AIM. 2015-03-01 21:23:23 +00:00
nwhitehorn
ec1599358f Merge r278429 from ppc64:
Fix an extremely subtle concurrency bug triggered by running on 32-thread
POWER8 systems. During thread switch, there was a very small window when
the stack pointer was set to the stack pointer of the outgoing thread, but
after the lock on that thread had already been released.

If, during that window, the outgoing thread were rescheduled on another CPU
and begin execution and an exception were taken on the original CPU, the
trap handler and the outgoing thread would simultaneously execute on the same
stack, causing memory corruption. Fix this by making sure to release the
old thread only after cpu_switch() is done with its stack.

MFC after:	2 weeks
2015-03-01 21:20:18 +00:00
nwhitehorn
ce01678e9d Fix unitialized variable. 2015-02-27 20:32:09 +00:00
nwhitehorn
8d11dd01a1 New pmap implementation for 64-bit PowerPC processors. The main focus of
this change is to improve concurrency:
- Drop global state stored in the shadow overflow page table (and all other
  global state)
- Remove all global locks
- Use per-PTE lock bits to allow parallel page insertion
- Reconstruct state when requested for evicted PTEs instead of buffering
  it during overflow

This drops total wall time for make buildworld on a 32-thread POWER8 system
by a factor of two and system time by a factor of three, providing performance
20% better than similarly clocked Core i7 Xeons per-core. Performance on
smaller SMP systems, where PMAP lock contention was not as much of an issue,
is nearly unchanged.

Tested on:	POWER8, POWER5+, G5 UP, G5 SMP (64-bit and 32-bit kernels)
Merged from:	user/nwhitehorn/ppc64-pmap-rework
Looked over by:	jhibbits, andreast
MFC after:	3 months
Relnotes:	yes
Sponsored by:	FreeBSD Foundation
2015-02-24 21:37:20 +00:00
nwhitehorn
cc0edb125a Fix race in interrupt handling that could cause IO to hang up under heavy
load.
2015-02-23 20:38:00 +00:00
nwhitehorn
99449144ea Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7
and POWER8. This instruction set unifies the 32 64-bit scalar floating
point registers with the 32 128-bit vector registers into a single bank
of 64 128-bit registers. Kernel support mostly amounts to saving and
restoring the wider version of the floating point registers and making
sure that both scalar FP and vector registers are enabled once a VSX
instruction is executed. get_mcontext() and friends currently cannot
see the high bits, which will require a little more work.

As the system compiler (GCC 4.2) does not support VSX, making use of this
from userland requires either newer GCC or clang.

Relnotes:	yes
Sponsored by:	FreeBSD Foundation
2015-02-22 21:40:27 +00:00
nwhitehorn
32db975a8e Allow use of higher-resolution (e.g. 1920x1080) framebuffers on PS3.
MFC after:	1 month
2015-02-22 02:59:53 +00:00
jhibbits
42d5cba910 Make the PowerMac fan control nonlinear
Summary:
Currently, fan control is linear between the target temperature and max
temperature, which is far from ideal.  This changes it to be proportional to the
distance between the current temperature and the two endpoints (target and max
temp).  This also adds a hysteresis, so that fans keep going when the
temperature drops, for about 10 seconds, before slowing down.

Reviewers: nwhitehorn

Reviewed By: nwhitehorn

Differential Revision: https://reviews.freebsd.org/D1549

MFC after:	3 weeks
2015-02-20 06:19:23 +00:00
jhibbits
8f7883a879 Match the right backlight driver.
Some ATI-based PowerBooks use the string 'mnca' in the backlight controller
device tree entry, so account for this and don't use nVidia when it's not an
nVidia device.

MFC after:	3 weeks
2015-02-18 07:34:32 +00:00
jhibbits
0748f8dde9 Don't set the write bit if we're just reading.
Also fix a couple typos.

MFC after:	3 weeks
2015-02-18 06:53:40 +00:00
nwhitehorn
bc07909054 Having the TOC pointer in kernel dbeugger printouts is useful. 2015-02-17 01:23:38 +00:00
rpaulo
49dd1c9d72 Remove FreeBSD/wii.
This port failed to gain traction and probably only a couple Wii consoles
ran FreeBSD all the way to single user mode with an md(4). IPC
support was never implemented, so it was impossible to use any peripheral

Any further development, if any, will happen at https://github.com/rpaulo/wii.

Discussed with:	nathanw (a long time ago), jhibbits
2015-02-10 06:35:16 +00:00
nwhitehorn
5e79d149b1 Add error reporting to interrupt CPU binding. 2015-02-10 00:57:26 +00:00
nwhitehorn
1e4a004e9c Set thread priorities on multithreaded CPUs so that threads holding a
spinlock are high-priority and threads waiting for a spinlock are set to
low priority.
2015-02-10 00:55:42 +00:00
nwhitehorn
2cc0c7af02 Distribute interrupts across multiple CPUs in SMP configurations instead of sending them
all to CPU 0.
2015-02-09 19:21:54 +00:00
nwhitehorn
83e35772fc Mark invalid page table entries correctly for PMAP as well as for the
hypervisor. This prevents an infinite loop where processes with evicted
pages would page fault forever when PMAP decided the evicted pages on
which the process was faulting was actually present and did not need to
be restored.

Found while building LLVM with make -j32.

Sponsored by:	FreeBSD Foundation
2015-02-09 15:58:27 +00:00
bz
4a78a9edfc Properly hide a variable under #ifdef as it is only used inside the
specific #ifdef block otherwise leaving an unused variable and breaking
other kernel builds.
2015-02-09 11:34:45 +00:00
nwhitehorn
1e0c575751 Fix typo in PTE insertion overflow handling: use the page we're actually
returning, not the one we just looked at.
2015-02-09 07:08:54 +00:00
nwhitehorn
492377c13f Fix an extremely subtle concurrency bug triggered by running on 32-thread
POWER8 systems. During thread switch, there was a very small window when
the stack pointer was set to the stack pointer of the outgoing thread, but
after the lock on that thread had already been released.

If, during that window, the outgoing thread were rescheduled on another CPU
and begin execution and an exception were taken on the original CPU, the
trap handler and the outgoing thread would simultaneously execute on the same
stack, causing memory corruption. Fix this by making sure to release the
old thread only after cpu_switch() is done with its stack.

MFC after:	2 weeks
Sponsored by:	FreeBSD Foundation
2015-02-09 02:17:21 +00:00
nwhitehorn
04847b0c51 Technically speaking, using one virtal processor area for all CPUs is a
violation of the spec. Make duplicate entries for each CPU.
2015-02-09 02:13:36 +00:00
nwhitehorn
9b3f5b1200 Simplify trapcode setup by placing a copy of the generic trap handler at
every possible trap address by default. This also makes sure the kernel
notices (and panics at) traps from newer CPUs that the kernel was not
expecting rather than executing gibberish memory.
2015-02-09 02:12:38 +00:00
nwhitehorn
02ff4e5e54 Add some error checking on the supplied page size list. This makes sure
that we (a) get the correct large page size to provide to pmap and (b)
we can alert the user if running under incorrectly-configured PowerKVM
on POWER7 and POWER8 systems.

MFC after:	1 week
2015-02-08 16:50:00 +00:00
kib
3bbc91d138 Do not qualify the mcontext_t *mcp argument for set_mcontext(9) as
const.  On x86, even after the machine context is supposedly read into
the struct ucontext, lazy FPU state save code might only mark the FPU
data as hardware-owned.  Later, set_fpcontext() needs to fetch the
state from hardware, modifying the *mcp.

The set_mcontext(9) is called from sigreturn(2) and setcontext(2)
implementations and old create_thread(2) interface, which throw the
*mcp out after the set_mcontext() call.

Reported by:	dim
Discussed with:	jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2015-01-31 21:43:46 +00:00
nwhitehorn
4edec35371 Correctness improvements for removing FDT excluded memory areas. 2015-01-31 18:39:32 +00:00
nwhitehorn
aa04ebca04 Fix bug in mapppings of multiple pages exposed by updates to the VSCSI
support in QEMU. Each page of a many page mapping was getting mapped to
the same physical address, which is not the desired behavior.

MFC after:	1 week
2015-01-27 07:20:00 +00:00
nwhitehorn
ee74081aba Fix typo in r277561. 2015-01-24 01:58:15 +00:00
nwhitehorn
73fdd2ded8 Use relocation-safe methods to determine the sizes of the exception handlers.
A "size" symbol with its address set to the length of handler would be
shifted forward with all other addresses when relocations are processed.
Instead, just note the end and do the subtraction at runtime.
2015-01-23 07:36:51 +00:00
nwhitehorn
02b832180a Allow use of a pre-instantiated RTAS as well as a self-instantiated one. This
lets the kernel boot on RTAS-based systems by being kexec'ed from Linux.
2015-01-22 22:04:43 +00:00
nwhitehorn
67dd11691f Add POWER7+ and POWER8 to the list of CPUs with 32 SLB slots. This is
mostly a no-op since all currently-supported instances of these CPUs give
the number of SLB slots in the device tree, but keep it here as well just
in case.
2015-01-21 19:11:15 +00:00
nwhitehorn
6978841146 Make sure to relocate tmpstk with everything else and avoid processing
non-relative relocations that the UART code makes for absent modules.
2015-01-21 19:09:15 +00:00
nwhitehorn
cfd22197a3 Make 64-bit AIM trap handlers relocatable by changing all absolute branch
instructions to call through pointers instead. In general, these are set
implicitly through relocation processing. One has to be set explicitly in
machdep.c, however, to fit one handler in the tiny (8 instruction) space
available.

Reviewed by:	andreast
Differential revision:	D1554
Tested on:	UP and SMP G5, Cell, POWER5+
2015-01-21 19:07:45 +00:00
nwhitehorn
301885260e On 64-bit PowerPC, use more native forms of the PPC 970 HID restore
sequences, like are used to read the HIDs. This is both easier to read
and avoids a miscompilation by GCC in certain circumstances. Also avoid
double restoration of HID4 and HID5.

MFC after:	2 weeks
2015-01-21 02:57:54 +00:00