18 Commits

Author SHA1 Message Date
jasone
769e0f974d Major update to the way synchronization is done in the kernel. Highlights
include:

* Mutual exclusion is used instead of spl*().  See mutex(9).  (Note: The
  alpha port is still in transition and currently uses both.)

* Per-CPU idle processes.

* Interrupts are run in their own separate kernel threads and can be
  preempted (i386 only).

Partially contributed by:	BSDi (BSD/OS)
Submissions by (at least):	cp, dfr, dillon, grog, jake, jhb, sheldonh
2000-09-07 01:33:02 +00:00
bde
d6748db09b Pack the SWI bits to save some time and space. 2000-05-31 16:36:20 +00:00
dfr
f46d0033f1 Add SWI_TQ_MASK to imask definition. 2000-05-29 19:40:42 +00:00
obrien
3407cffd57 1. `movl' is for use with 32-bit operands. Do NOT use it with 16-bit
operands.  `movw' could be used, but instead let the assembler decide
   the right instruction to use.
2. AT&T asm syntax requires a leading '*' in front of the operand for
   indirect calls and jumps.
2000-05-10 01:24:23 +00:00
peter
3b842d34e8 $Id$ -> $FreeBSD$ 1999-08-28 01:08:13 +00:00
bde
76b6611489 Go back to the old (icu.s rev.1.7 1993) way of keeping the AST-pending
bit separate from ipending, since this is simpler and/or necessary for
SMP and may even be better for UP.

Reviewed by:	alc, luoqi, tegge
1999-07-10 15:28:01 +00:00
bde
639d459251 Fixed glitches (jumps) of about 1/HZ seconds for the i8254 timecounter.
The old version only worked right when the time was read strictly
more often than every 1/HZ seconds, but we only guarantee reading
it every (1/HZ + epsilon) seconds.  Part of rev.1.126-1.127 attempted
to fix this but didn't succeed.  Detect counter rollover using the
heuristic from the old version of microtime() with additional
complications for supporting calls from fast interrupt handlers.
This works provided i8254 interrupts are not delayed by more than
1/(2*HZ) seconds.

This needs more comments, and cleanups for the SMP case, and more
testing of the SMP case before it is merged into RELENG_3.

Tested by:		jhay
1999-05-28 14:08:59 +00:00
luoqi
af7e9be5cc Enable vmspace sharing on SMP. Major changes are,
- %fs register is added to trapframe and saved/restored upon kernel entry/exit.
- Per-cpu pages are no longer mapped at the same virtual address.
- Each cpu now has a separate gdt selector table. A new segment selector
  is added to point to per-cpu pages, per-cpu global variables are now
  accessed through this new selector (%fs). The selectors in gdt table are
  rearranged for cache line optimization.
- fask_vfork is now on as default for both UP and SMP.
- Some aio code cleanup.

Reviewed by:	Alan Cox	<alc@cs.rice.edu>
		John Dyson	<dyson@iquest.net>
		Julian Elischer	<julian@whistel.com>
		Bruce Evans	<bde@zeta.org.au>
		David Greenman	<dg@root.com>
1999-04-28 01:04:33 +00:00
bde
9a10a11b66 Generate intrnames[] dynamically. This should be new-bus friendly.
Old version reviewed by: se
1999-04-14 14:26:36 +00:00
bde
d22b2d54d1 Register tty software interrupt handlers at run time using register_swi()
instead of at compile time using ifdefs.

Use _swi_null instead of dummycamisr.  CAM and dpt should call
register_swi() instead of hacking on ihandlers[] directly.
1998-08-11 17:01:32 +00:00
bde
577b83a70e Implemented dynamic registration of software interrupt handlers. Not
used yet.

Use dummy SWI handlers to avoid some checks for null pointers.
1998-08-11 15:08:13 +00:00
gibbs
94a1492f22 Addition of splsoftvm and a VM SWI to handle bus dma related callbacks.
This SWI may be useful for other, defered, VM tasks.
1998-01-15 07:34:01 +00:00
gibbs
91399998c0 Fix a serious bug I introduced while adding in support for CAM interrupts.
It seems I didn't count my 0's properly when adding the new masks into
icu_vector.s pushing SWI_AST_MASK off the end of the array and screwing
up the indexing for SWI_CLOCK_MASK.

Fix the bug icu_vector.s and also reformat the code in both icu_vector.s and
apic_vector.s so that it will be much harder to make the same mistake in
the future.

Submitted by:	Bruce Evans <bde@zeta.org.au>
1997-09-28 19:30:01 +00:00
gibbs
e1b0aaaa76 aha1542.c aic6360.c cy.c fd.c ft.c
if_ie.c if_wl.c if_zp.c isa.c isa_device.h
labpc.c mcd.c ncr5380.c scd.c seagate.c si.c
sio.c tw.c ultra14f.c wcd.c wd.c:

	Update for changes in the callout interface.

apic_vector.s icu_vector.s ipl.s ipl_funcs.c:

	Add CAM software/hardware interrupt support.
1997-09-21 21:41:49 +00:00
peter
9a9d679136 Change an assemble-time divide into a shift. Under binutils-2.8 gas in elf
mode, the slash is a comment leader, while under non-elf it is a divide
symbol (what a concept! :-).  Theoretically, #APP/#NO_APP can change this
but that doesn't seem to mesh too well with macros and line continuation.
1997-09-08 06:40:58 +00:00
fsmp
526dc5f515 Removed the defunct GET_MPLOCK/REL_MPLOCK macros.
These are no-ops for UP, and should have been removed when vector.s
was split into UP and SMP subsets.
1997-07-24 03:24:57 +00:00
peter
72b61693b5 The SWI_NET_MASK and SWI_TTY_MASK handlers are now back adjacent to the
top of the hardware interrupt handlers.  Apparently this is slightly
faster with the bit scanning instruction that looks these up - this set of
changes reverts the original change.

Reviewed by: bde
1997-05-31 08:59:51 +00:00
fsmp
be6c5ef7bc Split vector.s into UP and SMP specific files:
- vector.s		<- stub called by i386/exception.s
 - icu_vector.s		<- UP
 - apic_vector.s	<- SMP

Split icu.s into UP and SMP specific files:
 - ipl.s		<- stub called by i386/exception.s (formerly icu.s)
 - icu_ipl.s		<- UP
 - apic_ipl.s		<- SMP

This was done in preparation for massive changes to the SMP INTerrupt
mechanisms.  More fine tuning, such as merging ipl.s into exception.s,
may be appropriate.
1997-05-26 17:58:27 +00:00