Commit Graph

107 Commits

Author SHA1 Message Date
jhb
0fc343f1d8 - If we ever do the per-cpu KTR stuff, the index won't be volatile as it
will be private to each CPU.
- Re-style(9) the globaldata structures.  There really needs to be a MI
  struct pcpu that has a MD struct mdpcpu member at some point.
2001-09-18 21:46:26 +00:00
peter
d7a9ef4aa1 Set thread0->td_pcb, this is probably why jake was getting a null deref. 2001-09-14 09:41:26 +00:00
julian
5596676e6c KSE Milestone 2
Note ALL MODULES MUST BE RECOMPILED
make the kernel aware that there are smaller units of scheduling than the
process. (but only allow one thread per process at this time).
This is functionally equivalent to teh previousl -current except
that there is a thread associated with each process.

Sorry john! (your next MFC will be a doosie!)

Reviewed by: peter@freebsd.org, dillon@freebsd.org

X-MFC after:    ha ha ha ha
2001-09-12 08:38:13 +00:00
peter
96b9a12bd2 Rip some well duplicated code out of cpu_wait() and cpu_exit() and move
it to the MI area.  KSE touched cpu_wait() which had the same change
replicated five ways for each platform.  Now it can just do it once.
The only MD parts seemed to be dealing with fpu state cleanup and things
like vm86 cleanup on x86.  The rest was identical.

XXX: ia64 and powerpc did not have cpu_throw(), so I've put a functional
stub in place.

Reviewed by:	jake, tmm, dillon
2001-09-10 04:28:58 +00:00
obrien
5f2415a1e9 style(9) the structure definitions. 2001-09-05 16:20:30 +00:00
obrien
0e8186d4dc style(9) the structure definitions. 2001-09-05 05:18:35 +00:00
obrien
70210b8344 style(9) the structure names 2001-09-04 09:23:23 +00:00
peter
16c92cf0c3 Zap #if 0'ed map init code that got moved to the MI area.
Convert the powerpc tree to use the common code.
2001-09-04 08:42:35 +00:00
jake
19f993b903 Make this compile. 2001-09-04 01:17:39 +00:00
jake
7cffb02347 Remove some stale definitions and update for new assembler code. 2001-09-03 23:19:18 +00:00
jake
63fd66633f Add ktr traces to copy{in,out} and cpu_switch.
Context switch the cwp value.  The register usage in cpu_switch will
be updated shortly to better reflect the fact that the current window
may change.
2001-09-03 23:18:02 +00:00
jake
653a513c7f Add comments following what other architectures have.
Fiddle the register values in the trapframe so children returning from
fork() return 0 (and success).
2001-09-03 23:15:54 +00:00
jake
f9d393e059 Change tf_arg to uintptr_t from void * to reflect the fact that
non-pointer values may be passed in it.  Add appropriate casts.

The interrupt type is now passed in tf_arg instead tf_type.
2001-09-03 23:13:42 +00:00
jake
e317d982f6 Implement a slightly different window spill/fill algorithm for dealing
with user windows in kernel mode.  We split the windows using %otherwin,
but instead of spilling user window directly to the pcb, we attempt to
spill to user space.  If this fails because a stack page is not resident
(or the stack is smashed), the fault handler at tl 2 will detect the
situation and resume at tl 1 again where recovery code can spill to the
pcb.  Any windows that have been saved to the pcb will be copied out to
the user stack on return from kernel mode.

Add a first stab at 32 bit window handling.  This uses much of the same
recovery code as above because the alignment of the stack pointer is used
to detect 32 bit code.  Attempting to spill a 32 bit window to a 64 bit
stack, or vice versa, will cause an alignment fault.  The recovery code
then changes the window state to vector to a 32 bit spill/fill handler
and retries the faulting instruction.

Add ktr traces in useful places during trap processing.

Adjust comments to reflect new code and add many more.
2001-09-03 23:10:45 +00:00
jake
c0bffaa6e1 Move the alternate global register stack to struct globaldata. 2001-09-03 22:58:05 +00:00
jake
e6fc6fd6cd Add ktr traces. 2001-09-03 22:57:21 +00:00
jake
6ef2965afd Implement pv_bit_count which is used by pmap_ts_referenced.
Remove the modified tte bit and add a softwrite bit.  Mappings are only
writeable if they have been written to, thus in general modify just
duplicates the write bit.  The softwrite bit makes it easier to distinguish
mappings which should be writeable but are not yet modified.

Move the exec bit down one, it was being sign extended when used as an
immediate operand.

Use the lock bit to mean tsb page and remove the tsb bit.  These are the
only form of locked (tsb) entries we support and we need to conserve bits
where possible.

Implement pmap_copy_page and pmap_is_modified and friends.

Detect mappings that are being being upgraded from read-only to read-write
due to copy-on-write and update the write bit appropriately.

Make trap_mmu_fault do the right thing for protection faults, which is
necessary to implement copy on write correctly.  Also handle a bunch
more userland trap types and add ktr traces.
2001-09-03 22:55:12 +00:00
jake
2be2cb095b Implement signals. 2001-09-03 22:41:40 +00:00
jake
fa2bcfc98d Move %ver definitions from pstate.h to ver.h. Add definitions for normal
kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
jake
9f19dd2781 Add simple macros for tracing in assembler files. There are quite
a few places where we cannot even call a function, and these have
proven to be very useful debugging tools for such situations.
2001-09-03 22:32:49 +00:00
jake
908b8f329b Use the correct copyrights. Note where most of this came from.
Requested by:	obrien
2001-09-03 22:27:23 +00:00
jake
60654f358c Bump UPAGES to 4. The pcb can be rather large. 2001-09-03 22:19:36 +00:00
jake
64bd7a7631 mtx_savecrit is a pil level, not a pstate value, thus mtx_intr_enable
was not doing its thing.
2001-09-03 22:19:04 +00:00
jake
511df0c9cd Add a flushw() macro. 2001-09-03 22:13:53 +00:00
jake
733bc35923 Add atomic_load and store functions without membars, fwiw. 2001-09-03 22:03:25 +00:00
jake
e9a17647c3 The definition for ASI_IMMU_TAG_TARGET_REG was wrong. Sort. 2001-09-03 22:02:15 +00:00
obrien
3c7a869929 + Blah, there was nothing wrong in rev 1.1 talking about the i386/NOTES.
I should have diff'ed the header with the Alpha GENERIC.
+ fix style nit
+ turn on NO_MODULES for now.
2001-09-02 23:48:37 +00:00
obrien
057bc9ceba Match the style of very other platform we have. 2001-09-02 23:37:45 +00:00
peter
89089e22c4 Converge with i386/alpha/etc pmap.c for pmap_new_proc/pmap_dispose_proc(). 2001-08-31 06:30:27 +00:00
dillon
08e732a88b Remove the MPSAFE keyword from the parser for syscalls.master.
Instead introduce the [M] prefix to existing keywords.  e.g.
MSTD is the MP SAFE version of STD.  This is prepatory for a
massive Giant lock pushdown.  The old MPSAFE keyword made
syscalls.master too messy.

Begin comments MP-Safe procedures with the comment:
/*
 * MPSAFE
 */
This comments means that the procedure may be called without
Giant held (The procedure itself may still need to obtain
Giant temporarily to do its thing).

sv_prepsyscall() is now MP SAFE and assumed to be MP SAFE
sv_transtrap() is now MP SAFE and assumed to be MP SAFE

ktrsyscall() and ktrsysret() are now MP SAFE (Giant Pushdown)
trapsignal() is now MP SAFE (Giant Pushdown)

Places which used to do the if (mtx_owned(&Giant)) mtx_unlock(&Giant)
test in syscall[2]() in */*/trap.c now do not.  Instead they
explicitly unlock Giant if they previously obtained it, and then
assert that it is no longer held to catch broken system calls.

Rebuild syscall tables.
2001-08-30 18:50:57 +00:00
mike
a45063618a o Remove some GCCisms in src/powerpc/include/endian.h.
o Unify <machine/endian.h>'s across all architectures.
o Make bswapXX() functions use a different spelling of u_int16_t and
  friends to reduce namespace pollution.  The bswapXX() functions
  don't actually exist, but we'll probably import these at some
  point.  Atleast one driver (if_de) depends on bswapXX() for big
  endian cases.
o Deprecate byteorder(3) prototypes from <sys/types.h>, these are
  now prototyped indirectly in <arpa/inet.h>.
o Deprecate in_addr_t and in_port_t typedefs in <sys/types.h>, these
  are now typedef'd in <arpa/inet.h>.
o Change byteorder(3) prototypes to use standards compliant uint32_t
  (spelled __uint32_t to reduce namespace pollution).
o Document new preferred headers and standards compliance.

Discussed with:	bde
PR:		29946
Reviewed by:	bmilekic
2001-08-30 00:04:19 +00:00
jake
d8a2be30ba Use register g6 to point to a small stack for svaing alternate globals
during trap handlers.
Implement ptrace_set_pc FWIW.
Initialize the pcb window scratch area in setregs(), and setup user
registers as specified by the SCD.

Submitted by:	tmm
2001-08-21 00:07:37 +00:00
jake
5fd36af7c1 Handle the pcb window scratch area in cpu_fork.
Implement cpu_exit.

Submitted by:	tmm
2001-08-21 00:02:54 +00:00
jake
da861eea01 Save and restore %fprs and %y, which are unused by kernel code, but
may be used by 32bit userland code.
Implement cpu_throw().

Submitted by:	tmm
2001-08-21 00:01:28 +00:00
jake
e8076017f8 Disable interrupts when calling openfirmware. 2001-08-21 00:00:18 +00:00
jake
56800e0ac6 Rename fp_init_pcb to fp_init_proc. Set the FEF bit in fprs register;
according the SCD it should be set if no user trap handler in set.

Submitted by:	tmm
2001-08-20 23:56:19 +00:00
jake
eed959d0e2 Add definitions for new assembler code. 2001-08-20 23:53:11 +00:00
jake
45ab2da400 Catch up with new trap entry point names. 2001-08-20 23:51:40 +00:00
jake
48bd94ad31 Add variables needed by hardware watchpoint support.
Submitted by:	tmm
2001-08-20 23:50:48 +00:00
jake
cf997765b7 Add code for supporting hardware watch points.
Submitted by:	tmm
2001-08-20 23:50:08 +00:00
jake
c5b148f1dd Add a system call trap type and syscall() call request handler.
Also add support for hardware watch point traps.

Submitted by:	tmm
2001-08-20 23:43:43 +00:00
jake
bedeb98a21 Add support for splitting the register windows on entry to the
kernel from usermode.  The remaining user windows are spilled
to the pcb as necessary.  The user land window fault handlers
fill directly from the pcb on return.
Add system call entry points.

Submitted by:	tmm
2001-08-20 23:40:31 +00:00
jake
0eadd1a70f db_expr_t is signed. 2001-08-20 23:35:15 +00:00
jake
df930f49e5 Add definitions for bits in condition code register and the load store
unit control registers.  Move tstate definitions to their own file.

Submitted by:	tmm
2001-08-20 23:34:46 +00:00
jake
ed59961343 Add a definition for the load store unit control register. 2001-08-20 23:31:41 +00:00
obrien
355b16412a Sync globals.h up with the other platforms. There is still some cruft in
here, but now all the platforms have the same cruft.  Consistantly spell
the `struct globaldata *' "globalp".

Reviewed by:	peter
2001-08-20 21:29:16 +00:00
jake
bc8b09d67e Don't needlessly duplicate what's basically the same copyright. 2001-08-18 19:09:55 +00:00
jake
4a1bf71cd8 Implement cpu_wait(). 2001-08-18 18:11:48 +00:00
jake
96b13f3863 Increase the size of the phys_avail memory map. Implement pmap_dispose_proc.
Turn some more potentially import functions into nops so we can do stuff
until they matter.
2001-08-18 18:11:13 +00:00
jake
02952fe249 Spell ta 1 correctly as ta %xcc, 1. Use %pil for critical enter/exit
instead of pstate.ie.  Note that popc is not implemented in hardware
on certain ultras, so we can't use it for inline ffs (suck).
2001-08-18 18:07:37 +00:00