390 Commits

Author SHA1 Message Date
dim
0dce8ed0a3 Supplement r259111 by also using correct casts in gcc's emmintrin.h for
the first argument of the following builtin function:

* __builtin_ia32_psrlqi128() takes __v2di instead of __v4si

This should fix the following errors when building the graphics/webp
port with base gcc:

lossless_sse2.c:403: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128'
lossless_sse2.c:404: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128'

Reported by:	Jos Chrispijn <ports@webrz.net>
MFC after:	3 days
2014-08-13 16:42:44 +00:00
ian
c29056c2b7 Add FreeBSD to the list of environments that needs to handle R_ARM_TARGET2
relocations in unwind data as pc-relative indirect references.

MFC after:	1 week
2014-07-22 20:49:58 +00:00
pfg
fe39a82f7d gcc: fix strict alignment.
From the OpenBSD log:

x86-64 ABI requires arrays greater than 16 bytes to be aligned to
16byte boundary.  However, GCC 16-byte aligns arrays of >=16 BITS,
not BYTES.

This diff improves bug detectability for code which has local arrays
of [16 .. 127] bits:  in those cases SSP will now detect even 1-byte
overflows.

Obtained from:	OpenBSD (CVS rev 1.4)
MFC after:	1 week
2014-05-02 16:15:34 +00:00
andrew
5cac9c644a Fix gcc with EABI on big-endian ARM by setting the endian correctly.
Without this gcc would generate byte loads for a little-endian core.

MFC after:	1 week
2014-01-12 15:35:03 +00:00
pfg
c5e9a8143d libcpp: misc fixes from Apple's GCC.
Fixes some bugs detected by Apple:
#error with unmatched quotes
pragma mark

Obtained from:	Apple GCC 4.2 - 5553
MFC after:	1 week
2014-01-05 00:32:38 +00:00
pfg
e2a7b55743 gcc: small enhancements for the arm support.
Very small updates: fixes GCC-PR target/31152

Tested by building the cross-compiler.

Obtained from:	gcc 4.3 (rev. r118461, 125973: GPLv2)
MFC after:	2 weeks
2013-12-25 16:01:48 +00:00
pfg
c487db8403 gcc: Add ability to generate DWARF pubtypes section if
DEBUG_PUBTYPES_SECTION is defined.

Obtained from:	gcc 4.3 (rev. 118826; GPLv2)

MFC after:	2 weeks
2013-12-24 20:42:48 +00:00
pfg
68da7851b3 gcc: more diff reductions against Apple GCC.
Mostly cosmetical changes to aid further merges.

Obtained from:	gcc 4.3 (rev. 120611, 124839; GPLv2)
MFC after:	1 week
2013-12-20 14:56:52 +00:00
pfg
9b92b4d5f6 gcc: fix ICE in rs600 when using -fno-trapping-math.
Solve build issue with previous change.

Obtained from:	gcc 4.3 (rev. 120902; GPLv2)
MFC after:	2 weeks
2013-12-17 21:39:40 +00:00
pfg
db68174f65 gcc: fix ICE in rs600 when using -fno-trapping-math.
Solves GCC-PR target/30485

Obtained from:	gcc 4.3 (rev. 120902; GPLv2)
MFC after:	2 weeks
2013-12-17 20:53:22 +00:00
dim
3140e829fa Use correct casts in gcc's emmintrin.h for the first arguments of the
following builtin functions:

* __builtin_ia32_pslldi128() takes __v4si instead of __v8hi
* __builtin_ia32_psllqi128() takes __v2di instead of __v8hi
* __builtin_ia32_psradi128() takes __v4si instead of __v8hi

This should fix the following errors when building the LINT kernel with
gcc:

sys/crypto/aesni/aesni_wrap.c:191: error: incompatible type for argument 1 of
'__builtin_ia32_psradi128'
sys/crypto/aesni/aesni_wrap.c:195: error: incompatible type for argument 1 of
'__builtin_ia32_pslldi128'

MFC after:	3 days
2013-12-08 23:24:32 +00:00
pfg
267b1cd42f gcc: Add -flax-vector-conversions
Obtained from:	gcc 4.3 (rev. 120572, 120688; GPLv2)
2013-12-05 21:22:51 +00:00
pfg
6e411c7e19 gcc: On rs6000 update sp_offset depending only on size.
This fixes a nasty bug introduced in r258651.

Reported and tested by:	Justin Hibbits
Obtained from:		gcc pre-4.3 (rev. 125116; GPLv2)
MFC after:		2 weeks
2013-12-04 21:17:39 +00:00
pfg
99b77b1bb3 gcc: Altivec register adjustments from Apple.
Obtained from:	gcc pre-4.3 (rev. 124763; GPLv2)
MFC after:	3 weeks
2013-11-26 14:52:29 +00:00
pfg
3972b5f3cb gcc: another round of merges from the gcc pre-43 branch.
Bring The following revisions from the gcc43 branch[1]:

118360, 118361, 118363, 118576, 119820,
123906, 125246, and 125721.

They all have in common that the were merged long ago
into Apple's gcc and should help improve the general
quality of the compiler and make it easier to bring
new features from Apple's gcc42.

For details please review the additions to the files:
gcc/ChangeLog.gcc43
gcc/cp/ChangeLog.gcc43 (new, adds previous revisions)

Reference:
[1] http://gcc.gnu.org/viewcvs/gcc/trunk/?pathrev=126700

Obtained from:	gcc pre4.3 (GPLv2) branch
MFC after:	3 weeks
2013-11-21 16:38:57 +00:00
pfg
da5713b7a8 gcc: merge rs6000 change from FSF pre-gcc43
config/rs6000/rs6000.c
http://gcc.gnu.org/ml/gcc-patches/2007-04/msg01551.html
Don't set MASK_PPC_GFXOPT for 8540 or 8548.

Obtained from:	gcc 4.3 (rev. 124381; GPLv2)
MFC after:	3 weeks
Reviewed by:	nathan
2013-11-14 16:10:21 +00:00
andrew
59c30969f9 On ARM EABI double precision floating point values are stored in the
endian the CPU is in, i.e. little-endian on most ARM cores.

This allows ARMv4 and ARMv5 boards to boot with the ARM EABI.
2013-09-07 14:04:10 +00:00
jmg
e10c4e2adb add support to gcc for AES and PCLMUL intrinsics... This addes the
-maes option, but not the -mpclmul option as I ran out of bits in
the 32 bit flags field...  You can -D__PCLMUL__ to get this, but it
won't be compatible w/ clang and modern gcc...

Reviewed by:	-current, -toolchain
2013-09-03 17:33:29 +00:00
andrew
6c258edb19 Implement _Unwind_GetIP and _Unwind_GetIPInfo as functions as that is what
we expect on FreeBSD. The implementation is based on the existing macros.
2013-08-31 14:56:09 +00:00
andrew
722b98a4e4 Bring in gcc r128087 to add support for _Unwind_Backtrace on ARM. This is
prior to the licence change so is under the GPLv2.
2013-08-31 14:53:19 +00:00
pfg
cd8fbd7550 GCC: bring back experimental support for amdfam10/barcelona CPUs.
Initial support for the AMD amdfam10 chipsets has been available in the
gcc43 branch under GPLv2. AMD and some linux distributions (OpenSUSE) did
a backport of the amdfam10 support and made it available.

This is a revised subset of the support initially brought in in r236962
and later reverted. The collateral efects seem to have disappeared but
it is still recommended to set the CPUTYPE with caution.

Reviewed by:	jkim (ages ago)
MFC after:	3 weeks
2013-06-01 01:02:24 +00:00
dim
7a182f92e4 For some reason, the gcc intrinsics header tmmintrin.h was imported with
two copies of itself pasted together.  Remove the extraneous copy.

MFC after:	3 days
2013-05-08 22:50:36 +00:00
andrew
190be65c14 Add #undef TARGET_DEFAULT back as it shouldn't have been removed in r245539 2013-02-04 09:42:12 +00:00
andrew
897e2fb505 Allow the unwind functions int libgcc_s to interact correctly with libthr.
_Unwind_ForcedUnwind in libgcc_s takes as one of it's parameters a stop
function to tell it when to stop unwinding. One of the stop function's
parameters is a _Unwind_Exception_Class. On most architectures this is an
int64_t, however on ARM EABI the gcc developers have made this a char array
with 8 items. While both of these take the same space they are passed into
the stop function differently, an int64_t is passed in in registers r2 and
r3, while the char[8] is passed in as a pointer to the first item in
register r2.

Because libthr expects the value to be an int64_t we would get incorrect
results when it passes a function that take an int64_t but libgcc passes in
a pointer to a char array including crashing.

The fix is to update libgcc_s to make it pass an int64_t to the stop
function and to libstdc++ as it expects _Unwind_Exception_Class to be an
array.
2013-02-04 09:28:36 +00:00
pfg
245e35ae97 Clean some 'svn:executable' properties in the tree.
Submitted by:	Christoph Mallon
MFC after:	3 days
2013-01-26 22:08:21 +00:00
andrew
9b858bb6f0 Add compiler support for the ARM EABI.
ARM EABI support is disabled by default and can be enabled by setting
WITH_ARM_EABI when building, however only the kernel-toolchain target will
work with this flag until the rest of the support is added.
2013-01-17 05:56:28 +00:00
andrew
37972b84c0 Switch the default CPU to an arm9. This removes compiler support for the
unsupported 26-bit addressing mode. This change is required for moving to
the ARM EABI.
2013-01-14 08:39:48 +00:00
andrew
ebd063486f Don't define CTORS_SECTION_ASM_OP and DTORS_SECTION_ASM_OP on arm when
built with clang. When these are defined the lists are defined similar to:

asm(".section .ctors");
STATIC func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) };
asm(".section .dtors");
STATIC func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) };

The problem is clang will move the two arrays out of the .ctors and .dtors
sections causing these sections to contain a single null address. By not
defining these macros we use the version of the code that places the arrays
is their sections by using __attribute__((section(".ctors"))) and similar
for .dtors.

Submitted by:	Daisuke Aoyama <aoyama AT peach.ne.jp>
2012-12-15 21:24:31 +00:00
kan
e35e8bb64d Follow clang lead and include mm_malloc.h only in hosted configurations.
This makes the use of intrinsics easier in kernel environment, according
to the submitter.

Requested by: jmg
2012-10-27 17:39:36 +00:00
gonzo
b501ab9dc9 Merging of projects/armv6, part 3
r238211:
Support TARGET_ARCH=armv6 and TARGET_ARCH=armv6eb

This adds a new TARGET_ARCH for building on ARM
processors that support the ARMv6K multiprocessor
extensions.  In particular, these processors have
better support for TLS and mutex operations.

This mostly touches a lot of Makefiles to extend
existing patterns for inferring CPUARCH from ARCH.
It also configures:
 * GCC to default to arm1176jz-s
 * GCC to predefine __FreeBSD_ARCH_armv6__
 * gas to default to ARM_ARCH_V6K
 * uname -p to return 'armv6'
 * make so that MACHINE_ARCH defaults to 'armv6'
It also changes a number of headers to use
the compiler __ARM_ARCH_XXX__ macros to configure
processor-specific support routines.

Submitted by:	Tim Kientzle <kientzle@freebsd.org>
2012-08-15 03:21:56 +00:00
kib
7b143adfa2 Pass --enable-new-dtags to the linker invocation by default. If
desired, one can turn off the generation of post-ELF standard dtags by
overriding it with --disable-new-dtags after the default switch.

Immediate effect of the change is that -rpath path is now stored both
in DT_RPATH and DT_RUNPATH tags, which is the right way to provide
rpath for dynamic linker supporting DT_RUNPATH per specification.

Reviewed by:	kan
MFC after:	1 month
2012-07-15 10:54:10 +00:00
marius
48e8b1fad6 Merge r236137 from x86:
Enable GNU hash generation for dynamic ELF binaries.
2012-06-14 20:29:49 +00:00
pfg
15cbdc9790 Revert r236962 - Experimental amdfam10/barcelona support.
The patches are unexpectedly causing gcc to fail while
building ports/graphics/ImageMagick even when the cpu
flags are not used.

Reported by:	Andreas Tobler
2012-06-13 20:21:08 +00:00
pfg
a6eb26cf6f Add experimental support for amdfam10/barcelona from the GCC 4.3 branch.
Initial support for the AMD barcelona chipsets has been available in the
gcc43 branch under GPLv2 but was not included when the Core 2 support
was brought to the system gcc.

AMD and some linux distributions (OpenSUSE) did a backport of the amdfam10
support and made them available. Unfortunately this is still experimental
and while it can improve performance, enabling the CPUTYPE may break some
C++ ports (like clang).

Special care was taken to make sure that the patches predate the GPLv3
switch upstream.

Tested by:	Vladimir Kushnir
Reviewed by:	mm
Approved by:	jhb (mentor)
MFC after:	2 weeks
2012-06-12 15:04:18 +00:00
marius
56d906b966 Merge r236137 from x86:
Enable GNU hash generation for dynamic ELF binaries.

While at it, sync the order of options with x86 and pass along the verbose
flag.
2012-05-30 20:13:49 +00:00
kib
44601461cb Enable gnu hash generation for dynamic ELF binaries on x86.
Reviewed by:	kan
2012-05-27 05:27:47 +00:00
pfg
3863c2cc50 Bring in a subset of gcc fixes that were back ported to
the GCC 4.1 branch and are available under GPLv2.

2007-11-07  Eric Botcazou  <ebotcazou@libertysurf.fr>

	PR rtl-optimization/33822
	* rtl.h (REG_OFFSET): Fix comment.
	* var-tracking.c (INT_MEM_OFFSET): New macro.
	(var_mem_set): Use it.
	(var_mem_delete_and_set): Likewise.
	(var_mem_delete): Likewise.
	(vt_get_decl_and_offset): Likewise.
	(offset_valid_for_tracked_p): New predicate.
	(count_uses): Do not track locations with invalid offsets.
	(add_uses): Likewise.
	(add_stores): Likewise.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=129972

2007-11-16  Richard Guenther  <rguenther@suse.de>
	PR middle-end/34030
	* fold-const.c (fold_binary): Use correct types for folding
	1 << X & Y to Y >> X & 1.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=130242

2008-01-14  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/31944
	* cse.c (remove_pseudo_from_table): New function.
	(merge_equiv_classes): Use above function to remove pseudo-registers.
	(invalidate): Likewise
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131524

2008-01-24  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>

        Backport:
	2007-11-07  Kenneth Zadeck <zadeck@naturalbridge.com>

	PR middle-end/33826
	* ipa-pure-const (static_execute): Added code to keep recursive
	functions from being marked as pure or const.
	* ipa-utils (searchc): Fixed comment.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=131807

2008-02-01  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>

	Backport:
	2007-08-02  Nathan Froyd  <froydnj@codesourcery.com>

	PR middle-end/25445
	* varasm.c (default_binds_local_p_1): Consult flag_whole_program
	if we are compiling with -fPIC.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132061

2008-02-04  Richard Guenther  <rguenther@suse.de>

	PR middle-end/33631
	* expr.c (count_type_elements): Give for unions instead of
	guessing.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132101

2008-02-14  Alan Modra  <amodra@bigpond.net.au>

	PR target/34393
	* config/rs6000/rs6000.md (restore_stack_block): Force operands[1]
	to a reg.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132309

2008-03-25  Richard Guenther  <rguenther@suse.de>

	Backport from mainline:
	2008-02-12  Richard Guenther  <rguenther@suse.de>

	PR middle-end/35163
	* fold-const.c (fold_widened_comparison): Use get_unwidened in
	value-preserving mode.  Disallow final truncation.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=133509

2008-11-30  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/38287
	* config/sparc/sparc.md (divsi3 expander): Remove constraints.
	(divsi3_sp32): Add new alternative with 'K' for operand #2.
	(cmp_sdiv_cc_set): Factor common string.
	(udivsi3_sp32): Add new alternative with 'K' for operand #2.
	Add TARGET_V9 case.
	(cmp_udiv_cc_set): Factor common string.
http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=142298

Reviewed by:	mm
Approved by:	jhb (mentor)
MFC after:	1 week
2012-05-18 19:02:39 +00:00
gonzo
e93013a3c1 Unbreak jemalloc build with MALLOC_PRODUCTION set. New jemalloc version
uncovered MIPS-related gcc bug described in
    http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33256

The patch was obtained from r128198 in gcc-4_1-branch, which is GPLv2,
so it's OK to merge it.
2012-04-30 22:46:09 +00:00
gonzo
877726b0fb Disable IRIX compatibility flags for DWARF code generator. IRIX-compatible
DWARF code is not compatible with CTF tools
2012-03-23 21:07:10 +00:00
andreast
59483a638a Silence a warning about redefinition of TARGET_ELF on powerpc. 2012-01-06 18:37:49 +00:00
andreast
cb931ce693 Rename the linker emulation name for powerpc and powerc64. This is needed that
we can also use the upstream binutils linker where we have to have a unique
name for the FreeBSD emulation.
2011-11-19 19:25:57 +00:00
andreast
63ebeabf61 Copy over the ASM_DECLARE_FUNCTION_SIZE macro from linux64.h. This macro
declares the proper size of a function. Without this macro recent GNU as will
complain about with:
'Error: .size expression for main does not evaluate to a constant.'

Up to now we produce this:

.L.main:
 	....
	.size   main, .-main

With the macro defined the output is this:

.L.main:
 	....
	.size   main,.-.L.main

This affects only the 64-bit compiler.
Tested with world and kernel on both, 32 and 64-bit powerpc.
2011-11-16 21:22:51 +00:00
fabient
3fcd15923b Import gcc fix for -fstack-protector that produces segfaulting
binaries on arm/armel.

Related gcc bug:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35965

PR: 161128
MFC after: 1 week
2011-11-09 15:59:02 +00:00
stefanf
abe2037bc7 Adjust posix_memalign() prototype to match what we define in stdlib.h for
C++ compilation.

PR:	standards/147210
2011-10-16 10:14:33 +00:00
mm
24a0f968ca Upgrade of base gcc and libstdc++ to the last GPLv2-licensed revision
(rev. 127959 of gcc-4_2-branch).

Resolved GCC bugs:
	c++: 17763, 29365, 30535, 30917, 31337, 31941, 32108, 32112, 32346,
	     32898, 32992
	debug: 32610, 32914
	libstdc++: 33084, 33128
	middle-end: 32563
	rtl-optimization: 33148
	tree-optimization: 25413, 32723
	target: 32218

Tested by:	pointyhat (miwi)
Obtained from:	gcc (gcc-4_2-branch up to rev. 127959)
PR:		gnu/153298, gnu/153959, gnu/154385
MFC after:	1 month
2011-03-29 20:53:51 +00:00
mm
1aee4516fc Backport missing tunings for -march=core2:
- enable extra 80387 mathematical constants (ext_80387_constants) [1]
- enable compare and exchange 16 bytes (cmpxchg16b) [2]

Verified against llvm-gcc (and apple gcc)

Obtained from:	gcc-4.3 (ref. svn revs. 119260 [1], 121140 [2]; GPLv2)
MFC after:	2 weeks
2011-03-17 09:44:33 +00:00
mm
0ef0516836 Fix -march/-mtune=native autodetection for Intel Core 2 CPUs
Obtained from:	gcc 4.3 (partial rev. 119454; GPLv2)
MFC after:	2 weeks
2011-03-16 12:40:58 +00:00
mm
36f9eb3065 Backport SSSE3 instruction set support to base gcc.
Enabled by default for -march=core2

Obtained from:	gcc 4.3 (rev. 117958, 121687, 121726, 123639; GPLv2)
MFC after:	2 weeks
2011-03-14 13:31:34 +00:00
marius
dd7c472938 Now that TLS is supported for sparc64 by both binutils 2.17.50 committed
in r218822 and rtld(1) committed in r219533 turn on TLS support in GCC.
2011-03-11 21:24:02 +00:00
mm
6be340ca74 Backport Intel Core 2 and AMD Geode CPU types from gcc-4.3 (GPLv2)
These options are supported in this shape in all newer GCC versions.

PR:		gnu/155308
Obtained from:	gcc 4.3 (rev. 118090, 118973, 120846; GPLv2)
MFC after:	2 weeks
2011-03-07 14:48:22 +00:00