FreeBSD, historically, has always used 8-bit addresses for i2c devices
(7-bit device address << 1), always leaving the room for the read/write
bit.
This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them
compatible with 8-bit addresses. Previous to this commit an i2c device
would have different addresses depending on the controller it was attached
to (by example, when compared to any iicbb(4) based i2c controller), which
was a pretty annoying behavior.
Also, update the PMIC i2c address on beaglebone* DTS files to match the
new address scheme.
Now the userland utilities need to do the correct slave address shifting
(but it is going to work with any i2c controller on the system).
Discussed with: ian
MFC r267834:
Clarify the expected usage of I2C 7-bit slave addresses on ioctl(2)
interface.
While here add the cross reference to iic(4) on iicbus(4).
CR: D210
Suggested by: jmg
Merge if_nf10bmac(4), a driver to support an NetFPGA-10G Embedded
CPU Ethernet Core.
The current version operates on a simple PIO based interface connected
to a NetFPGA-10G port.
To avoid confusion: this driver operates on a CPU running on the FPGA,
e.g. BERI/mips, and is not suited for the PCI host interface.
Adjust the register layout to allow for 64bit registers in the
future for nf10bmac(4). Also, add support for and enable RX interrupts.
Allow switching between 32bit and 64bit bus width data access at compile
time by setting NF10BMAC_64BIT and using a REGWTYPE #define to set correct
variable and return value widths.
Adjust comments to indicate the 32 or 64bit register widths.
Relnotes: yes
Sponsored by: DARPA/AFRL
For BERI on NetFPGA assume HZ=100 by default.
Remove the uart support in favour of a "jtag-uart" interface imitation
providing a much simpler interface, directly exported to the host,
allowing the toolchain to be shared with BERI on Altera. [1]
Submitted by: Jong Hun HAN (jong.han cl.cam.ac.uk) [1]
Sponsored by: DARPA/AFRL
265941,265951,266390,266550,266910:
Various bhyve fixes:
- Don't save host's return address in 'struct vmxctx'.
- Permit non-32-bit accesses to local APIC registers.
- Factor out common ioport handler code.
- Use calloc() in favor of malloc + memset.
- Change the vlapic timer frequency to be in the ballpark of contemporary
hardware.
- Allow the guest to read the TSC via MSR 0x10.
- A VMCS is always inactive when it exits the vmx_run() loop. Remove
redundant code and the misleading comment that suggest otherwise.
- Ignore writes to microcode update MSR. This MSR is accessed by RHEL7
guest.
Add KTR tracepoints to annotate wrmsr and rdmsr VM exits.
- Provide an alias for the userboot console and name it 'comconsole'.
- Use EV_ADD to create an mevent and EV_ENABLE to enable it.
- abort(3) the process in response to a VMEXIT_ABORT.
- Don't include the guest memory segments in the bhyve(8) process core dump.
- Make the vmx asm code dtrace-fbt-friendly.
- Allow vmx_getdesc() and vmx_setdesc() to be called for a vcpu that is in
the VCPU_RUNNING state.
- Enable VMX in the IA32_FEATURE_CONTROL MSR if it not enabled and the MSR
isn't locked.
Allow customization of the brand displayed in the boot menu.
If the user specifies in /boot/loader.conf:
loader_brand="mycustom-brand"
Then "mycustom-brand" will be executed instead of "fbsd-logo".
Submitted by: alfred
Obtained from: FreeNAS
Tell VM we now have ARM platforms with physically discontiguous memory.
Define the full 1024M of ram on the imx51 and imx53 boards.
Use a more professional uart device description.
Actually save the mpcore clock frequency retrieved from fdt data.
imx6..
- Don't call sdhci_init_slot() until after handling the FDT properties
related to detecting card presence.
- Flag several sysctl variables as tunables.
- Rework the cpu frequency management code for imx6 to add "operating
points" and min/max frequency controls.
generic timer...
- Setup both secure and non-secure timer IRQs.
We don't know our ARM security state, so one of them will operate.
- Don't set frequency, since it's unpossible in non-secure state.
Only rely on DTS clock-frequency value or get clock from timer.
Switch imx6 to using the mpcore per-cpu event timers, but continue to use
the GPT timer, which is fixed-frequency, as a timecounter.
Change NO_EVENTTIMERS from an arm-specific to an MI option, so that it can
be used in MI code.
Add more flags for the fpexc register from the ARM1176JZF-S Manual
Initialise fpscr to a sane value when we create the pcb. This sets NaNs to
be the default NaN and for denormalised numbers to be flushed to zero.
VFP fixes/cleanups for ARM11:
* Save the required VFP registers on context switch. If the exception bit
is set we need to save and restore the FPINST register, and if the fp2v
bit is also set we need to save and restore FPINST2.
* Move saving and restoring the floating point control registers to C.
* Clear the fpexc exception and fp2v flags on a floating-point exception.
* Signal a SIGFPE if the fpexc exception flag is set on an undefined
instruction. This is how the ARM core signals to software there is a
floating-point exception.
Add Cortex-A15 cpu id revisions.
Exynos/Arndale...
- Merge SoC-common parts
- Enable iicbus device
- Directly call kmem_alloc_contig to allocate framebuffer memory
and pass VM_MEMATTR_UNCACHEABLE (no-cache, no-buffer).
This fixes screen refreshing problem when data is updated too slowly.
- Add support for keyboard used in Samsung Chromebook (ARM machine)
Support covers device drivers for:
- Interrupt Combiner
- gpio/pad, External Interrupts Controller (pad)
- I2C Interface
- Chrome Embedded Controller
- Chrome Keyboard
- Use new gpio dev class in EHCI driver
- Expand device tree information
- Release i2c bus on detach.
Revert r258678. Make the led gpio-specifier match again the #gpio-cells
settings from the GPIO controller, which i had broken in r258678. Restore
the active-low flag.
The ADC has a 12bit resolution and its raw output can be read via sysctl(8)
interface.
The driver allows the setup of ADC clock, samples average and open delay
(the number of clock cycles to wait before start the conversion).
The TSC_ADC module is set in the general purpose mode (no touchscreen
support).
Tested on Beaglebone-black.
Written based on AM335x TRM.
Implement __flt_rounds for ARMv6 hard-float. The fpscr register stores the
current rounding mode used by the VFP unit.
Simplify how we build MACHINE_ARCH. There are 3 options that may be set
however only arm, armeb, armv6, and soon armv6hf will be used.
Add the llvm/clang patch for r263619.
Reorder the pmap macros so "ARM_MMU_V6 + ARM_MMU_V7" is first. As they are
identical this allows us to build for both v6 and v7 together.
Add code for enabling second CPU core for A20 SoC.
Enable SMP on Cubieboard2.
Switch to freebsd.org emal address in copyright.
Use the same cache terminology as the ARM docs in comments. No
functional changes.
Use armv7 TLB flush code, not arm11, for cortex-a processors.
Exynos/ Arndale...
- Disable debugging by default.
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add display-related and clk devices to the tree
- Prevent resources intersection with EHCI driver
- Add driver for Display Controller.
- Add support for Samsung Chromebook (ARM Cortex A15 machine).
- Rename mct and ehci drivers files to match common naming.
262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949,
262950
Strip arm/conf/DEFAULTS down to just items that are mandatory for running
the architecture.
Move all the files named foo/common.c to foo/foo_common.c
Initial cut for DTS on the hl201 board.
Add commented out dts for sam9260ek as well as early printf support.
Make clock optional on uart nodes, then back it out ("I don't know what I
was thinking, but it is lame.")
Set the baud rate if it isn't 0
Make at91_soc_id() public.
Properly round at91 resource on unmapping.
Move AT91 AIC related stuff to own file.
Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in
LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32.
Follow r262916 with one more config file that references a renamed common.c
Remove bogus AT91 define that causes compile errors. Most of the defines
for SAM9X are going away soonish anyway (once FDT works), but until
then...
Remove all dregs of a per-thread undefined-exception-mode stack.
Rework the VFP code that handles demand-based save and restore of state.
Always call vfp_discard() on thread death.
When a thread begins life it doesn't own the VFP hardware state on any cpu.
Make undefined exception entry MP-safe.
262885, 262891, 262903,
imx6: Add a tunable to set the number of active cores, enable SMP by default.
ffec: Fix multicast filtering.
Allwinner a10/a20...
- Add gpio and clock bits for A10/A20's EMAC ethernet controller driver
- EMAC gpio configuration
- EMAC clock activation
- Add Static Random Access Memory controller driver for A10/A20.
A10/A20's SRAM is used by devices, such as CPU, EMAC,
for extra fast memory or as cache.
- Add EMAC 10/100 Ethernet controller driver for A10/A20.
It is available mostly in A10 devices like Hackberry, Marsboard,
Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device
like cubieboard2.
TX performance can be improved using both channels 0 and 1.
RX performance is poor and needs improvement with the assistance of
external DMA controller in case there
- Add EMAC and SRAM controller entries to FDT.
- Add EMAC device to kernel config files and enable EMAC, SRAM drivers.
OMAP: When calculating the MPU freq, make sure not to overflow.
Vybrid:
- Add driver for Port control and interrupts (PORT).
- Export panel info to DTS
- Reset all the layers before setup first one
- Enable display
nandfs: Slight code reordering to make error branch last.
Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs
that have it individually. Concensus on freebsd-arm@ is that it should
be included in all ARM kernels.
Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a
struct sigframe containing the struct ucontext.
Integrate device-tree upstream files into the build process:
(1) Invoke cpp to bring in files via #include (although the old
/include/ stuff is supported still).
(2) bring in files from either vendor tree or freebsd-custom files
when building.
(3) move all dts* files from sys/boot/fdt/dts to
sys/boot/fdt/dts/${MACHINE} as appropriate.
(4) encode all the magic to do the build in sys/tools/fdt/make_dtb.sh
so that the different places in the tree use the exact same logic.
(5) switch back to gpl dtc by default. the bsdl one in the tree has
significant issues not easily addressed by those unfamiliar with
the code.
Only try to build the static dtb when we're building a static dtb.
Use proper include path for dtc as well as cpp.
Fix syntax errors (missing ; other minor glitches) in existing dts files.
r262482, r262483, r262531,
Move the declaration for mpentry() into a header file instead of pasting
it into a bunch of different .c files.
If the L2 cache type is PIPT, pass a physical address for a flush.
Actually set the proper bit to indicate TTB shared memory.
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.
Invalidate caches immediately upon entry to init_secondary(). Also set
the Bufferable bit in the PDE entries of the secondary processor startup
pagetables.
Add the bits needed to run SMP on imx6.
Invalidate the SCU cache tag ram on all 4 cores, not just 1-3.
Minor tweaks to the imx GPT timer
Vybrid enhancements...
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
- Add support for Quartz Module.
- Pin configuration is a complete iomux register now and includes
drive strength, pull mode, mux mode, speed, etc.
- Add i2c devices to the tree
- Add IPG clock
r262355, r262419,
Add Vybrid driver for Synchronous Audio Interface (SAI).
Decrease SAI buffer size. Handle eDMA interrupt on running channel only.
Give the physmem fdt helper routines static linkage since no global
definition of them is provided anywhere.
Add imx6 early printf support, wrapped in #if 0 because it's rarely needed.
Add basic cpu frequency control and temperature monitoring to imx6_anatop.
Add the FREEBSD_BOOT_LOADER option so that a loaded DTB passed in from
ubldr will actually get used.
Create a generic IMX6 kernel config, then fix it to have an ident line.
Don't force imx6 bootverbose on anymore, it can be set from ubldr now.
r261955, r261958,
Add a driver to provide access to imx6 on-chip one-time-programmble data.
Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when
necessary.
It turns out Freescale cleverly made the ocotp device compatible across
several different families of SoCs, so move it to the freescale directory
and prefix everything with fsl rather than imx6.
Convert the imx6 sdhci "R1B fix" from a busy-loop in the interrupt handler
to a callout.
Increase the wait time for acquiring the SD bus from 10 to 250ms.
If no compatible cards were found after probing the SD bus, say so.
Add timeout logic to sdhci, separate from the timeouts done by the hardware.
After a timeout, reset the controller using SDHCI_RESET_CMD|SDHCI_RESET_DATA
rather than SDHCI_RESET_ALL; the latter turns off clocks and power, removing
any possibility of recovering from the error.
Add a helper routine to depth-search the device tree for a node with a
matching 'compatible' property.
r261848, r261855
On armv6 and later, use the WriteNotRead bit of the fault status register
to decide what protections are required by the faulting access.
Use the right symbols for determining arm architecture. Include the
necessary header file which has the new FAULT_WNR symbol defined in it.
Allow the kernel to be loaded at any 1MiB address. This requirement is
because we use the 1MiB section maps as they only need a single pagetable.
Add function for configuring Vybrid PLL4 (Audio) clock frequency output.
imx6 changes ...
- Fix the definition of the SDHCI_STATE_DAT and SDHCI_STATE_CMD fields,
and add SDHCI_RETUNE_REQUEST. None of these are actually used in the
code yet.
- Write translation code for the SDHCI_PRESENT_STATE register.
Freescale moved some bits around in their version of the register,
adjust things so that the sdhci code sees the standard layout.
- Add standard non-removable and cd-gpios properties to the usdhc
devices. That generates references to gpio devices, so uncomment them
even though there isn't a gpio driver to do anything with them yet.
- Add handling of standard "non-removable" property, and also some
workaround code so that if card detect is wired to a gpio pin, for now
we just treat it the same as non-removable (because there isn't a gpio
driver yet).
- Enable both sdcard slots, but not the sdio-based wifi that we don't
yet have a driver for.
- Remove a couple obsolete function declarations.
Remove FreeBSD 6 support from atmel usb controllers.
Add Vybrid drivers for:
- Enhanced Direct Memory Access Controller (eDMA)
- Direct Memory Access Multiplexer (DMAMUX)
Add support for Colibri VF50 Evaluation Board.
Add driver for Display Control Unit (DCU4).
Add prototype for tcon_bypass() used by dcu4.
Add register definition.
o Expand device tree information
o Export iomuxc (pins) configuration to DTS
o Allow devices to assign clocks in DTS
o Split kernel configuration to chip common and board specific parts.
r261844, r261845, r261846, r262194, r262522, r262559
r258046:
Fix a typo on a comment in ofw_bus_if.m, the default method will return -1
when a node doesn't exist.
r258047:
Move the KASSERT() check to the point before the increase of number of pins.
r258050:
Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so
it can be overriden by its OFW/FDT version.
Give a chance for GPIO devices that implement the device_identify method to
attach.
r259035:
Remove unnecessary includes and an unused softc variable. While here apply
two minor style(9) fixes.
r259036:
Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4)
control callback function. This makes gpioled(4) works even if the pin
is accidentally set to an input.
r259037:
Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs. It is now
known to work with gpioiic(4) and gpioled(4).
r261842:
Add an OFW GPIO compatible bus. This allows the use of the DTS files to
describe GPIO bindings in the system.
Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between
the OFW and the non OFW versions of GPIO bus.
Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus.
r261843:
Add OFW support to the in tree gpio compatible devices: gpioiic(4) and
gpioled(4).
Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.
Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.
Some compatibility details pointed out by imp@ will follow in subsequent
commits.
r261844:
Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems.
This change makes ofw_iicbus attach to iicbb(4) controllers in addition to
the already supported i2c host bridges (iichb).
On iicbb(4) allow the direct access of the OFW parent node by its children,
so they can be directly attached to iicbb(4) node on the DTS without the
need of describing the i2c bus.
r261845:
Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.
With this commit the OFW GPIO bus is fully functional on BBB and RPi.
GPIO controllers which want to use the OFW GPIO bus will need similar
changes.
r261846:
Make the gpioled(4) work out of the box on BBB.
Add gpioled(4) to BEAGLEBONE kernel and add the description of the four
on-board leds of beaglebone-black to its DTS file.
r262194:
Remove an unnecessary header.
r262522:
Fix make depend for iicbus.
r262559:
Inspired by r262522, fix make depend. This fixes the build of gpio modules.
Add option USB_HOST_ALIGN to configs that contain 'device usb'.
Update dts files of Cubieboard1,2 to use 1GB memory.
Add a function to print the contents of the static device mapping table,
Add configuration for the Freescale i.MX53 Quick Start Board.
Add the Raspberry Pi BSC (I2C compliant) controller driver.
Add Radxa Rock board (by radxa.com) support.
Digi-CCWMX53: enable ffec and uart, USB.
Add support for Freescale Vybrid Family VF600
Move and rename dwc otg driver to more generic one as it appears to work
for rk3188 SoC based board too.
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
r257282, r257332
Wait for DesignWare UART transfers completion before accessing line control
Enable UART busy detection handling for Armada XP - based board
Enable SATA interface on Armada XP
Run mvs SATA driver on Armada XP instead of old mv_sata
Retire arm_remap_nocache() and the data and constants associated with it.
Remove hard-coded mappings related to Armada XP support
Fix-up DTB for Armada XP registers' base according to the actual settings
Change Armada XP kernel load address to the u-boot's end address
Remove not working and deprecated PJ4Bv6 support
Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU
Add missing ARMv6 CPU functions to ARM Makefile
Add some extra sanity checking and checks to printf format specifiers.
Try even harder to find a console before giving up.
Make devices with registers into the KVA region work reliably.
Turn on VM_KMEM_SIZE_SCALE on 32-bit as well as 64-bit PowerPC.
Return NOKEY instead of 0 if there are no more key presses queued.
Enhance the mechanism that lets you configure the ubldr boot device by
setting the u-boot environment variable loaderdev=. It used to accept only
'disk' or 'net'. Now it allows specification of unit, slice, and partition
as well. In addition to the generic 'disk' it also accepts specific
storage device types such as 'mmc' or 'sata'.
If there isn't a loaderdev env var, the historical behavior is maintained.
It will use the first storage device it finds, or a network device if
no working storage device exists.
99% of the work on this was done by Patrick Kelsey, but I made some
changes, so if anything goes wrong, blame me.
(Indeed, the 3 followup commits fixed things I got wrong on the first.)
Prevent fdt data loaded from a file from overwriting the kernel environment,
by having uboot_autoload() do the fdt setup (which may load a file) rather
than waiting until we're actually in the process of launching the kernel.
As part of making this happen...
- Define LOADER_FDT_SUPPORT on the uboot/lib compile command line when
MK_FDT is set.
- Make fdt_setup_fdtb() public.
- Declare public fdt_whatever() functions in a header instead of using
scattered extern decls in .c files.
The search order for a usable dtb in fdt_setup_fdtp() is now
- A dtb loaded with an explicit "load -t dtb" command.
- A dtb already loaded into memory somehow[*] and pointed to by fdt_to_load.
- A dtb in the memory pointed to by the u-boot env vars fdtaddr or fdt_addr.
- A file named by the u-boot env vars fdtfile or fdt_file.
- A static dtb compiled into the kernel.
* Presumably by some arch-specific command or code.
