Commit Graph

1205 Commits

Author SHA1 Message Date
Andrew Thompson
b850ecc180 Change USB_DEBUG to #ifdef and allow it to be turned off. Previously this had
the illusion of a tunable setting but was always turned on regardless.

MFC after:	1 week
2010-04-22 21:31:34 +00:00
Warner Losh
b938b7a366 Add BUS_SPACE_UNRESTRICTED and define it to be ~0, just like all the
other platforms.
2010-04-08 19:34:55 +00:00
Alexander Motin
0295bbe76f Oops! Wrong copy-paste in r206053. 2010-04-01 19:05:43 +00:00
Alexander Motin
4703a67a9a Fill extended ATA command registers in cPRD to support 48bit commands. 2010-04-01 18:17:53 +00:00
Warner Losh
309e3c39d2 Build modules for this config to make sure they stay buildable... 2010-03-29 22:29:41 +00:00
Rui Paulo
c0873717d4 Pass the correct pointer to fled_cb(). 2010-03-26 18:49:43 +00:00
Nathan Whitehorn
a107d8aac9 Change the arguments of exec_setregs() so that it receives a pointer
to the image_params struct instead of several members of that struct
individually. This makes it easier to expand its arguments in the future
without touching all platforms.

Reviewed by:	jhb
2010-03-25 14:24:00 +00:00
Olivier Houchard
504e4c2e74 Make sure we insert and remove the PV entries related to unmanaged kernel
mappings into the kernel pmap, not into the pmap related to the
pmap_enter_pv()/pmap_remove_pv() call.
2010-03-21 21:03:35 +00:00
Warner Losh
30e980f2d1 Add support for the Samsung S3C2xx0 family of ARM SoCs written by
Andrew Turner.  The kernel supports the LN2410SBC evaluation board,
and likely others.  These parts (or similar ones) are in some open
hardware designs for phones.

Submitted by:	Andrew Turner
2010-03-20 03:39:35 +00:00
Bernd Walter
41ecefa550 fix type in comment 2010-03-12 22:39:35 +00:00
Rafal Jaworowski
da10e7e2d6 Fix ARM cache handling yet more.
1) vm_machdep.c: remove the dangling allocations so they do not
   un-necessarily turn off the cache upon consecutive access.

2) busdma_machdep.c: remove the same amount than shadow mapped.

Reported by:	Maks Verver
Submitted by:	Mark Tinguely
Reviewed by:	Grzegorz Bernacki
MFC after:	3 days
2010-03-11 21:16:54 +00:00
Rafal Jaworowski
43404d7e0b Let detailed info about CPU features print on Marvell Sheeva CPU as well.
Provide missing entry in the cpu_classes[].

Reported by:	Maks Verver
MFC after:	1 week
2010-03-11 21:04:29 +00:00
Rafal Jaworowski
bd50890544 Provide correct TCLK value for Kirkwood A1 silicon revision.
While there improve SOC ID output accordingly.

Obtained from:	Semihalf
MFC after:	1 week
2010-03-05 19:45:45 +00:00
Bernd Walter
80720032c0 simplify hash calculation 2010-02-28 18:06:54 +00:00
Bernd Walter
f7255c488c remove debug leftover 2010-02-28 16:14:34 +00:00
Bernd Walter
31e94ae09f Fix multicast hashes.
Atmel uses a simple xor hash instead of the typical crc based one.
2010-02-28 16:11:13 +00:00
Rafal Jaworowski
a9024075a7 Do not force verbose and single mode in non-metadata boot case.
We want to go multi-user by default also in case of booting without loader(8).
2010-02-24 20:31:00 +00:00
Rebecca Cran
6c655111ad Update the commented out option for omitting the sysctl descriptions; it
was committed as NO_SYSCTL_DESCR.

Approved by:	rrs (mentor)
2010-02-24 19:28:15 +00:00
Rui Paulo
4cd0801096 Fix previous commit: led_func() doesn't exist, it should be fled_cb().
Pointed out by:	bz
2010-02-22 14:49:52 +00:00
Kevin Lo
16445d1e64 Show the cpu info for fa526
Submitted by:	Yohanes Nugroho <yohanes at gmail dot com>
2010-02-20 14:54:11 +00:00
Kevin Lo
dbb0e359a7 Correct both FA526/FA626TE cpu ids since the cpu id is always
masked with 0xfffffff0
2010-02-20 14:52:07 +00:00
Warner Losh
d01c5f360e The NetBSD Foundation has granted permission to remove clauses 3 and 4.
Obtained from:	NetBSD
2010-02-16 21:59:17 +00:00
Attilio Rao
c1210a7d97 Adjust style (following the already existing rules) for the newly
introduced option DEADLKRES.

Reported by:	danfe, julian, avg
2010-02-15 23:44:48 +00:00
Kevin Lo
4e92112d57 Correct cpu id for FA526.
While I'm here, add cpu id for FA626TE.
2010-02-14 05:02:08 +00:00
Attilio Rao
88cbfa852e Add the options DEADLKRES (introducing the deadlock resolver thread) in
the 'debugging' section of any HEAD kernel and enable for the mainstream
ones, excluding the embedded architectures.
It may, of course, enabled on a case-by-case basis.

Sponsored by:	Sandvine Incorporated
Requested by:	emaste
Discussed with:	kib
2010-02-10 16:30:04 +00:00
Rui Paulo
fb023b5a3c Turn on the front LED at boot time like we do with the Avila. 2010-02-10 11:40:18 +00:00
Rafal Jaworowski
530a5fb294 Improve checking whether an ARM VA has a valid mapping before performing cache
sync.

VIPT/PIPT caches need valid VA-PA mapping in PTE for a cache operation to
succeed (unlike VIVT). Prior to this fix pmap was using l2pte_valid() for that
check, but this is not sufficient as the function merely checks if a PTE
exists (there can be existing but _invalid_ entries in the table).

A new pmap_has_valid_mapping() routine is introduced to do this job right by
checking proper PTE flags.

Among other potential problems this cures coherency issues with L2 caches on
MV-78100.

Submitted by:	Grzegorz Bernacki, Piotr Ziecik
Reviewed, tested by:	marcel
Obtained from:	Semihalf
MFC after:	1 week
2010-02-07 20:48:57 +00:00
Marcel Moolenaar
882561186b When backtracing self, start with the current frame (i.e. the
frame of db_trace_self()) and not the caller's frame. The use
of builtin_frame_address(1) to get the caller's frame is not
reliable and can cause panics.
2010-01-29 16:14:35 +00:00
John Baldwin
13c18821fa Move the examples for the 'hints' and 'env' keywords from various GENERIC
kernel configs into NOTES.

Reviewed by:	imp
2010-01-19 17:20:34 +00:00
Olivier Houchard
59a5c7f90e Do not free the dmamap if it is still busy.
Submitted by:	Mark Tinguely
MFC after:	3 days
2010-01-15 12:39:48 +00:00
Warner Losh
56eff2143f Revert 200594. This file isn't intended for these sorts of things. 2010-01-04 21:30:04 +00:00
Rui Paulo
16ffe04c2f Remove CNS11XXNAS.hints. 2010-01-04 03:40:46 +00:00
Rui Paulo
381a19cce0 Add support for Cavium Econa CNS11XX ARM boards. These boards were
previously know by StarSemi STR9104.

Tested by the submitter on an Emprex NSD-100 board.

Submitted by:	Yohanes Nugroho <yohanes at gmail.com>
Reviewed by:	freebsd-arm, stas
Obtained from:	//depot/projects/str91xx/...
2010-01-04 03:35:45 +00:00
Robert Noland
cfd7bacef2 Update d_mmap() to accept vm_ooffset_t and vm_memattr_t.
This replaces d_mmap() with the d_mmap2() implementation and also
changes the type of offset to vm_ooffset_t.

Purge d_mmap2().

All driver modules will need to be rebuilt since D_VERSION is also
bumped.

Reviewed by:	jhb@
MFC after:	Not in this lifetime...
2009-12-29 21:51:28 +00:00
Rui Paulo
0ce207d2af Intel XScale hwpmc(4) support.
This brings hwpmc(4) support for 2nd and 3rd generation XScale cores.
Right now it's enabled by default to make sure we test this a bit.
When the time comes it can be disabled by default.
Tested on Gateworks boards.

A man page is coming.

Obtained from:	//depot/user/rpaulo/xscalepmc/...
2009-12-23 23:16:54 +00:00
Doug Barton
f1bdf073c1 Add INCLUDE_CONFIG_FILE, and a note in comments about how to also
include the comments with CONFIGARGS
2009-12-16 02:17:43 +00:00
Alexander Motin
402ea18cbd Fix the build. 2009-12-08 21:42:04 +00:00
Alexander Motin
066f913a94 MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by:	nwitehorn (powerpc part)
2009-12-06 00:10:13 +00:00
Andrew Thompson
1813b93dc1 Add missing ath_ar9* ath hal entries. 2009-12-02 00:38:11 +00:00
Andrew Thompson
d3da916e6e Remove unknown ath hal device entries. 2009-12-02 00:37:03 +00:00
Alan Cox
e2997fea72 Simplify the invocation of vm_fault(). Specifically, eliminate the flag
VM_FAULT_DIRTY.  The information provided by this flag can be trivially
inferred by vm_fault().

Discussed with:	kib
2009-11-27 20:24:11 +00:00
John Baldwin
3064f0530b - Initialize callout before it is used in atestop() during attach.
- Reorder detach so that ether_ifdetach() is called first.  This removes
  the race that ATE_FLAG_DETACHING closed, so that flag can be removed.
- Trim a duplicate clearing of IFF_DRV_RUNNING.

Reviewed by:	imp
2009-11-19 22:04:02 +00:00
John Baldwin
e21e2eea58 These drivers only set if_timer but never set if_watchdog. Just remove
the assignments to if_timer.
2009-11-19 18:11:23 +00:00
Konstantin Belousov
a7b890448c Extract the code that records syscall results in the frame into MD
function cpu_set_syscall_retval().

Suggested by:	marcel
Reviewed by:	marcel, davidxu
PowerPC, ARM, ia64 changes:	marcel
Sparc64 tested and reviewed by:	marius, also sunv reviewed
MIPS tested by:	gonzo
MFC after:	1 month
2009-11-10 11:43:07 +00:00
Marcel Moolenaar
4590f2282a Fix gdb_cpu_getreg() to actually match GDB's register
definition.
2009-11-05 06:31:50 +00:00
Marcel Moolenaar
2ffa44209a Implement db_trace_thread() by calling db_stack_trace_cmd() and
passing a frame pointer that comes from the thread context. This
fixes DDB backtraces by not unwinding debugger functions first.
2009-11-05 06:27:46 +00:00
Marcel Moolenaar
faa7ba7a3f Implement db_trace_self() by calling db_stack_trace_cmd()
and not db_trace_thread().
2009-11-05 06:23:02 +00:00
Alan Cox
c346328f95 Eliminate an unnecessary vm include file. 2009-11-04 04:41:03 +00:00
Alexander Motin
ebbb35ba70 MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.
2009-10-31 13:24:14 +00:00
Konstantin Belousov
d6e029adbe In r197963, a race with thread being selected for signal delivery
while in kernel mode, and later changing signal mask to block the
signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race
exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls.

Use kern_sigprocmask() instead of direct manipulation of td_sigmask to
reschedule newly blocked signals, closing the race.

Reviewed by:	davidxu
Tested by:	pho
MFC after:	1 month
2009-10-27 10:47:58 +00:00